Disable i40e AVX512 code path for Windows build regardless of CPU capability to avoid the MinGW build error: Error: invalid register for .seh_savexmm Signed-off-by: Leyi Rong <leyi.rong@intel.com> --- drivers/net/i40e/meson.build | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/i40e/meson.build b/drivers/net/i40e/meson.build index f5fc5a17e..26cd201ee 100644 --- a/drivers/net/i40e/meson.build +++ b/drivers/net/i40e/meson.build @@ -56,6 +56,7 @@ if arch_subdir == 'x86' if is_windows and cc.get_id() != 'clang' i40e_avx512_cc_support = false + i40e_avx512_cpu_support = false endif if i40e_avx512_cpu_support == true or i40e_avx512_cc_support == true -- 2.17.1
On Tue, Feb 02, 2021 at 05:06:39PM +0800, Leyi Rong wrote:
> Disable i40e AVX512 code path for Windows build regardless of CPU
> capability to avoid the MinGW build error:
> Error: invalid register for .seh_savexmm
>
> Signed-off-by: Leyi Rong <leyi.rong@intel.com>
> ---
> drivers/net/i40e/meson.build | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/net/i40e/meson.build b/drivers/net/i40e/meson.build
> index f5fc5a17e..26cd201ee 100644
> --- a/drivers/net/i40e/meson.build
> +++ b/drivers/net/i40e/meson.build
> @@ -56,6 +56,7 @@ if arch_subdir == 'x86'
>
> if is_windows and cc.get_id() != 'clang'
> i40e_avx512_cc_support = false
> + i40e_avx512_cpu_support = false
> endif
>
This fix seems to imply that there is something else wrong in the logic in
the build file. If the compiler does not support avx512, the fact that the
CPU supports it should be completely irrelevant. Therefore, I think a more
correct fix (logically) should be to remove the "i40e_avx512_cpu_support"
from the next "if" condition, and only check the compiler support. We
don't do anything with the cpu support variable.
/Bruce
> Subject: Re: [PATCH] net/i40e: disable AVX512 with MinGW > > External email: Use caution opening links or attachments > > > On Tue, Feb 02, 2021 at 05:06:39PM +0800, Leyi Rong wrote: > > Disable i40e AVX512 code path for Windows build regardless of CPU > > capability to avoid the MinGW build error: > > Error: invalid register for .seh_savexmm > > > > Signed-off-by: Leyi Rong <leyi.rong@intel.com> > > --- > > drivers/net/i40e/meson.build | 1 + > > 1 file changed, 1 insertion(+) > > > > diff --git a/drivers/net/i40e/meson.build > > b/drivers/net/i40e/meson.build index f5fc5a17e..26cd201ee 100644 > > --- a/drivers/net/i40e/meson.build > > +++ b/drivers/net/i40e/meson.build > > @@ -56,6 +56,7 @@ if arch_subdir == 'x86' > > > > if is_windows and cc.get_id() != 'clang' > > i40e_avx512_cc_support = false > > + i40e_avx512_cpu_support = false > > endif > > > > This fix seems to imply that there is something else wrong in the logic in the > build file. If the compiler does not support avx512, the fact that the CPU > supports it should be completely irrelevant. Therefore, I think a more correct > fix (logically) should be to remove the "i40e_avx512_cpu_support" > from the next "if" condition, and only check the compiler support. We don't > do anything with the cpu support variable. Moreover, this patch doesn't resolve the issue [1]. [1] http://mails.dpdk.org/archives/test-report/2021-February/177665.html > > /Bruce
> -----Original Message----- > From: Tal Shnaiderman <talshn@nvidia.com> > Sent: Tuesday, February 2, 2021 10:14 PM > To: Richardson, Bruce <bruce.richardson@intel.com>; Rong, Leyi > <leyi.rong@intel.com> > Cc: david.marchand@redhat.com; Zhang, Qi Z <qi.z.zhang@intel.com>; Yigit, > Ferruh <ferruh.yigit@intel.com>; NBU-Contact-Thomas Monjalon > <thomas@monjalon.net>; Kadam, Pallavi <pallavi.kadam@intel.com>; Menon, > Ranjit <ranjit.menon@intel.com>; Xing, Beilei <beilei.xing@intel.com>; > aconole@redhat.com; dev@dpdk.org; ci@dpdk.org > Subject: RE: [PATCH] net/i40e: disable AVX512 with MinGW > > > Subject: Re: [PATCH] net/i40e: disable AVX512 with MinGW > > > > External email: Use caution opening links or attachments > > > > > > On Tue, Feb 02, 2021 at 05:06:39PM +0800, Leyi Rong wrote: > > > Disable i40e AVX512 code path for Windows build regardless of CPU > > > capability to avoid the MinGW build error: > > > Error: invalid register for .seh_savexmm > > > > > > Signed-off-by: Leyi Rong <leyi.rong@intel.com> > > > --- > > > drivers/net/i40e/meson.build | 1 + > > > 1 file changed, 1 insertion(+) > > > > > > diff --git a/drivers/net/i40e/meson.build > > > b/drivers/net/i40e/meson.build index f5fc5a17e..26cd201ee 100644 > > > --- a/drivers/net/i40e/meson.build > > > +++ b/drivers/net/i40e/meson.build > > > @@ -56,6 +56,7 @@ if arch_subdir == 'x86' > > > > > > if is_windows and cc.get_id() != 'clang' > > > i40e_avx512_cc_support = false > > > + i40e_avx512_cpu_support = false > > > endif > > > > > > > This fix seems to imply that there is something else wrong in the > > logic in the build file. If the compiler does not support avx512, the > > fact that the CPU supports it should be completely irrelevant. > > Therefore, I think a more correct fix (logically) should be to remove the > "i40e_avx512_cpu_support" > > from the next "if" condition, and only check the compiler support. We > > don't do anything with the cpu support variable. > > Moreover, this patch doesn't resolve the issue [1]. > > [1] http://mails.dpdk.org/archives/test-report/2021-February/177665.html > [139/227] Compiling C object drivers/a715181@@tmp_rte_net_i40e@sta/net_i40e_i40e_rxtx_vec_avx2.c.obj. FAILED: drivers/a715181@@tmp_rte_net_i40e@sta/net_i40e_i40e_rxtx_vec_avx2.c.obj gcc @drivers/a715181@@tmp_rte_net_i40e@sta/net_i40e_i40e_rxtx_vec_avx2.c.obj.rsp {standard input}: Assembler messages: {standard input}:2024: Error: invalid register for .seh_savexmm {standard input}:2026: Error: invalid register for .seh_savexmm {standard input}:2028: Error: invalid register for .seh_savexmm Seems that avx2 file also causes the same issue, will send a new patch to have the test. > > > > /Bruce
Adds extra cflags '-fno-asynchronous-unwind-tables' to avoid the MinGW build error: Error: invalid register for .seh_savexmm Fixes: 5c38c33f7880 ("net/i40e: disable AVX512 with MinGW") Signed-off-by: Leyi Rong <leyi.rong@intel.com> --- drivers/net/i40e/meson.build | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/net/i40e/meson.build b/drivers/net/i40e/meson.build index f5fc5a17e0..ce3cc658e9 100644 --- a/drivers/net/i40e/meson.build +++ b/drivers/net/i40e/meson.build @@ -28,6 +28,10 @@ includes += include_directories('base') if arch_subdir == 'x86' sources += files('i40e_rxtx_vec_sse.c') + if is_windows and cc.get_id() != 'clang' + cflags += ['-fno-asynchronous-unwind-tables'] + endif + # compile AVX2 version if either: # a. we have AVX supported in minimum instruction set baseline # b. it's not minimum instruction set, but supported by compiler @@ -54,10 +58,6 @@ if arch_subdir == 'x86' cc.has_argument('-mavx512f') and cc.has_argument('-mavx512bw')) - if is_windows and cc.get_id() != 'clang' - i40e_avx512_cc_support = false - endif - if i40e_avx512_cpu_support == true or i40e_avx512_cc_support == true cflags += ['-DCC_AVX512_SUPPORT'] avx512_args = [cflags, '-mavx512f', '-mavx512bw'] -- 2.17.1
On Tue, 2 Feb 2021 22:32:58 +0800, Leyi Rong wrote:
> Adds extra cflags '-fno-asynchronous-unwind-tables'
> to avoid the MinGW build error:
> Error: invalid register for .seh_savexmm
>
> Fixes: 5c38c33f7880 ("net/i40e: disable AVX512 with MinGW")
>
> Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Tested-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Re: -fno-asynchronous-unwind-tables, when cross-compiling from Linux, I
observe bit-to-bit identical i40e_rxtx_vec_avx512.c.obj. My guess it that this
option somehow affects GCC inlining heuristics. Similar issue existed in
librte_acl (at least a year ago win GCC 6, I believe), where GCC generated
incorrect code unless certain functions had been inlined (caught by test
app). No an AVX expert, just my 2c.
> -----Original Message-----
> From: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
> Sent: Wednesday, February 3, 2021 7:08 AM
> To: Rong, Leyi <leyi.rong@intel.com>
> Cc: david.marchand@redhat.com; Zhang, Qi Z <qi.z.zhang@intel.com>; Yigit,
> Ferruh <ferruh.yigit@intel.com>; thomas@monjalon.net; Richardson, Bruce
> <bruce.richardson@intel.com>; talshn@nvidia.com; Kadam, Pallavi
> <pallavi.kadam@intel.com>; Menon, Ranjit <ranjit.menon@intel.com>; Xing,
> Beilei <beilei.xing@intel.com>; aconole@redhat.com; dev@dpdk.org;
> ci@dpdk.org
> Subject: Re: [dpdk-dev] [PATCH v2] net/i40e: fix avx code error on MinGW
>
> On Tue, 2 Feb 2021 22:32:58 +0800, Leyi Rong wrote:
> > Adds extra cflags '-fno-asynchronous-unwind-tables'
> > to avoid the MinGW build error:
> > Error: invalid register for .seh_savexmm
> >
> > Fixes: 5c38c33f7880 ("net/i40e: disable AVX512 with MinGW")
> >
> > Signed-off-by: Leyi Rong <leyi.rong@intel.com>
>
> Tested-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
>
> Re: -fno-asynchronous-unwind-tables, when cross-compiling from Linux, I
> observe bit-to-bit identical i40e_rxtx_vec_avx512.c.obj. My guess it that this
> option somehow affects GCC inlining heuristics. Similar issue existed in
> librte_acl (at least a year ago win GCC 6, I believe), where GCC generated
> incorrect code unless certain functions had been inlined (caught by test app).
> No an AVX expert, just my 2c.
Applied to dpdk-next-net-intel.
Thanks
Qi
On 2/4/2021 10:41 AM, Zhang, Qi Z wrote:
>
>
>> -----Original Message-----
>> From: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
>> Sent: Wednesday, February 3, 2021 7:08 AM
>> To: Rong, Leyi <leyi.rong@intel.com>
>> Cc: david.marchand@redhat.com; Zhang, Qi Z <qi.z.zhang@intel.com>; Yigit,
>> Ferruh <ferruh.yigit@intel.com>; thomas@monjalon.net; Richardson, Bruce
>> <bruce.richardson@intel.com>; talshn@nvidia.com; Kadam, Pallavi
>> <pallavi.kadam@intel.com>; Menon, Ranjit <ranjit.menon@intel.com>; Xing,
>> Beilei <beilei.xing@intel.com>; aconole@redhat.com; dev@dpdk.org;
>> ci@dpdk.org
>> Subject: Re: [dpdk-dev] [PATCH v2] net/i40e: fix avx code error on MinGW
>>
>> On Tue, 2 Feb 2021 22:32:58 +0800, Leyi Rong wrote:
>>> Adds extra cflags '-fno-asynchronous-unwind-tables'
>>> to avoid the MinGW build error:
>>> Error: invalid register for .seh_savexmm
>>>
>>> Fixes: 5c38c33f7880 ("net/i40e: disable AVX512 with MinGW")
>>>
>>> Signed-off-by: Leyi Rong <leyi.rong@intel.com>
>>
>> Tested-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
>>
>> Re: -fno-asynchronous-unwind-tables, when cross-compiling from Linux, I
>> observe bit-to-bit identical i40e_rxtx_vec_avx512.c.obj. My guess it that this
>> option somehow affects GCC inlining heuristics. Similar issue existed in
>> librte_acl (at least a year ago win GCC 6, I believe), where GCC generated
>> incorrect code unless certain functions had been inlined (caught by test app).
>> No an AVX expert, just my 2c.
>
> Applied to dpdk-next-net-intel.
>
Hi Thomas, David,
Do you prefer to get this directly to the main repo, since it is fixing the
windows build?
04/02/2021 13:36, Ferruh Yigit:
> On 2/4/2021 10:41 AM, Zhang, Qi Z wrote:
> > From: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
> >> On Tue, 2 Feb 2021 22:32:58 +0800, Leyi Rong wrote:
> >>> Adds extra cflags '-fno-asynchronous-unwind-tables'
> >>> to avoid the MinGW build error:
> >>> Error: invalid register for .seh_savexmm
> >>>
> >>> Fixes: 5c38c33f7880 ("net/i40e: disable AVX512 with MinGW")
> >>>
> >>> Signed-off-by: Leyi Rong <leyi.rong@intel.com>
> >>
> >> Tested-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
> >>
> >> Re: -fno-asynchronous-unwind-tables, when cross-compiling from Linux, I
> >> observe bit-to-bit identical i40e_rxtx_vec_avx512.c.obj. My guess it that this
> >> option somehow affects GCC inlining heuristics. Similar issue existed in
> >> librte_acl (at least a year ago win GCC 6, I believe), where GCC generated
> >> incorrect code unless certain functions had been inlined (caught by test app).
> >> No an AVX expert, just my 2c.
> >
> > Applied to dpdk-next-net-intel.
> >
>
> Hi Thomas, David,
>
> Do you prefer to get this directly to the main repo, since it is fixing the
> windows build?
Given it will be pulled shortly, I think it's OK through next-net.
On Thu, Feb 4, 2021 at 1:36 PM Ferruh Yigit <ferruh.yigit@intel.com> wrote:
>
> On 2/4/2021 10:41 AM, Zhang, Qi Z wrote:
> >
> >
> >> -----Original Message-----
> >> From: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
> >> Sent: Wednesday, February 3, 2021 7:08 AM
> >> To: Rong, Leyi <leyi.rong@intel.com>
> >> Cc: david.marchand@redhat.com; Zhang, Qi Z <qi.z.zhang@intel.com>; Yigit,
> >> Ferruh <ferruh.yigit@intel.com>; thomas@monjalon.net; Richardson, Bruce
> >> <bruce.richardson@intel.com>; talshn@nvidia.com; Kadam, Pallavi
> >> <pallavi.kadam@intel.com>; Menon, Ranjit <ranjit.menon@intel.com>; Xing,
> >> Beilei <beilei.xing@intel.com>; aconole@redhat.com; dev@dpdk.org;
> >> ci@dpdk.org
> >> Subject: Re: [dpdk-dev] [PATCH v2] net/i40e: fix avx code error on MinGW
> >>
> >> On Tue, 2 Feb 2021 22:32:58 +0800, Leyi Rong wrote:
> >>> Adds extra cflags '-fno-asynchronous-unwind-tables'
> >>> to avoid the MinGW build error:
> >>> Error: invalid register for .seh_savexmm
> >>>
> >>> Fixes: 5c38c33f7880 ("net/i40e: disable AVX512 with MinGW")
> >>>
> >>> Signed-off-by: Leyi Rong <leyi.rong@intel.com>
> >>
> >> Tested-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
> >>
> >> Re: -fno-asynchronous-unwind-tables, when cross-compiling from Linux, I
> >> observe bit-to-bit identical i40e_rxtx_vec_avx512.c.obj. My guess it that this
> >> option somehow affects GCC inlining heuristics. Similar issue existed in
> >> librte_acl (at least a year ago win GCC 6, I believe), where GCC generated
> >> incorrect code unless certain functions had been inlined (caught by test app).
> >> No an AVX expert, just my 2c.
> >
> > Applied to dpdk-next-net-intel.
> >
>
> Hi Thomas, David,
>
> Do you prefer to get this directly to the main repo, since it is fixing the
> windows build?
I have no issue with the main branch for mingw.
The windows builds at UNH seem unavailable, so we can wait for the
next-net merge.
--
David Marchand
[-- Attachment #1: Type: text/plain, Size: 2466 bytes --] Hi All, The jobs for Windows compile are running, so it may just be the patch hasn't caught up in the queue. Cheers, Lincoln On Thu, Feb 4, 2021 at 8:43 AM David Marchand <david.marchand@redhat.com> wrote: > On Thu, Feb 4, 2021 at 1:36 PM Ferruh Yigit <ferruh.yigit@intel.com> > wrote: > > > > On 2/4/2021 10:41 AM, Zhang, Qi Z wrote: > > > > > > > > >> -----Original Message----- > > >> From: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com> > > >> Sent: Wednesday, February 3, 2021 7:08 AM > > >> To: Rong, Leyi <leyi.rong@intel.com> > > >> Cc: david.marchand@redhat.com; Zhang, Qi Z <qi.z.zhang@intel.com>; > Yigit, > > >> Ferruh <ferruh.yigit@intel.com>; thomas@monjalon.net; Richardson, > Bruce > > >> <bruce.richardson@intel.com>; talshn@nvidia.com; Kadam, Pallavi > > >> <pallavi.kadam@intel.com>; Menon, Ranjit <ranjit.menon@intel.com>; > Xing, > > >> Beilei <beilei.xing@intel.com>; aconole@redhat.com; dev@dpdk.org; > > >> ci@dpdk.org > > >> Subject: Re: [dpdk-dev] [PATCH v2] net/i40e: fix avx code error on > MinGW > > >> > > >> On Tue, 2 Feb 2021 22:32:58 +0800, Leyi Rong wrote: > > >>> Adds extra cflags '-fno-asynchronous-unwind-tables' > > >>> to avoid the MinGW build error: > > >>> Error: invalid register for .seh_savexmm > > >>> > > >>> Fixes: 5c38c33f7880 ("net/i40e: disable AVX512 with MinGW") > > >>> > > >>> Signed-off-by: Leyi Rong <leyi.rong@intel.com> > > >> > > >> Tested-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com> > > >> > > >> Re: -fno-asynchronous-unwind-tables, when cross-compiling from Linux, > I > > >> observe bit-to-bit identical i40e_rxtx_vec_avx512.c.obj. My guess it > that this > > >> option somehow affects GCC inlining heuristics. Similar issue existed > in > > >> librte_acl (at least a year ago win GCC 6, I believe), where GCC > generated > > >> incorrect code unless certain functions had been inlined (caught by > test app). > > >> No an AVX expert, just my 2c. > > > > > > Applied to dpdk-next-net-intel. > > > > > > > Hi Thomas, David, > > > > Do you prefer to get this directly to the main repo, since it is fixing > the > > windows build? > > I have no issue with the main branch for mingw. > The windows builds at UNH seem unavailable, so we can wait for the > next-net merge. > > > -- > David Marchand > > -- *Lincoln Lavoie* Principal Engineer, Broadband Technologies 21 Madbury Rd., Ste. 100, Durham, NH 03824 lylavoie@iol.unh.edu https://www.iol.unh.edu +1-603-674-2755 (m) <https://www.iol.unh.edu> [-- Attachment #2: Type: text/html, Size: 5208 bytes --]