From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 75FDDA0588 for ; Thu, 16 Apr 2020 17:04:47 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 4FB0F1DD26; Thu, 16 Apr 2020 17:04:47 +0200 (CEST) Received: from mail-io1-f53.google.com (mail-io1-f53.google.com [209.85.166.53]) by dpdk.org (Postfix) with ESMTP id 1438C1DD22 for ; Thu, 16 Apr 2020 17:04:45 +0200 (CEST) Received: by mail-io1-f53.google.com with SMTP id w1so21349288iot.7 for ; Thu, 16 Apr 2020 08:04:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=iol.unh.edu; s=unh-iol; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=1Mo+eyR7VMvk98fThxapTOuW9G+mENNVhhoAmsb59ug=; b=eL+PEnox+G6r779KEBzHd2Hpec2sk2xzmF8NgBIB7e4Ob/TaZMu5+VDdxo3G8tQe8R hAOLDl0oM6+p6pA0SNL5tvR6l9s/YSl1okR5WFX0ZOs0EUpi68BRB7nl9O7SUK16pZoe gHZlU8bVUMTdK2L3Sq6khJ2Y6r7JGFsB4vmnA= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=1Mo+eyR7VMvk98fThxapTOuW9G+mENNVhhoAmsb59ug=; b=R2sXGXETkOWrXZtJIGYHjvny6Bcjw4gMt29baCOcA2YPhe1jtRNsllFsjFlbW5LiPi X6veSm3t1ocJdRIoJ9FAq6ekYD4Tqcx2kTwMwhcXx3zanXqkhP12BGmpj4C0FLdFRMO2 dn+7mE1pkjFEUQzhgbDIrV1uWqOxFKlynGGB2SV9+Qsjtm+8ZIwJbIglGcDH65OJsgFL O9LObb/vDsRv8OkM6sKUIl/nIXK4DjtQ6x5jRq8FdRjZ/Vh2XKDsCwNn3rENrfkL02ov E83rzvTUEH853kEpsckLl3FJdjuph7OhAxRT9Sk0EQd21P6VUMpdFd3Gt/Xs15932qkm a0+g== X-Gm-Message-State: AGi0Pua6LwzOntarLAUDxFY8iMiCBD7A14Q0heMzG/2brbAHyDR8XNOb JG8oMGL+m+nQDpDTha6HoAn4qZOsxDAF34duESxxaA== X-Google-Smtp-Source: APiQypItF+rCF+4l4ZY44llbh+5e+16CvJBRlN0TFbvOKA4yhpOl8J8QGNdyvziNMbCIHj5hgNb2cmAwEzz+gwFYWkU= X-Received: by 2002:a05:6638:4e:: with SMTP id a14mr8550217jap.108.1587049483418; Thu, 16 Apr 2020 08:04:43 -0700 (PDT) MIME-Version: 1.0 References: <1827408.xz2uEaWSZ7@xps> <9DEEADBC57E43F4DA73B571777FECECA41EAB066@SHSMSX104.ccr.corp.intel.com> <9DEEADBC57E43F4DA73B571777FECECA41EBB4AF@SHSMSX104.ccr.corp.intel.com> <9DEEADBC57E43F4DA73B571777FECECA41EFB9C5@SHSMSX104.ccr.corp.intel.com> <9DEEADBC57E43F4DA73B571777FECECA41F01113@SHSMSX104.ccr.corp.intel.com> <9DEEADBC57E43F4DA73B571777FECECA41F025A1@SHSMSX104.ccr.corp.intel.com> <9DEEADBC57E43F4DA73B571777FECECA41F03B43@SHSMSX104.ccr.corp.intel.com> <9DEEADBC57E43F4DA73B571777FECECA41F058DF@SHSMSX104.ccr.corp.intel.com> <9DEEADBC57E43F4DA73B571777FECECA41F18C47@SHSMSX104.ccr.corp.intel.com> <35e7a8c8b8d24af59480a6dc8af1c59b@intel.com> In-Reply-To: From: Brandon Lo Date: Thu, 16 Apr 2020 11:04:06 -0400 Message-ID: To: "Ma, LihongX" Cc: "Chen, Zhaoyan" , David Marchand , "dpdklab@iol.unh.edu" , Lincoln Lavoie , Thomas Monjalon , "ci@dpdk.org" , "Tu, Lijuan" , "Xu, Qian Q" , "Zhang, XuemingX" , "O'Driscoll, Tim" Content-Type: multipart/related; boundary="000000000000b3f92605a369c0db" Subject: Re: [dpdk-ci] [dpdklab] Re: Intel performance test is failing X-BeenThere: ci@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK CI discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: ci-bounces@dpdk.org Sender: "ci" --000000000000b3f92605a369c0db Content-Type: multipart/alternative; boundary="000000000000b3f92405a369c0da" --000000000000b3f92405a369c0da Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hi Lihong, I saw your changes and applied them manually. This involves me taking the machine down for maintenance on our backend, and then doing a normal `reboot`. Now when I do `cat /proc/cmdline` it shows: `BOOT_IMAGE=3D/boot/vmlinuz-4.15.0-55-generic root=3DUUID=3D3801030b-237d-428e-9e67-d81e12f16308 ro quiet splash hugepagesz=3D1G hugepages=3D40 default_hugepagesz=3D1G isolcpus=3D1-21,49-69,24-37,72-85 intel_iommu=3Don iommu=3Dpt nohz_full=3D1-21,49-69,24-37,72-85 rcu_nocbs=3D1-21,49-69,24-37,72-85 intel_pstate=3Ddisable nmi_watchdog=3D0 audit=3D0 nosoftlockup processor.max_cstate=3D1 intel_idle.max_cstate=3D1 hpet=3Ddisable mce=3Doff tsc=3Dreliable numa_balancing=3Ddisable vt.handoff=3D1` Which is what I think we wanted to achieve. I have now done the `reboot_to_ro` command and it should be working fine for testing. Thanks, Brandon On Wed, Apr 15, 2020 at 11:40 PM Ma, LihongX wrote: > Hi, Brandon > > > > I use the cmd =E2=80=98reboot_to_rw=E2=80=99 to restart server, and edit = the file > =E2=80=98/etc/default/grub=E2=80=99 to reset the isolation cpus, > > > > Changes the field =E2=80=98isolcpus=3D1-48 nohz_full=3D1-48 rcu_nocbs= =3D1-48=E2=80=99 to > > =E2=80=98isolcpus=3D1-21,49-69,24-37,72-85 nohz_full=3D1-21,49-69,24-37,7= 2-85 > rcu_nocbs=3D1-21,49-69,24-37,72-85=E2=80=99 > > > > Detail as below: > > GRUB_CMDLINE_LINUX_DEFAULT=3D"quiet splash hugepagesz=3D1G hugepages=3D40 > default_hugepagesz=3D1G isolcpus=3D1-21,49-69,24-37,72-85 intel_iommu=3Do= n > iommu=3Dpt nohz_full=3D1-21,49-69,24-37,72-85 rcu_nocbs=3D1-21,49-69,24-3= 7,72-85 > intel_pstate=3Ddisable nmi_watchdog=3D0 audit=3D0 nosoftlockup > processor.max_cstate=3D1 intel_idle.max_cstate=3D1 hpet=3Ddisable mce=3Do= ff > tsc=3Dreliable numa_balancing=3Ddisable" > > > > Then use cmd: update-grub to make the configuration effective. > > Then reboot server use =E2=80=98reboot_to_ro=E2=80=99, but I can=E2=80=99= t find the change in > cmdline ( cat /proc/cmdline). > > > > Can you help me to check it? > > > > Thanks > > Lihong > > > > *From:* Brandon Lo [mailto:blo@iol.unh.edu] > *Sent:* Thursday, April 16, 2020 3:31 AM > *To:* Ma, LihongX > *Cc:* Chen, Zhaoyan ; David Marchand < > david.marchand@redhat.com>; dpdklab@iol.unh.edu; Lincoln Lavoie < > lylavoie@iol.unh.edu>; Thomas Monjalon ; ci@dpdk.org= ; > Tu, Lijuan ; Xu, Qian Q ; > Zhang, XuemingX ; O'Driscoll, Tim < > tim.odriscoll@intel.com> > *Subject:* Re: [dpdklab] Re: [dpdk-ci] Intel performance test is failing > > > > Hi Lihong, > > > > I think any time is fine to make these changes. > > > > Please use the 'reboot_to_rw' command once you have logged on, this will > make sure your changes are saved. > > It will also disable testing momentarily while you make your changes. > > > > Once you're finished, you can reboot it with 'reboot_to_ro'. > > Please let me know when you're done so I can make sure everything is > working as intended. > > We could also do this change for you if needed. > > > > Thanks, > > Brandon > > > > On Wed, Apr 15, 2020 at 5:39 AM Ma, LihongX wrote: > > Hi, Brandon > > > > I find the grub configuration of isolation cpu miss the logic cores whic= h > at some thread. > > > > For example: > > If the server cpus layout as below, and want to config the isolation cpu > from 1-20 > > The config of isolation should is =E2=80=98isolcpus=3D1-20,49-68=E2=80=99 > > > > [image: cid:1717f4fa8006917eb1] > > > > So, I want to change the grub configuration of the isolation cpus. > > From =E2=80=98isolcpus=3D1-48=E2=80=99 change to =E2=80=98isolcpus=3D1-21= ,49-68,24-37,72-85=E2=80=99 > > > > Can you help me check which time is suite to do this change ? > > > > Regards, > > Ma,lihong > > > > *From:* Brandon Lo [mailto:blo@iol.unh.edu] > *Sent:* Friday, April 3, 2020 2:39 AM > *To:* Ma, LihongX > *Cc:* Chen, Zhaoyan ; David Marchand < > david.marchand@redhat.com>; dpdklab@iol.unh.edu; Lincoln Lavoie < > lylavoie@iol.unh.edu>; Thomas Monjalon ; ci@dpdk.org= ; > Tu, Lijuan ; Xu, Qian Q ; > Zhang, XuemingX ; O'Driscoll, Tim < > tim.odriscoll@intel.com> > *Subject:* Re: [dpdklab] Re: [dpdk-ci] Intel performance test is failing > > > > Hi Lihong, > > > > I have changed the baselines to reflect the new expected values. > > The performance tests should work as expected and pass. > > > > We will email again in the future if we come across any problems. > > Feel free to email us as well if you would like to make any other changes= . > > > > Thank you for all your help > > > > On Wed, Apr 1, 2020 at 2:00 AM Ma, LihongX wrote: > > Hi, Brandon > > Thanks for you recommends, I have done the changes. > > As the throughput value of nic_single_core is proportional to the cpu > frequency. > > I recommend you can change the baseline according to our report system. > > > > On the our 2.50GHz system, the baseline value as below: > > NNT: > > *pkt_size* > > *trd/rxd* > > *expected_value* > > 64 > > 512 > > 52.562 > > 64 > > 2048 > > 41.439 > > > > FVL: > > *pkt_size* > > *trd/rxd* > > *expected_value* > > 64 > > 512 > > 59.608 > > 64 > > 2048 > > 47.73 > > > > For the testbed in UNH, it=E2=80=99s a 2.1Ghz CPU server, so the expected= number > should be > > NNT: > > *pkt_size* > > *trd/rxd* > > *expected_value* > > 64 > > 512 > > 52.562 / 2.5 * 2.1=3D44.152 > > 64 > > 2048 > > 41.439 / 2.5 * 2.1=3D34.809 > > > > FVL: > > *pkt_size* > > *trd/rxd* > > *expected_value* > > 64 > > 512 > > 59.608 / 2.5 * 2.1=3D50.071 > > 64 > > 2048 > > 47.73 / 2.5 * 2.1=3D40.093 > > > > > > > > Regards, > > Ma,lihong > > > > *From:* Brandon Lo [mailto:blo@iol.unh.edu] > *Sent:* Tuesday, March 31, 2020 9:42 PM > *To:* Chen, Zhaoyan > *Cc:* David Marchand ; dpdklab@iol.unh.edu; > Lincoln Lavoie ; Thomas Monjalon < > thomas@monjalon.net>; ci@dpdk.org; Tu, Lijuan ; Xu, > Qian Q ; Ma, LihongX ; Zhang, > XuemingX ; O'Driscoll, Tim < > tim.odriscoll@intel.com> > *Subject:* Re: [dpdklab] Re: [dpdk-ci] Intel performance test is failing > > > > Hi Zhaoyan, > > > > To make changes to either Intel machine, please reboot using the command > "reboot_to_rw" as root to reboot the machine into read/write mode. > > This command will also disable any testing on the machine. > > > > To re-enable the machine, please run "reboot_to_ro" as root, and it will > save all of the changes that you've made and re-enable testing on the > machine. > > I recommend rebooting using either "reboot_to_rw" or "reboot_to_ro" > instead of the normal "reboot" while you're making changes. > > > > After you're done, please let me know. I'll have to manually run a test > and update the baseline using our internal CI. > > > > Thank you > > > > On Mon, Mar 30, 2020 at 12:43 AM Chen, Zhaoyan > wrote: > > Hi, Brandon, > > > > Please let me know how to make change to this reset machine. > (ip/access...) and disable it. > > > > After that please help to change the baseline. > > > > > > *Regards,* > > *Zhaoyan Chen* > > > > *From:* Brandon Lo > *Sent:* Thursday, March 26, 2020 11:39 PM > *To:* Chen, Zhaoyan > *Cc:* David Marchand ; dpdklab@iol.unh.edu; > Lincoln Lavoie ; Thomas Monjalon < > thomas@monjalon.net>; ci@dpdk.org; Tu, Lijuan ; Xu, > Qian Q ; Ma, LihongX ; Zhang, > XuemingX ; O'Driscoll, Tim < > tim.odriscoll@intel.com> > *Subject:* Re: [dpdklab] Re: [dpdk-ci] Intel performance test is failing > > > > Hi Zhaoyan, > > > > Currently, we have a system in place that resets any changes made while > testing is enabled for a machine. > > If you would like, I can disable testing and allow you to make permanent > changes. > > > > I can also reset the baseline of Intel 10G test performance once you make > these changes. > > Please let me know if you would like to make permanent changes on the > Intel 10G so I can disable it for you. > > > > Thanks > > > > On Wed, Mar 25, 2020 at 12:59 AM Chen, Zhaoyan > wrote: > > Thanks. Brandon. > > > > That=E2=80=99s good. We have made changed on 10G testbed. > > > > I monitored the several execution results; I found the results of 10G > always has -0.9%~-1.x% gap against expected number. So it could lead to s= ee > sometime failures..+-1% I suggest adjusting the expected number. I don=E2= =80=99t > know where the expected number is from? as I know it a dynamic number? > depends on baseline.. Please help to clarify, thanks. > > > > > > Thanks. > > > > *Regards,* > > *Zhaoyan Chen* > > > > *From:* Brandon Lo > *Sent:* Tuesday, March 24, 2020 9:31 PM > *To:* Chen, Zhaoyan > *Cc:* David Marchand ; dpdklab@iol.unh.edu; > Lincoln Lavoie ; Thomas Monjalon < > thomas@monjalon.net>; ci@dpdk.org; Tu, Lijuan ; Xu, > Qian Q ; Ma, LihongX ; Zhang, > XuemingX > *Subject:* Re: [dpdklab] Re: [dpdk-ci] Intel performance test is failing > > > > Hi Zhaoyan, > > > > I have enabled the 10G Intel machine for testing. > > If you would like to make any more changes, please let me know so I can > perform the necessary steps to prepare the machine for changes. > > Please feel free to let me know if you need anything. > > > > Thank you > > > > On Sun, Mar 22, 2020 at 9:58 PM Chen, Zhaoyan > wrote: > > Hi, Brandon, > > > > For 10G, please enable it. our code is at original path > */opt/test-harness/dts.* > > > > For 40G, please keep running. and see if any issue. But, anyway, we have > modified the DTS code at /opt/test-harness/dts-new-suite. If we met same > problem, then use this new DTS instead. > > > > Thanks a lot > > > > *Regards,* > > *Zhaoyan Chen* > > > > *From:* Brandon Lo > *Sent:* Saturday, March 21, 2020 1:49 AM > *To:* Chen, Zhaoyan > *Cc:* David Marchand ; dpdklab@iol.unh.edu; > Lincoln Lavoie ; Thomas Monjalon < > thomas@monjalon.net>; ci@dpdk.org; Tu, Lijuan ; Xu, > Qian Q ; Ma, LihongX ; Zhang, > XuemingX > *Subject:* Re: [dpdklab] Re: [dpdk-ci] Intel performance test is failing > > > > Hi Zhaoyan, > > > > Currently, the 40G machine is stable enough to be put on production > dashboard to run tests which may cause Trex to be killed. > > Should I disable the 40G Intel machine for you to make changes? > > > > Also, just for confirmation: on the 10G machine, is the folder that you > are using for the testing located in */opt/test-harness/dts-2020-3-4, o*r > are you still using the one in the standard */opt/test-harness/dts* > folder? > > > > If everything is ok, I will enable the 10G machine for production testing= . > > > > Thank you very much > > > > On Thu, Mar 19, 2020 at 9:36 PM Chen, Zhaoyan > wrote: > > Brandon, > > > > We worked out a workaround on Intel testbeds. NNT(10G) and FVL(40G). Coul= d > you please help to recover them? > > > > But, for FVL(40G) testbed, we met some problems, could you please help t= o > check before recover it > > - Sometime 1G hugepage will be changed to 2Mhugepage > automatically...we have to restart the system > - When we debugging on the testbed, found that Trex was killed by some > one(app).. > > Please help to check if any other program running on the testbed. > > > > Thanks a lot. > > > > > > > > *Regards,* > > *Zhaoyan Chen* > > > > *From:* Chen, Zhaoyan > *Sent:* Wednesday, March 18, 2020 9:04 PM > *To:* Brandon Lo > *Cc:* David Marchand ; dpdklab@iol.unh.edu; > Lincoln Lavoie ; Thomas Monjalon < > thomas@monjalon.net>; ci@dpdk.org; Tu, Lijuan ; Xu, > Qian Q ; Chen, Zhaoyan > *Subject:* RE: [dpdklab] Re: [dpdk-ci] Intel performance test is failing > > > > Brandon, we almost made a workaround. > > > > Maybe tomorrow, you could recover Intel=E2=80=99s testbed. I will let you= know > soon. > > > > > > > > *Regards,* > > *Zhaoyan Chen* > > > > *From:* Brandon Lo > *Sent:* Wednesday, March 18, 2020 3:34 AM > *To:* Chen, Zhaoyan > *Cc:* David Marchand ; dpdklab@iol.unh.edu; > Lincoln Lavoie ; Thomas Monjalon < > thomas@monjalon.net>; ci@dpdk.org; Tu, Lijuan ; Xu, > Qian Q > *Subject:* Re: [dpdklab] Re: [dpdk-ci] Intel performance test is failing > > > > Hi Zhaoyan, > > > > Have you finished making changes on the Intel machine? > > I will turn on the machine on March 3rd for testing if you do not have an= y > issues with it. > > Please let me know if you need anything else. > > > > Thanks > > > > On Tue, Mar 10, 2020 at 10:13 PM Chen, Zhaoyan > wrote: > > Hi, Brandon, > > > > Yes, it=E2=80=99s a wired issue. And it also mixed our DTS upgrading and = Trex > upgrading. > > So we are reviewing our DTS script, different Trex version, and CI callin= g > procedure. > > > > Anyway, we are focusing on this task recently, any update will let you > know. > > > > Thanks. > > > > *Regards,* > > *Zhaoyan Chen* > > > > *From:* Brandon Lo > *Sent:* Tuesday, March 10, 2020 10:46 PM > *To:* David Marchand > *Cc:* Chen, Zhaoyan ; dpdklab@iol.unh.edu; > Lincoln Lavoie ; Thomas Monjalon < > thomas@monjalon.net>; ci@dpdk.org; Tu, Lijuan ; Xu, > Qian Q > *Subject:* Re: [dpdklab] Re: [dpdk-ci] Intel performance test is failing > > > > Hi Zhaoyan, > > > > How is the current status of the Intel 82599ES? > > Were there any configuration changes made to fix performance issues? > > > > Thanks > > > > On Tue, Mar 10, 2020 at 9:11 AM Brandon Lo wrote: > > Hi David, > > > > This was just a weird issue with the packet generator not cleaning itself > after a test fast enough before another test. > > I'll rerun the tests that were affected and keep an eye out to see if it'= s > stable enough to be put back online. > > > > Thanks > > > > On Tue, Mar 10, 2020 at 5:33 AM David Marchand > wrote: > > On Tue, Mar 3, 2020 at 3:14 PM Brandon Lo wrote: > > > > Hi David and Zhaoyan, > > > > > > Yes, those results are related to the Intel machine; I have disabled > testing for the Intel testbed. > > > > The 82599ES machine is now available for ssh and modifications. > > Any news about this? > > I received a failure on a patch of mine (changing macros in a ARM header)= . > https://lab.dpdk.org/results/dashboard/patchsets/9900/ > > But this time, it is with the 40G Intel nic test. > > -- > David Marchand > > > > > -- > > Brandon Lo > > UNH InterOperability Laboratory > > 21 Madbury Rd, Suite 100, Durham, NH 03824 > > blo@iol.unh.edu > > www.iol.unh.edu > > > > > -- > > Brandon Lo > > UNH InterOperability Laboratory > > 21 Madbury Rd, Suite 100, Durham, NH 03824 > > blo@iol.unh.edu > > www.iol.unh.edu > > > > > -- > > Brandon Lo > > UNH InterOperability Laboratory > > 21 Madbury Rd, Suite 100, Durham, NH 03824 > > blo@iol.unh.edu > > www.iol.unh.edu > > > > > -- > > Brandon Lo > > UNH InterOperability Laboratory > > 21 Madbury Rd, Suite 100, Durham, NH 03824 > > blo@iol.unh.edu > > www.iol.unh.edu > > > > > -- > > Brandon Lo > > UNH InterOperability Laboratory > > 21 Madbury Rd, Suite 100, Durham, NH 03824 > > blo@iol.unh.edu > > www.iol.unh.edu > > > > > -- > > Brandon Lo > > UNH InterOperability Laboratory > > 21 Madbury Rd, Suite 100, Durham, NH 03824 > > blo@iol.unh.edu > > www.iol.unh.edu > > > > > -- > > Brandon Lo > > UNH InterOperability Laboratory > > 21 Madbury Rd, Suite 100, Durham, NH 03824 > > blo@iol.unh.edu > > www.iol.unh.edu > > > > > -- > > Brandon Lo > > UNH InterOperability Laboratory > > 21 Madbury Rd, Suite 100, Durham, NH 03824 > > blo@iol.unh.edu > > www.iol.unh.edu > > > > > -- > > Brandon Lo > > UNH InterOperability Laboratory > > 21 Madbury Rd, Suite 100, Durham, NH 03824 > > blo@iol.unh.edu > > www.iol.unh.edu > --=20 Brandon Lo UNH InterOperability Laboratory 21 Madbury Rd, Suite 100, Durham, NH 03824 blo@iol.unh.edu www.iol.unh.edu --000000000000b3f92405a369c0da Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
Hi Lihong,

I saw your changes and appli= ed them manually.
This involves me taking the machine down for ma= intenance on our backend, and then doing a normal `reboot`.

<= /div>
Now when I do `cat /proc/cmdline` it shows:
`BOOT_IMAGE= =3D/boot/vmlinuz-4.15.0-55-generic root=3DUUID=3D3801030b-237d-428e-9e67-d8= 1e12f16308 ro quiet splash hugepagesz=3D1G hugepages=3D40 default_hugepages= z=3D1G isolcpus=3D1-21,49-69,24-37,72-85 intel_iommu=3Don iommu=3Dpt nohz_f= ull=3D1-21,49-69,24-37,72-85 rcu_nocbs=3D1-21,49-69,24-37,72-85 intel_pstat= e=3Ddisable nmi_watchdog=3D0 audit=3D0 nosoftlockup processor.max_cstate=3D= 1 intel_idle.max_cstate=3D1 hpet=3Ddisable mce=3Doff tsc=3Dreliable numa_ba= lancing=3Ddisable vt.handoff=3D1`

Which is wh= at I think we wanted to achieve.
I have now done the `reboot_to_r= o` command and it should be working fine for testing.

<= div>Thanks,
Brandon


On Wed, Apr 15, 202= 0 at 11:40 PM Ma, LihongX <lihon= gx.ma@intel.com> wrote:

Hi, Brandon

=C2=A0

I use the cmd =E2=80=98reboot_to_rw=E2=80=99 to restart server, and e= dit the file =E2=80=98/etc/default/grub=E2=80=99 to reset the isolation cpus,

=C2=A0

Changes the field =E2=80=98isolcpus=3D1-48= =C2=A0 nohz_full=3D1-48=C2=A0 rcu_nocbs=3D1-48=E2=80=99 to

=E2=80=98isolcpus=3D1-21,49-69,24-37,72-85 n= ohz_full=3D1-21,49-69,24-37,72-85 rcu_nocbs=3D1-21,49-69,24-37,72-85=E2=80= =99

=C2=A0

Detail as below:

GRUB_CMDLINE_LINUX_DEFAULT=3D"quiet spl= ash hugepagesz=3D1G hugepages=3D40 default_hugepagesz=3D1G isolcpus=3D1-21,= 49-69,24-37,72-85 intel_iommu=3Don iommu=3Dpt nohz_full=3D1-21,49-69,24-37,= 72-85 rcu_nocbs=3D1-21,49-69,24-37,72-85 intel_pstate=3Ddisable nmi_watchdog=3D0= audit=3D0 nosoftlockup processor.max_cstate=3D1 intel_idle.max_cstate=3D1 = hpet=3Ddisable mce=3Doff tsc=3Dreliable numa_balancing=3Ddisable"

=C2=A0

Then use cmd: update-grub to make the config= uration effective.

Then reboot server use =E2=80=98reboot_to_ro= =E2=80=99, but I can=E2=80=99t find the change in cmdline ( cat /proc/cmdli= ne).

=C2=A0

Can you help me to check it?

=C2=A0

Thanks

Lihong

=C2=A0

From: Brandon Lo [mailto:blo@iol.unh.edu]
Sent: Thursday, April 16, 2020 3:31 AM
To: Ma, LihongX <lihongx.ma@intel.com>
Cc: Chen, Zhaoyan <zhaoyan.chen@intel.com>; David Marchand <david.marchand@redhat.= com>; dpdkl= ab@iol.unh.edu; Lincoln Lavoie <lylavoie@iol.unh.edu>; Thomas Monjalon <thomas@monjalon.net>; ci@dpdk.org; T= u, Lijuan <liju= an.tu@intel.com>; Xu, Qian Q <qian.q.xu@intel.com>; Zhang, XuemingX <xuemingx.zhang@intel.com>; O'Driscoll, Tim <tim.odriscoll@intel.c= om>
Subject: Re: [dpdklab] Re: [dpdk-ci] Intel performance test is faili= ng

=C2=A0

Hi Lihong,

=C2=A0

I think any time is fine to make these changes.

=C2=A0

Please use the 'reboot_to_rw' command once y= ou have logged on, this will make sure your changes are saved.

It will also disable testing momentarily while you m= ake your changes.

=C2=A0

Once you're finished, you can reboot it with = 9;reboot_to_ro'.

Please let me know when you're done so I can mak= e sure everything is working as intended.

We could also do this change for you if needed.

=C2=A0

Thanks,

Brandon

=C2=A0

On Wed, Apr 15, 2020 at 5:39 AM Ma, LihongX <lihongx.ma@intel.com<= /a>> wrote:

Hi, Brandon

=C2=A0

I find=C2=A0 the grub configuration of isolation cpu miss t= he logic cores which at some thread.

=C2=A0

For example:

If the server cpus layout as below, and want to config the = isolation cpu from 1-20

The config of isolation should is =E2=80=98isolcpus=3D1-20,= 49-68=E2=80=99

=C2=A0

3D"cid:1717f4fa8006917eb1"

=C2=A0

So, I want to change the grub configuration of the isolatio= n cpus.

From =E2=80=98isolcpus=3D1-48=E2=80=99 change to =E2=80=98i= solcpus=3D1-21,49-68,24-37,72-85=E2=80=99

=C2=A0

Can you help me check which time is suite to do this change= ?

=C2=A0

Regards,

Ma,lihong

=C2=A0

From: Brandon Lo [mailto:blo@iol.unh.edu]
Sent: Friday, April 3, 2020 2:39 AM
To: Ma, LihongX <
lihongx.ma@intel.com>
Cc: Chen, Zhaoyan <
zhaoyan.chen@intel.com>; David Marchand <davi= d.marchand@redhat.com>; dpdklab@iol.unh.edu; Linco= ln Lavoie <lylavoie@= iol.unh.edu>; Thomas Monjalon <t= homas@monjalon.net>; ci@dpdk.org; Tu, Lijuan <lijuan.tu@intel.com= >; Xu, Qian Q <qian.q.x= u@intel.com>; Zhang, XuemingX <xuemingx.zhang@intel.com>; O'Driscoll, Tim <tim.odriscoll@intel.com>
Subject: Re: [dpdklab] Re: [dpdk-ci] Intel performance test is faili= ng

=C2=A0

Hi Lihong,

=C2=A0

I have changed the baselines to reflect the new expe= cted values.

The=C2=A0performance tests should work as expected a= nd=C2=A0pass.

=C2=A0

We will email again in the future if we come across = any problems.

Feel free to email us as well if you would like to m= ake any other changes.

=C2=A0

Thank you for all your help

=C2=A0

On Wed, Apr 1, 2020 at 2:00 AM Ma, LihongX <lihongx.ma@intel.com> wrote:

Hi, Brandon

Thanks for you recommends, I have done the c= hanges.

As the throughput =C2=A0value of nic_single_= core is proportional to the cpu frequency.

I recommend you can change the baseline acco= rding to our report system.

=C2=A0

On the our 2.50GHz system, the baseline valu= e as below:

NNT:

pkt_size

trd/rxd

expected_value

6= 4

5= 12

5= 2.562

6= 4

2= 048

4= 1.439

=C2=A0

FVL:

pkt_size

trd/rxd

expected_value

6= 4

5= 12

5= 9.608

6= 4

2= 048

4= 7.73

=C2=A0

For the testbed in UNH, it= =E2=80=99s a 2.1Ghz CPU server, so the expected number should be

NNT:<= /p>

pkt_size

trd/rxd

expected_value

6= 4

5= 12

5= 2.562 / 2.5 * 2.1=3D44.152

6= 4

2= 048

4= 1.439 / 2.5 * 2.1=3D34.809

=C2=A0

FVL:<= /p>

pkt_size

trd/rxd

expected_value

6= 4

5= 12

5= 9.608 / 2.5 * 2.1=3D50.071

6= 4

2= 048

4= 7.73 / 2.5 * 2.1=3D40.093

=C2=A0

=C2=A0

=C2=A0

Regards,

Ma,lihong

=C2=A0

From: Brandon Lo [mailto:blo@iol.unh.edu]
Sent: Tuesday, March 31, 2020 9:42 PM
To: Chen, Zhaoyan <
zhaoyan.chen@intel.com>
Cc: David Marchand <
david.marchand@redhat.com>; dpdklab@iol.unh.edu; Linco= ln Lavoie <lylavoie@= iol.unh.edu>; Thomas Monjalon <t= homas@monjalon.net>; ci@dpdk.org; Tu, Lijuan <lijuan.tu@intel.com= >; Xu, Qian Q <qian.q.x= u@intel.com>; Ma, LihongX <lihongx.ma@intel.com>; Zhang, XuemingX <xuemingx.zhang@intel.com>; O'Driscoll, Tim <tim.odrisco= ll@intel.com>
Subject: Re: [dpdklab] Re: [dpdk-ci] Intel performance test is faili= ng

=C2=A0

Hi Zhaoyan,

=C2=A0

To make changes to either Intel machine, please rebo= ot using the command "reboot_to_rw" as root to reboot the machine= into read/write mode.

This command will also disable any testing on the ma= chine.

=C2=A0

To re-enable the machine, please run "reboot_to= _ro" as root, and it will save all of the changes that you've made= and re-enable testing on the machine.

I recommend rebooting using either "reboot_to_r= w" or "reboot_to_ro" instead of the normal "reboot"= ; while you're making changes.

=C2=A0

After you're done, please let me know. I'll = have to manually run a test and update=C2=A0the baseline using our internal= CI.

=C2=A0

Thank you

=C2=A0

On Mon, Mar 30, 2020 at 12:43 AM Chen, Zhaoyan <<= a href=3D"mailto:zhaoyan.chen@intel.com" target=3D"_blank">zhaoyan.chen@int= el.com> wrote:

Hi, Brandon,

=C2=A0

Please let me know how to make change to = this reset machine. (ip/access...) and disable it.

=C2=A0

After that please help to change the base= line.

=C2=A0

=C2=A0

Regards,

Zhaoyan Chen<= /p>

=C2=A0

From: Brandon Lo <blo@iol.unh.edu>
Sent: Thursday, March 26, 2020 11:39 PM
To: Chen, Zhaoyan <zhaoyan.chen@intel.com>
Cc: David Marchand <david.marchand@redhat.com>; dpdklab@iol.unh.ed= u; Lincoln Lavoie <lylavoie@iol.unh.edu>; Thomas Monjalon <thomas@monjalon.net>; ci@dpdk.org; Tu, Lijua= n <lijuan.tu@in= tel.com>; Xu, Qian Q <qian.q.xu@intel.com>; Ma, LihongX <lihongx.ma@intel.com>; Zhang, XuemingX <xuemingx.zhang@intel.com>; O'Driscoll, Tim <tim.odriscoll@intel.c= om>
Subject: Re: [dpdklab] Re: [dpdk-ci] Intel performance test is faili= ng

=C2=A0

Hi Zhaoyan,

=C2=A0

Currently, we have a system in place that resets any= changes made while testing is enabled for a machine.

If you would like, I can disable testing and allow y= ou to make permanent changes.

=C2=A0

I can also reset the baseline of Intel 10G test perf= ormance once you make these changes.

Please let me know if you would like to make permane= nt changes on the Intel 10G so I can disable it for you.

=C2=A0

Thanks

=C2=A0

On Wed, Mar 25, 2020 at 12:59 AM Chen, Zhaoyan <<= a href=3D"mailto:zhaoyan.chen@intel.com" target=3D"_blank">zhaoyan.chen@int= el.com> wrote:

Thanks. Brandon.

=C2=A0

That=E2=80=99s good. We have made changed= on 10G testbed.

=C2=A0

I monitored the several execution results= ; I found the results of 10G always has -0.9%~-1.x% gap against expected number. So it could lead to see sometime failures..+-1% I suggest adjustin= g the expected number. I don=E2=80=99t know where the expected number is fr= om? as I know it a dynamic number? depends on baseline.. Please help to cla= rify, thanks.

=C2=A0

=C2=A0

Thanks.

=C2=A0

Regards,

Zhaoyan Chen<= /p>

=C2=A0

From: Brandon Lo <blo@iol.unh.edu>
Sent: Tuesday, March 24, 2020 9:31 PM
To: Chen, Zhaoyan <zhaoyan.chen@intel.com>
Cc: David Marchand <david.marchand@redhat.com>; dpdklab@iol.unh.ed= u; Lincoln Lavoie <lylavoie@iol.unh.edu>; Thomas Monjalon <thomas@monjalon.net>; ci@dpdk.org; Tu, Lijua= n <lijuan.tu@in= tel.com>; Xu, Qian Q <qian.q.xu@intel.com>; Ma, LihongX <lihongx.ma@intel.com>; Zhang, XuemingX <xuemingx.zhang@intel.com>
Subject: Re: [dpdklab] Re: [dpdk-ci] Intel performance test is faili= ng

=C2=A0

Hi Zhaoyan,

=C2=A0

I have enabled the 10G Intel machine for testing.=

If you would like to make any more changes, please l= et me know so I can perform the necessary steps to prepare the machine for = changes.

Please feel free to let me know if you need anything= .

=C2=A0

Thank you

=C2=A0

On Sun, Mar 22, 2020 at 9:58 PM Chen, Zhaoyan <zhaoyan.chen@inte= l.com> wrote:

Hi, Brandon,

=C2=A0

For 10G, please enable it. our code is at= original path /opt/test-harness/dts.

=C2=A0

For 40G, please keep running. and see if = any issue. But, anyway, we have modified the DTS code at /opt/test-harness/= dts-new-suite. If we met same problem, then use this new DTS instead.

=C2=A0

Thanks a lot=

=C2=A0

Regards,

Zhaoyan Chen<= /p>

=C2=A0

From: Brandon Lo <blo@iol.unh.edu>
Sent: Saturday, March 21, 2020 1:49 AM
To: Chen, Zhaoyan <zhaoyan.chen@intel.com>
Cc: David Marchand <david.marchand@redhat.com>; dpdklab@iol.unh.ed= u; Lincoln Lavoie <lylavoie@iol.unh.edu>; Thomas Monjalon <thomas@monjalon.net>; ci@dpdk.org; Tu, Lijua= n <lijuan.tu@in= tel.com>; Xu, Qian Q <qian.q.xu@intel.com>; Ma, LihongX <lihongx.ma@intel.com>; Zhang, XuemingX <xuemingx.zhang@intel.com>
Subject: Re: [dpdklab] Re: [dpdk-ci] Intel performance test is faili= ng

=C2=A0

Hi Zhaoyan,

=C2=A0

Currently, the 40G machine is stable enough to be pu= t on production dashboard to run tests which may cause Trex to be killed.

Should I disable the 40G Intel machine for you to ma= ke changes?

=C2=A0

Also, just for confirmation: on the 10G machine, is = the folder that you are using for the testing located in=C2=A0/opt/test-= harness/dts-2020-3-4, or are you still using the one in the standard=C2=A0/opt/test-harness/dts folder?

=C2=A0

If everything is ok, I will enable the 10G machine f= or production testing.

=C2=A0

Thank you very much

=C2=A0

On Thu, Mar 19, 2020 at 9:36 PM Chen, Zhaoyan <zhaoyan.chen@inte= l.com> wrote:

Brandon,

=C2=A0

We worked out a workaround on Intel testb= eds. NNT(10G) and FVL(40G). Could you please help to recover them?

=C2=A0

But, for FVL(40G) testbed, =C2=A0we met s= ome problems, could you please help to check before recover it

  • Sometime 1= G hugepage will be changed to 2Mhugepage automatically...we have to restart= the system
  • When we de= bugging on the testbed, found that Trex was killed by some one(app)..

Please help to check if any other program= running on the testbed.

=C2=A0

Thanks a lot.

=C2=A0

=C2=A0

=C2=A0

Regards,

Zhaoyan Chen<= /p>

=C2=A0

From: Chen, Zhaoyan <zhaoyan.chen@intel.com>
Sent: Wednesday, March 18, 2020 9:04 PM
To: Brandon Lo <blo@iol.unh.edu>
Cc: David Marchand <david.marchand@redhat.com>; dpdklab@iol.unh.ed= u; Lincoln Lavoie <lylavoie@iol.unh.edu>; Thomas Monjalon <thomas@monjalon.net>; ci@dpdk.org; Tu, Lijua= n <lijuan.tu@in= tel.com>; Xu, Qian Q <qian.q.xu@intel.com>; Chen, Zhaoyan <zhaoyan.ch= en@intel.com>
Subject: RE: [dpdklab] Re: [dpdk-ci] Intel performance test is faili= ng

=C2=A0

Brandon, we almost made a workaround.

=C2=A0

Maybe tomorrow, you could recover Intel= =E2=80=99s testbed. I will let you know soon.

=C2=A0

=C2=A0

=C2=A0

Regards,

Zhaoyan Chen<= /p>

=C2=A0

From: Brandon Lo <blo@iol.unh.edu>
Sent: Wednesday, March 18, 2020 3:34 AM
To: Chen, Zhaoyan <zhaoyan.chen@intel.com>
Cc: David Marchand <david.marchand@redhat.com>; dpdklab@iol.unh.ed= u; Lincoln Lavoie <lylavoie@iol.unh.edu>; Thomas Monjalon <thomas@monjalon.net>; ci@dpdk.org; Tu, Lijua= n <lijuan.tu@in= tel.com>; Xu, Qian Q <qian.q.xu@intel.com>
Subject: Re: [dpdklab] Re: [dpdk-ci] Intel performance test is faili= ng

=C2=A0

Hi Zhaoyan,

=C2=A0

Have you finished making changes on the Intel machin= e?

I will turn on the machine on March 3rd for testing = if you do not have any issues with it.

Please let me know if you need anything else.=

=C2=A0

Thanks

=C2=A0

On Tue, Mar 10, 2020 at 10:13 PM Chen, Zhaoyan <<= a href=3D"mailto:zhaoyan.chen@intel.com" target=3D"_blank">zhaoyan.chen@int= el.com> wrote:

Hi, Brandon,

=C2=A0

Yes, it=E2=80=99s a wired issue. And it a= lso mixed our DTS upgrading and Trex upgrading.

So we are reviewing our DTS script, diffe= rent Trex version, and CI calling procedure.

=C2=A0

Anyway, we are focusing on= this task recently, any update will let you know.

=C2=A0

Thanks.

=C2=A0

Regards,

Zhaoyan Chen<= /p>

=C2=A0

From: Brandon Lo <blo@iol.unh.edu>
Sent: Tuesday, March 10, 2020 10:46 PM
To: David Marchand <david.marchand@redhat.com>
Cc: Chen, Zhaoyan <zhaoyan.chen@intel.com>; dpdklab@iol.unh.ed= u; Lincoln Lavoie <lylavoie@iol.unh.edu>; Thomas Monjalon <thomas@monjalon.net>; ci@dpdk.org; Tu, Lijua= n <lijuan.tu@in= tel.com>; Xu, Qian Q <qian.q.xu@intel.com>
Subject: Re: [dpdklab] Re: [dpdk-ci] Intel performance test is faili= ng

=C2=A0

Hi Zhaoyan,

=C2=A0

How is the current status of the Intel 82599ES?

Were there any configuration changes made to fix per= formance issues?

=C2=A0

Thanks

=C2=A0

On Tue, Mar 10, 2020 at 9:11 AM Brandon Lo <blo@iol.unh.edu> wro= te:

Hi David,

=C2=A0

This was just a weird issue with the packet generato= r not cleaning itself after a test fast enough before another test.<= u>

I'll rerun the tests that were affected and keep= an eye out to see if it's stable enough to be put back online.<= u>

=C2=A0

Thanks

=C2=A0

On Tue, Mar 10, 2020 at 5:33 AM David Marchand <<= a href=3D"mailto:david.marchand@redhat.com" target=3D"_blank">david.marchan= d@redhat.com> wrote:

On Tue, Mar 3, 2020 at = 3:14 PM Brandon Lo <blo@iol.unh.edu> wrote:
>
> Hi David and Zhaoyan,
>
>
> Yes, those results are related to the Intel machine; I have disabled t= esting for the Intel testbed.
>
> The 82599ES machine is now available for ssh and modifications.

Any news about this?

I received a failure on a patch of mine (changing macros in a ARM header).<= br> https://lab.dpdk.org/results/dashboard/patchsets/9900/

But this time, it is with the 40G Intel nic test.

--
David Marchand


=C2=A0

--

Brandon Lo

UNH InterOperability Laboratory=

21 Madbury Rd, Suite 100, Durham, NH 0382= 4

= blo@iol.unh.edu

www.iol.unh.edu


=C2=A0

--

Brandon Lo

UNH InterOperability Laboratory=

21 Madbury Rd, Suite 100, Durham, NH 0382= 4

= blo@iol.unh.edu

www.iol.unh.edu


=C2=A0

--

Brandon Lo

UNH InterOperability Laboratory=

21 Madbury Rd, Suite 100, Durham, NH 0382= 4

= blo@iol.unh.edu

www.iol.unh.edu


=C2=A0

--

Brandon Lo

UNH InterOperability Laboratory=

21 Madbury Rd, Suite 100, Durham, NH 0382= 4

= blo@iol.unh.edu

www.iol.unh.edu


=C2=A0

--

Brandon Lo

UNH InterOperability Laboratory=

21 Madbury Rd, Suite 100, Durham, NH 0382= 4

= blo@iol.unh.edu

www.iol.unh.edu


=C2=A0

--

Brandon Lo

UNH InterOperability Laboratory=

21 Madbury Rd, Suite 100, Durham, NH 0382= 4

= blo@iol.unh.edu

www.iol.unh.edu


=C2=A0

--

Brandon Lo

UNH InterOperability Laboratory=

21 Madbury Rd, Suite 100, Durham, NH 0382= 4

= blo@iol.unh.edu

www.iol.unh.edu


=C2=A0

--

Brandon Lo

UNH InterOperability Laboratory=

21 Madbury Rd, Suite 100, Durham, NH 0382= 4

= blo@iol.unh.edu

www.iol.unh.edu


=C2=A0

--

Brandon Lo

UNH InterOperability Laboratory=

21 Madbury Rd, Suite 100, Durham, NH 0382= 4

= blo@iol.unh.edu

www.iol.unh.edu



--

Brandon Lo

UNH = InterOperability Laboratory

21 Madbury Rd, Suite 100, Durham, NH 03824

blo@iol.unh.edu

<= a href=3D"http://www.iol.unh.edu/" target=3D"_blank">www.iol.unh.edu

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