From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) by dpdk.org (Postfix) with ESMTP id 1F1731B107 for ; Fri, 12 Oct 2018 04:25:25 +0200 (CEST) Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w9C2PKe8063726 for ; Thu, 11 Oct 2018 22:25:24 -0400 Received: from e06smtp05.uk.ibm.com (e06smtp05.uk.ibm.com [195.75.94.101]) by mx0b-001b2d01.pphosted.com with ESMTP id 2n2hcmttfv-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 11 Oct 2018 22:25:23 -0400 Received: from localhost by e06smtp05.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Fri, 12 Oct 2018 03:24:21 +0100 Received: from b06cxnps4075.portsmouth.uk.ibm.com (9.149.109.197) by e06smtp05.uk.ibm.com (192.168.101.135) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 12 Oct 2018 03:24:19 +0100 Received: from d06av23.portsmouth.uk.ibm.com (d06av23.portsmouth.uk.ibm.com [9.149.105.59]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w9C2OInq3342828 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 12 Oct 2018 02:24:18 GMT Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D58E9A4040; Fri, 12 Oct 2018 05:23:50 +0100 (BST) Received: from d06av23.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1ADC2A4053; Fri, 12 Oct 2018 05:23:49 +0100 (BST) Received: from DESKTOP7JL9IS1 (unknown [9.181.88.64]) by d06av23.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 12 Oct 2018 05:23:48 +0100 (BST) From: "Chao Zhu" To: "'Jerin Jacob'" Cc: , , , References: <20181007061857.29451-1-jerin.jacob@caviumnetworks.com> In-Reply-To: <20181007061857.29451-1-jerin.jacob@caviumnetworks.com> Date: Fri, 12 Oct 2018 10:24:16 +0800 MIME-Version: 1.0 Content-Type: text/plain; charset="gb2312" Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 16.0 Thread-Index: AQL0I56IlqWVozW9uU5+VJ3Fqn6S3qLbXe8A Content-Language: zh-cn X-TM-AS-GCONF: 00 x-cbid: 18101202-0020-0000-0000-000002D2F9B9 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18101202-0021-0000-0000-0000212176BF Message-Id: <000001d461d2$adc87910$09596b30$@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-10-12_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1810120022 Subject: [dpdk-dev] =?gb2312?b?tPC4tDogIFtQQVRDSF0gZWFsL3BwYzY0OiBhZGQg?= =?gb2312?b?c3VwcG9ydCBmb3IgcnRlIHBhdXNl?= X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 12 Oct 2018 02:25:25 -0000 -----=D3=CA=BC=FE=D4=AD=BC=FE----- =B7=A2=BC=FE=C8=CB: Jerin Jacob =20 =B7=A2=CB=CD=CA=B1=BC=E4: 2018=C4=EA10=D4=C27=C8=D5 14:19 =CA=D5=BC=FE=C8=CB: Chao Zhu =B3=AD=CB=CD: dev@dpdk.org; thomas@monjalon.net; = gowrishankar.m@linux.vnet.ibm.com; ola.liljedahl@arm.com; Jerin Jacob =D6=F7=CC=E2: [dpdk-dev] [PATCH] eal/ppc64: add support for rte pause Add support for rte_pause() implementation for ppc64. Signed-off-by: Jerin Jacob --- The reference implementation for Linux's cpu_relax() for ppc64 is at https://elixir.bootlin.com/linux/latest/source/arch/powerpc/include/asm/p= roc essor.h#L440 --- lib/librte_eal/common/include/arch/ppc_64/rte_pause.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_pause.h b/lib/librte_eal/common/include/arch/ppc_64/rte_pause.h index 8bd835764..16e47ce22 100644 --- a/lib/librte_eal/common/include/arch/ppc_64/rte_pause.h +++ b/lib/librte_eal/common/include/arch/ppc_64/rte_pause.h @@ -9,10 +9,17 @@ extern "C" { #endif +#include "rte_atomic.h" + #include "generic/rte_pause.h" static inline void rte_pause(void) { + /* Set hardware multi-threading low priority */ + asm volatile("or 1,1,1"); + /* Set hardware multi-threading medium priority */ + asm volatile("or 2,2,2"); + rte_compiler_barrier(); } #ifdef __cplusplus --=20 2.19.0 Acked-by: Chao Zhu