Re: [dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597

[Tony Lu <zlu@ezchip.com>]

Hi, Arthas

Seems like something wrong with memseg, could you try with
" --hvx hugepagesz=1G --hvx hugepages=4" to boot Gx card? This
helps reserve hugepages for DPDK, and check there are still such errors.

With regard to MDE-4.3.3, please contact your local tech support.

Thanks
-Zhigang

>-----Original Message-----
>From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Arthas
>Sent: Wednesday, September 23, 2015 11:56 PM
>To: zlu; dev
>Subject: Re: [dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597
>
>Hi, ZhiGang,
>  Can you tell me where can download TileraMDE-4.3.3 package?  My tilegx
>tech supporter only send me TileraMDE-4.2.4 version!
>:)
>
>Thanks,
>  Arthas
>
>
>
>
>------------------ Original ------------------
>From:  "Arthas";<kangzy1982@qq.com>;
>Date:  Wed, Sep 23, 2015 06:41 PM
>To:  "zlu"<zlu@ezchip.com>; "dev"<dev@dpdk.org>;
>
>Subject:  Re: [dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597
>
>
>
>Hi, ZhiGang
>  I checked source code and debug it , found dpdk function rte_eth_tx_burst
>with tilegx return 0 and no other error.  Can I contact  you directly?
>Regards,
>  Arthas
>
>
>
>------------------ Original ------------------
>From:  "Arthas";<kangzy1982@qq.com>;
>Date:  Wed, Sep 23, 2015 06:35 PM
>To:  "zlu"<zlu@ezchip.com>; "dev"<dev@dpdk.org>;
>
>Subject:  Re: [dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597
>
>
>
>Hi, ZhiGang
>   My tilegx boot parameter is "tile-monitor --dev gxpci${1} --hv-bin-dir
>/tilegx/tile/hv-bin-dir424/ --hvx dataplane=1-64".
>and testpmd start parameter is
>tile-monitor  --dev gxpci0 --resume --upload testpmd  testpmd  --run
>-+-  ./testpmd   -c 0xffffffff -m 2048 -n 1 -r 1 --vdev xgbe1 --  --rx=1
--tx=2
>--forward-mode=txonly -a --port-topology=chained -+-
>
> but xgbe1 can't xmit any packet.
>This is my run log:
>
>EAL: Detected lcore 0 as core 0 on socket 0
>EAL: Detected lcore 1 as core 1 on socket 0
>EAL: Detected lcore 2 as core 2 on socket 0
>EAL: Detected lcore 3 as core 3 on socket 0
>EAL: Detected lcore 4 as core 4 on socket 0
>EAL: Detected lcore 5 as core 5 on socket 0
>EAL: Detected lcore 6 as core 6 on socket 0
>EAL: Detected lcore 7 as core 7 on socket 0
>EAL: Detected lcore 8 as core 8 on socket 0
>EAL: Detected lcore 9 as core 9 on socket 0
>EAL: Detected lcore 10 as core 10 on socket 0
>EAL: Detected lcore 11 as core 11 on socket 0
>EAL: Detected lcore 12 as core 12 on socket 0
>EAL: Detected lcore 13 as core 13 on socket 0
>EAL: Detected lcore 14 as core 14 on socket 0
>EAL: Detected lcore 15 as core 15 on socket 0
>EAL: Detected lcore 16 as core 16 on socket 0
>EAL: Detected lcore 17 as core 17 on socket 0
>EAL: Detected lcore 18 as core 18 on socket 0
>EAL: Detected lcore 19 as core 19 on socket 0
>EAL: Detected lcore 20 as core 20 on socket 0
>EAL: Detected lcore 21 as core 21 on socket 0
>EAL: Detected lcore 22 as core 22 on socket 0
>EAL: Detected lcore 23 as core 23 on socket 0
>EAL: Detected lcore 24 as core 24 on socket 0
>EAL: Detected lcore 25 as core 25 on socket 0
>EAL: Detected lcore 26 as core 26 on socket 0
>EAL: Detected lcore 27 as core 27 on socket 0
>EAL: Detected lcore 28 as core 28 on socket 0
>EAL: Detected lcore 29 as core 29 on socket 0
>EAL: Detected lcore 30 as core 30 on socket 0
>EAL: Detected lcore 31 as core 31 on socket 0
>EAL: Detected lcore 32 as core 32 on socket 0
>EAL: Detected lcore 33 as core 33 on socket 0
>EAL: Detected lcore 34 as core 34 on socket 0
>EAL: Detected lcore 35 as core 35 on socket 0
>EAL: Support maximum 36 logical core(s) by configuration.
>EAL: Detected 36 lcore(s)
>EAL: No free hugepages reported in hugepages-1024kB
>EAL: Setting up physically contiguous memory...
>EAL: Ask a virtual area of 0x16000000 bytes
>EAL: Virtual area found at 0x1ffd1000000 (size = 0x16000000)
>EAL: Ask a virtual area of 0x90000000 bytes
>EAL: Virtual area found at 0x1ff40000000 (size = 0x90000000)
>EAL: Ask a virtual area of 0x2000000 bytes
>EAL: Virtual area found at 0x1ff3d000000 (size = 0x2000000)
>EAL: Ask a virtual area of 0x10000000 bytes
>EAL: Virtual area found at 0x1ff2c000000 (size = 0x10000000)
>EAL: Ask a virtual area of 0x46000000 bytes
>EAL: Virtual area found at 0x1fee5000000 (size = 0x46000000)
>EAL: Ask a virtual area of 0x2000000 bytes
>EAL: Virtual area found at 0x1fee2000000 (size = 0x2000000)
>EAL: Requesting 128 pages of size 16MB from socket 0
>EAL: TSC frequency is ~1199999 KHz
>EAL: WARNING: cpu flags constant_tsc=no nonstop_tsc=no -> using unreliable
>clock cycles !
>EAL: Master lcore 0 is ready (tid=f7fa4690;cpuset=[0])
>PMD: mpipe init xgbe1
>PMD: xgbe1: Initialized mpipe device(mac ee:d1:53:72:82:5a).
>EAL: lcore 1 is ready (tid=eb04f060;cpuset=[1])
>EAL: lcore 2 is ready (tid=ea84f060;cpuset=[2])
>EAL: lcore 3 is ready (tid=ea04f060;cpuset=[3])
>EAL: lcore 4 is ready (tid=e984f060;cpuset=[4])
>EAL: lcore 5 is ready (tid=d0fff060;cpuset=[5])
>EAL: lcore 6 is ready (tid=d07ff060;cpuset=[6])
>EAL: lcore 7 is ready (tid=e904f060;cpuset=[7])
>EAL: lcore 8 is ready (tid=e884f060;cpuset=[8])
>EAL: lcore 9 is ready (tid=e804f060;cpuset=[9])
>EAL: lcore 10 is ready (tid=e784f060;cpuset=[10])
>EAL: lcore 11 is ready (tid=b3fff060;cpuset=[11])
>EAL: lcore 12 is ready (tid=b37ff060;cpuset=[12])
>EAL: lcore 13 is ready (tid=b2fff060;cpuset=[13])
>EAL: lcore 14 is ready (tid=b27ff060;cpuset=[14])
>EAL: lcore 15 is ready (tid=b1fff060;cpuset=[15])
>EAL: lcore 16 is ready (tid=b17ff060;cpuset=[16])
>EAL: lcore 17 is ready (tid=b0fff060;cpuset=[17])
>EAL: lcore 18 is ready (tid=2ffff060;cpuset=[18])
>EAL: lcore 19 is ready (tid=b07ff060;cpuset=[19])
>EAL: lcore 20 is ready (tid=abfff060;cpuset=[20])
>EAL: lcore 21 is ready (tid=ab7ff060;cpuset=[21])
>EAL: lcore 22 is ready (tid=aafff060;cpuset=[22])
>EAL: lcore 23 is ready (tid=aa7ff060;cpuset=[23])
>EAL: lcore 24 is ready (tid=2f7ff060;cpuset=[24])
>EAL: lcore 25 is ready (tid=2efff060;cpuset=[25])
>EAL: lcore 26 is ready (tid=2e7ff060;cpuset=[26])
>EAL: lcore 27 is ready (tid=2dfff060;cpuset=[27])
>EAL: lcore 28 is ready (tid=2d7ff060;cpuset=[28])
>EAL: lcore 29 is ready (tid=2cfff060;cpuset=[29])
>EAL: lcore 30 is ready (tid=2c7ff060;cpuset=[30])
>EAL: lcore 31 is ready (tid=f3fff060;cpuset=[31])
>Set txonly packet forwarding mode
>Auto-start selected
>Configuring Port 0 (socket 0)
>PMD: xgbe1: Could not register memseg @0x1ffd1000000, -1111.
>PMD: xgbe1: Could not register memseg @0x1ff40000000, -1111.
>PMD: xgbe1: Buffer stack memory 0x1ffd1c30000 - 0x1ffd1c8557f.
>PMD: xgbe1: eDMA ring memory 0x1ffd1c8a000 - 0x1ffd1c8bfff.
>PMD: xgbe1: iDMA ring 0 memory 0x1ffd1c86000 - 0x1ffd1c87fff.
>Port 0: EE:D1:53:72:82:5A
>Checking link statuses...
>Port 0 Link Up - speed 10000 Mbps - full-duplex
>Done
>No commandline core given, start packet forwarding
>  txonly packet forwarding - CRC stripping disabled - packets/burst=32
>  packet len=64 - nb packet segments=1
>  nb forwarding cores=1 - nb forwarding ports=1
>  RX queues=1 - RX desc=128 - RX free threshold=0
>  RX threshold registers: pthresh=0 hthresh=0 wthresh=0
>  TX queues=2 - TX desc=512 - TX free threshold=0
>  TX threshold registers: pthresh=0 hthresh=0 wthresh=0
>  TX RS bit threshold=0 - TXQ flags=0x0
>Press enter to exit
>
>
>and another tilegx card output:
>Command: run mpipe-stat xgbe1
>Link       Tx pkt          Tx bits   Rx pkt          Rx bits   Tx err
>Rx err
>---------------------------------------------------------------------------
-----
>xgbe1           0                0        0                0
>0        0
>
>
>
>Regards, Arthas
>
>
>------------------ Original ------------------
>From:  "zlu";<zlu@ezchip.com>;
>Date:  Wed, Sep 23, 2015 03:34 PM
>To:  "Arthas"<kangzy1982@qq.com>; "'dev'"<dev@dpdk.org>;
>
>Subject:  RE: [dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597
>
>
>
>Hi, Arthas
>
>Does testpmd run OK, and what is boot parameter you used to boot Tile-Gx?
>
>>-----Original Message-----
>>From: Arthas [mailto:kangzy1982@qq.com]
>>Sent: Wednesday, September 23, 2015 1:21 PM
>>To: dev
>>Cc: zlu
>>Subject: Re: [dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597
>>
>>and I wrote a sample RX example, got an other information.
>>
>>
>>PMD: xgbe1: Could not register memseg @0x1ffd2000000, -1111.
>>PMD: xgbe1: Could not register memseg @0x1ff41000000, -1111.
>>PMD: xgbe1: Could not register memseg @0x1ff3e000000, -1111.
>>PMD: xgbe1: Could not register memseg @0x1ff2d000000, -1111.
>>PMD: xgbe1: Could not register memseg @0x1fee6000000, -1111.
>>PMD: xgbe1: Could not register memseg @0x1fee3000000, -1111.
>>PMD: xgbe1: Buffer stack memory 0x1fee4b90000 - 0x1fee4be557f.
>>PMD: xgbe1: eDMA ring memory 0x1fee4bf0000 - 0x1fee4bf1fff.
>>PMD: xgbe1: iDMA ring 0 memory 0x1fee4bec000 - 0x1fee4bedfff.
>>
>>
>>
>>  Regards, Arthas
>>
>>------------------ Original ------------------
>>From:  "Arthas";<kangzy1982@qq.com>;
>>Date:  Wed, Sep 23, 2015 01:17 PM
>>To:  "dev"<dev@dpdk.org>;
>>Subject:  [dpdk-dev] DPDK v2.1.0 tilegx on TileraMDE-4.2.2.169597
>>
>>Hi, I'm working on tilegx platform.  and I wrote a sample dpdk trafgen for
>tilegx.
>>But I got a error with rte_mbuf rte_pktmbuf_append.
>>
>>PANIC in rte_mbuf_sanity_check():
>>bad phys addr
>>7: [/trafgen(_start+0x70) [0x100b308]]
>>6: [/lib/libc.so.6(__libc_start_main+0x200) [0x1fff7a6e4c8]]
>>5: [/trafgen(main+0x2148) [0x1017b78]]
>>4: [/trafgen(rte_pktmbuf_dump+0x58) [0x102c7a8]]
>>3: [/trafgen(rte_mbuf_sanity_check+0x1a8) [0x102c700]]
>>2: [/trafgen(__rte_panic+0xc0) [0x1091e80]]
>>1: [/trafgen(rte_dump_stack+0x40) [0x104cf00]]
>>
>>
>>DPDK compiled with CONFIG_RTE_LIBRTE_MBUF_DEBUG=y!
>>
>> Regards, Arthas