From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 950FB7260 for ; Sat, 13 Jan 2018 14:54:15 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Jan 2018 05:54:14 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,353,1511856000"; d="scan'208";a="9441256" Received: from fmsmsx106.amr.corp.intel.com ([10.18.124.204]) by fmsmga007.fm.intel.com with ESMTP; 13 Jan 2018 05:54:14 -0800 Received: from FMSMSX110.amr.corp.intel.com (10.18.116.10) by FMSMSX106.amr.corp.intel.com (10.18.124.204) with Microsoft SMTP Server (TLS) id 14.3.319.2; Sat, 13 Jan 2018 05:54:14 -0800 Received: from fmsmsx117.amr.corp.intel.com ([169.254.3.21]) by FMSMSX110.amr.corp.intel.com ([169.254.14.246]) with mapi id 14.03.0319.002; Sat, 13 Jan 2018 05:54:14 -0800 From: "Wiles, Keith" To: "Ananyev, Konstantin" CC: "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v2 1/2] test/test: introduce new test-case for rte_smp_mb() Thread-Index: AQHTeBW9pCLkbdfHHEqSRwx/5S52dqNyeMqA Date: Sat, 13 Jan 2018 13:54:13 +0000 Message-ID: <0241D7B7-A518-4A3A-AFE9-9D4A2829EE87@intel.com> References: <1512126771-27503-2-git-send-email-konstantin.ananyev@intel.com> <1513611253-8785-2-git-send-email-konstantin.ananyev@intel.com> In-Reply-To: <1513611253-8785-2-git-send-email-konstantin.ananyev@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.255.81.66] Content-Type: text/plain; charset="us-ascii" Content-ID: <7CA3A2902D9739458F9DC2029B8D39B5@intel.com> Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 1/2] test/test: introduce new test-case for rte_smp_mb() X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 13 Jan 2018 13:54:16 -0000 > On Dec 18, 2017, at 9:34 AM, Konstantin Ananyev wrote: >=20 > Simple functional test for rte_smp_mb() implementations. > Also when executed on a single lcore could be used as rough > estimation how many cycles particular implementation of rte_smp_mb() > might take. >=20 > Signed-off-by: Konstantin Ananyev > --- > test/test/Makefile | 1 + > test/test/test_mb.c | 315 +++++++++++++++++++++++++++++++++++++++++++++++= +++++ > 2 files changed, 316 insertions(+) > create mode 100644 test/test/test_mb.c >=20 > diff --git a/test/test/Makefile b/test/test/Makefile > index bb54c9808..3134283a8 100644 > --- a/test/test/Makefile > +++ b/test/test/Makefile > @@ -95,6 +95,7 @@ SRCS-y +=3D test_spinlock.c > SRCS-y +=3D test_memory.c > SRCS-y +=3D test_memzone.c > SRCS-y +=3D test_bitmap.c > +SRCS-y +=3D test_mb.c >=20 > SRCS-y +=3D test_ring.c > SRCS-y +=3D test_ring_perf.c > diff --git a/test/test/test_mb.c b/test/test/test_mb.c > new file mode 100644 > index 000000000..52c73fb6b > --- /dev/null > +++ b/test/test/test_mb.c > @@ -0,0 +1,315 @@ > +/*- > + * BSD LICENSE > + * > + * Copyright(c) 2010-2017 Intel Corporation. All rights reserved. > + * All rights reserved. > + * > + * Redistribution and use in source and binary forms, with or without > + * modification, are permitted provided that the following conditions > + * are met: > + * > + * * Redistributions of source code must retain the above copyright > + * notice, this list of conditions and the following disclaimer. > + * * Redistributions in binary form must reproduce the above copyrig= ht > + * notice, this list of conditions and the following disclaimer in > + * the documentation and/or other materials provided with the > + * distribution. > + * * Neither the name of Intel Corporation nor the names of its > + * contributors may be used to endorse or promote products derived > + * from this software without specific prior written permission. > + * > + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS > + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT > + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS F= OR > + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGH= T > + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTA= L, > + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT > + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF US= E, > + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON A= NY > + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT > + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE U= SE > + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE= . > + */ SPDX header should be used, correct? > + > + /* > + * This is a simple functional test for rte_smp_mb() implementation. > + * I.E. make sure that LOAD and STORE operations that precede the > + * rte_smp_mb() call are globally visible across the lcores > + * before the the LOAD and STORE operations that follows it. > + * The test uses simple implementation of Peterson's lock algorithm > + * (https://en.wikipedia.org/wiki/Peterson%27s_algorithm) > + * for two execution units to make sure that rte_smp_mb() prevents > + * store-load reordering to happen. > + * Also when executed on a single lcore could be used as a approxiamate > + * estimation of number of cycles particular implementation of rte_smp_= mb() > + * will take. > + */ > + >=20 Regards, Keith