From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id F3CEB2A6C for ; Thu, 6 Apr 2017 18:24:48 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1491495889; x=1523031889; h=from:to:cc:subject:date:message-id:references: in-reply-to:content-transfer-encoding:mime-version; bh=aafYjrDP9mmBWTIbpzu4tkpzcwvUf2swvRaczTuxcQ8=; b=WX+Z7xJzayRe8tIEARJWD7eIbcFwxosPOijXfGXfb0ZINWJLHJu3jELX fFNmeb+TkIioaF4Gy8970w0dJ8471g==; Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 06 Apr 2017 09:24:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.37,160,1488873600"; d="scan'208";a="74476630" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by orsmga004.jf.intel.com with ESMTP; 06 Apr 2017 09:24:47 -0700 Received: from fmsmsx154.amr.corp.intel.com (10.18.116.70) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 6 Apr 2017 09:24:47 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by FMSMSX154.amr.corp.intel.com (10.18.116.70) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 6 Apr 2017 09:24:47 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.117]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.217]) with mapi id 14.03.0319.002; Fri, 7 Apr 2017 00:24:45 +0800 From: "Zhang, Qi Z" To: "Richardson, Bruce" , "Zhang, Helin" CC: "dev@dpdk.org" , "Yigit, Ferruh" , "Richardson, Bruce" Thread-Topic: [dpdk-dev] [PATCH v2 1/2] net/i40e: eliminate mbuf write on rearm Thread-Index: AQHSrsmRnB2GJB3bC0u1UCsqBKSCfaG4gnKg Date: Thu, 6 Apr 2017 16:24:44 +0000 Message-ID: <039ED4275CED7440929022BC67E7061153088B73@SHSMSX103.ccr.corp.intel.com> References: <20170403143944.17719-1-bruce.richardson@intel.com> <20170406113217.28236-1-bruce.richardson@intel.com> <20170406113217.28236-2-bruce.richardson@intel.com> In-Reply-To: <20170406113217.28236-2-bruce.richardson@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 10.0.102.7 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 1/2] net/i40e: eliminate mbuf write on rearm X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 06 Apr 2017 16:24:49 -0000 Hi Bruce: > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Bruce Richardson > Sent: Thursday, April 6, 2017 7:32 PM > To: Zhang, Helin > Cc: dev@dpdk.org; Yigit, Ferruh ; Richardson, Bru= ce > > Subject: [dpdk-dev] [PATCH v2 1/2] net/i40e: eliminate mbuf write on rear= m >=20 > With the mbuf rework, we now have 8 contiguous bytes to be rearmed in the > mbuf just before the 8-bytes of olflags. If we don't do the rearm write i= nside > the descriptor ring replenishment function, and delay it to receiving the > packet, we can do a single 16B write inside the RX function to set both t= he > rearm data, and the flags together. >=20 > Signed-off-by: Bruce Richardson > --- > V2: fix a checkpatch warning. One warning remains, which is being left > as-is as the code line in question is being removed by patch 2. > --- > drivers/net/i40e/i40e_rxtx_vec_sse.c | 46 > +++++++++++++++++++++--------------- > 1 file changed, 27 insertions(+), 19 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_rxtx_vec_sse.c > b/drivers/net/i40e/i40e_rxtx_vec_sse.c > index fdd4a34..c43d1c3 100644 > --- a/drivers/net/i40e/i40e_rxtx_vec_sse.c > +++ b/drivers/net/i40e/i40e_rxtx_vec_sse.c > @@ -82,19 +82,10 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq) > /* Initialize the mbufs in vector, process 2 mbufs in one loop */ > for (i =3D 0; i < RTE_I40E_RXQ_REARM_THRESH; i +=3D 2, rxep +=3D 2) { > __m128i vaddr0, vaddr1; > - uintptr_t p0, p1; >=20 > mb0 =3D rxep[0].mbuf; > mb1 =3D rxep[1].mbuf; >=20 > - /* Flush mbuf with pkt template. > - * Data to be rearmed is 6 bytes long. > - */ > - p0 =3D (uintptr_t)&mb0->rearm_data; > - *(uint64_t *)p0 =3D rxq->mbuf_initializer; > - p1 =3D (uintptr_t)&mb1->rearm_data; > - *(uint64_t *)p1 =3D rxq->mbuf_initializer; > - > /* load buf_addr(lo 64bit) and buf_physaddr(hi 64bit) */ > vaddr0 =3D _mm_loadu_si128((__m128i *)&mb0->buf_addr); > vaddr1 =3D _mm_loadu_si128((__m128i *)&mb1->buf_addr); @@ > -125,6 +116,13 @@ i40e_rxq_rearm(struct i40e_rx_queue *rxq) > I40E_PCI_REG_WRITE(rxq->qrx_tail, rx_id); } >=20 > +static inline void > +desc_to_olflags_v(struct i40e_rx_queue *rxq, __m128i descs[4] > __rte_unused, > + struct rte_mbuf **rx_pkts) Should we change the function name? since its scope is changed. I'm Ok with all the other part. Thanks Qi