From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id A32431B1FC for ; Wed, 3 Oct 2018 15:32:00 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 03 Oct 2018 06:31:59 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.54,336,1534834800"; d="scan'208";a="262514612" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by orsmga005.jf.intel.com with ESMTP; 03 Oct 2018 06:29:22 -0700 Received: from FMSMSX110.amr.corp.intel.com (10.18.116.10) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 3 Oct 2018 06:29:17 -0700 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by fmsmsx110.amr.corp.intel.com (10.18.116.10) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 3 Oct 2018 06:29:17 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.245]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.220]) with mapi id 14.03.0319.002; Wed, 3 Oct 2018 21:29:15 +0800 From: "Zhang, Qi Z" To: "Li, Xiaoyun" , "Xing, Beilei" , "dev@dpdk.org" , "Lu, Wenzhuo" , "Wu, Jingjing" Thread-Topic: [PATCH v3] doc: add known issue about legacy intr mode for ixgbe Thread-Index: AQHUWGsQSIJ3pXPwSEaT9lsPeFsA3KUNguZg Date: Wed, 3 Oct 2018 13:29:14 +0000 Message-ID: <039ED4275CED7440929022BC67E70611532A9A2E@SHSMSX103.ccr.corp.intel.com> References: <1538039797-43828-1-git-send-email-xiaoyun.li@intel.com> <1538275984-38043-1-git-send-email-xiaoyun.li@intel.com> In-Reply-To: <1538275984-38043-1-git-send-email-xiaoyun.li@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiNGVlNjVkZWMtNDMxNC00N2QzLWI0M2EtY2U2ZTVmZTI0NDU5IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiUSswdnZvVTJHSXdLcDFRd05pNk04ZGNOdmxpTFFnVnRMWEJlMUkybUp0OEszdlBcL3M2OG5xaE9qU1E1elErOEEifQ== x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3] doc: add known issue about legacy intr mode for ixgbe X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 03 Oct 2018 13:32:01 -0000 > -----Original Message----- > From: Li, Xiaoyun > Sent: Sunday, September 30, 2018 10:53 AM > To: Xing, Beilei ; Zhang, Qi Z ; > dev@dpdk.org; Lu, Wenzhuo ; Wu, Jingjing > > Cc: Li, Xiaoyun > Subject: [PATCH v3] doc: add known issue about legacy intr mode for ixgbe >=20 > When using uio_pci_generic module or using legacy interrupt mode of igb_u= io > or vfio, X550 cannot get interrupts. Because the Interrupt Status bit is = not > implemented, then the irq cannot be handled correctly and cannot report t= he > event fd to DPDK apps. >=20 > Add this hw limitation and details into ixgbe known issue. >=20 > Signed-off-by: Xiaoyun Li > --- > v3: > * Correct a misspelling. > v2: > * Correct the link of X550 spec update. > * Polish the known issue title. > --- > doc/guides/nics/ixgbe.rst | 26 ++++++++++++++++++++++++++ > 1 file changed, 26 insertions(+) >=20 > diff --git a/doc/guides/nics/ixgbe.rst b/doc/guides/nics/ixgbe.rst index > 16d6390..af4c876 100644 > --- a/doc/guides/nics/ixgbe.rst > +++ b/doc/guides/nics/ixgbe.rst > @@ -200,6 +200,32 @@ There is no RTE API to add a VF's MAC address from > the PF. On ixgbe, the ``rte_eth_dev_mac_addr_add()`` function can be use= d > to add a VF's MAC address, as a workaround. >=20 > +X550 does not support legacy interrupt mode > +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ > + > +Desccription > +^^^^^^^^^^^^ > +X550 cannot get interrupts if using ``uio_pci_generic`` module or using > +legacy interrupt mode of ``igb_uio`` or ``vfio``. Because the errata of > +X550 states that the Interrupt Status bit is not implemented. The > +errata is the item #22 from `X550 spec update > + +documents/specification-updates/ethernet-x550-spec-update.pdf>`_ > + > +Implication > +^^^^^^^^^^^ > +When using ``uio_pci_generic`` module or using legacy interrupt mode of > +``igb_uio`` or ``vfio``, the Interrupt Status bit would be checked if > +the interrupt is coming. Since the bit is not implemented in X550, the > +irq cannot be handled correctly and cannot report the event fd to DPDK > +apps. Then apps cannot get interrupts and ``dmesg`` will show messages > +like ``irq #No.: `` ``nobody cared.`` > + > +Workaround > +^^^^^^^^^^ > +Do not bind the ``uio_pci_generic`` module in X550 NICs. > +Do not bind ``igb_uio`` with legacy mode in X550 NICs. > +Before using ``vfio`` with legacy mode in X550 NICs, using ``modprobe > +vfio `` ``nointxmask=3D1`` to bind ``vfio``. I have couple questions here. If noinitxmask=3D1 is set, does that mean, in vfio interrupt handler we wil= l not check intr mask? but what if the intx is shared by another devices?=20 Does that mean we will also handle interrupt from other devices which is no= t expected? Not sure if we should add some statement like "if the intx is not shared wi= th other device ...." ? >=20 > Inline crypto processing support > -------------------------------- > -- > 2.7.4