From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id CB15CA046B; Thu, 9 Jan 2020 15:00:49 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8D9451DDB2; Thu, 9 Jan 2020 15:00:49 +0100 (CET) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id 08A5A1DDAF for ; Thu, 9 Jan 2020 15:00:47 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Jan 2020 06:00:46 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.69,413,1571727600"; d="scan'208";a="272120875" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by FMSMGA003.fm.intel.com with ESMTP; 09 Jan 2020 06:00:45 -0800 Received: from fmsmsx119.amr.corp.intel.com (10.18.124.207) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 9 Jan 2020 06:00:42 -0800 Received: from shsmsx108.ccr.corp.intel.com (10.239.4.97) by FMSMSX119.amr.corp.intel.com (10.18.124.207) with Microsoft SMTP Server (TLS) id 14.3.439.0; Thu, 9 Jan 2020 06:00:42 -0800 Received: from shsmsx105.ccr.corp.intel.com ([169.254.11.28]) by SHSMSX108.ccr.corp.intel.com ([169.254.8.39]) with mapi id 14.03.0439.000; Thu, 9 Jan 2020 22:00:39 +0800 From: "Zhang, Qi Z" To: "Iremonger, Bernard" , "dev@dpdk.org" , "Xing, Beilei" , "Doherty, Declan" CC: "Ananyev, Konstantin" , "Byrne, Stephen1" , "Zhang, Helin" Thread-Topic: [PATCH v3 5/9] net/i40e: process ESP flows Thread-Index: AQHVxuazKWkS5Jl89EGh4BzKqOyMIafiWtUw Date: Thu, 9 Jan 2020 14:00:39 +0000 Message-ID: <039ED4275CED7440929022BC67E7061153E0219A@SHSMSX105.ccr.corp.intel.com> References: <1576577756-648-1-git-send-email-bernard.iremonger@intel.com> <1578572194-594-6-git-send-email-bernard.iremonger@intel.com> In-Reply-To: <1578572194-594-6-git-send-email-bernard.iremonger@intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v3 5/9] net/i40e: process ESP flows X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Bernard: > -----Original Message----- > From: Iremonger, Bernard > Sent: Thursday, January 9, 2020 8:17 PM > To: dev@dpdk.org; Xing, Beilei ; Zhang, Qi Z > ; Doherty, Declan > Cc: Ananyev, Konstantin ; Byrne, Stephen1 > ; Zhang, Helin ; > Iremonger, Bernard > Subject: [PATCH v3 5/9] net/i40e: process ESP flows >=20 > Process ESP flows on Flow Director and RSS. >=20 > add eth/ipv4/esp and eth/ipv6/esp patterns add eth/ipv4/udp/esp and > eth/ipv6/esp/udp patterns add flow structures for above patterns update > i40e_flow_parse_fdir_filter() add i40e_flow_set_filter_spi() add fill_ip6= _head() > add oip_type in filter add is_udp in filter use tenant_id in filter for s= pi handle ESP > and AH pctypes in ESP-AH profile update customized code for ESP hardcode = udp > destination port to 4500 Looks like the patch could be separate into 3 parts for easy review. One is for the DDP package process, (rte_pmd_i40e_process_ddp_package -> i= 40e_update_customized_info -> i40e_update_customized_pctype One is for fdir related - training packet construction .. etc. And one for adding all rte_flow parser Regards Qi >=20 > Signed-off-by: Bernard Iremonger > --- > drivers/net/i40e/i40e_ethdev.c | 44 +++++++++++++- > drivers/net/i40e/i40e_ethdev.h | 38 ++++++++++++ > drivers/net/i40e/i40e_fdir.c | 128 > +++++++++++++++++++++++++++++++++++--- > drivers/net/i40e/i40e_flow.c | 135 > ++++++++++++++++++++++++++++++++++++++++- > 4 files changed, 332 insertions(+), 13 deletions(-) >=20 > diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethde= v.c > index 5f1cf8a..a462eba 100644 > --- a/drivers/net/i40e/i40e_ethdev.c > +++ b/drivers/net/i40e/i40e_ethdev.c > @@ -1106,6 +1106,7 @@ i40e_init_customized_info(struct i40e_pf *pf) > } >=20 > pf->gtp_support =3D false; > + pf->esp_support =3D false; > } >=20 > void > @@ -12337,6 +12338,7 @@ i40e_update_customized_pctype(struct > rte_eth_dev *dev, uint8_t *pkg, > } > } > name[strlen(name) - 1] =3D '\0'; > + PMD_DRV_LOG(INFO, "name =3D %s\n", name); > if (!strcmp(name, "GTPC")) > new_pctype =3D > i40e_find_customized_pctype(pf, > @@ -12353,6 +12355,30 @@ i40e_update_customized_pctype(struct > rte_eth_dev *dev, uint8_t *pkg, > new_pctype =3D > i40e_find_customized_pctype(pf, > I40E_CUSTOMIZED_GTPU); > + else if (!strcmp(name, "IPV4_ESP")) > + new_pctype =3D > + i40e_find_customized_pctype(pf, > + I40E_CUSTOMIZED_ESP_IPV4); > + else if (!strcmp(name, "IPV6_ESP")) > + new_pctype =3D > + i40e_find_customized_pctype(pf, > + I40E_CUSTOMIZED_ESP_IPV6); > + else if (!strcmp(name, "IPV4_UDP_ESP")) > + new_pctype =3D > + i40e_find_customized_pctype(pf, > + I40E_CUSTOMIZED_ESP_IPV4_UDP); > + else if (!strcmp(name, "IPV6_UDP_ESP")) > + new_pctype =3D > + i40e_find_customized_pctype(pf, > + I40E_CUSTOMIZED_ESP_IPV6_UDP); > + else if (!strcmp(name, "IPV4_AH")) > + new_pctype =3D > + i40e_find_customized_pctype(pf, > + I40E_CUSTOMIZED_AH_IPV4); > + else if (!strcmp(name, "IPV6_AH")) > + new_pctype =3D > + i40e_find_customized_pctype(pf, > + I40E_CUSTOMIZED_AH_IPV6); > if (new_pctype) { > if (op =3D=3D RTE_PMD_I40E_PKG_OP_WR_ADD) { > new_pctype->pctype =3D pctype_value; > @@ -12448,6 +12474,7 @@ i40e_update_customized_ptype(struct > rte_eth_dev *dev, uint8_t *pkg, > continue; > memset(name, 0, sizeof(name)); > strcpy(name, proto[n].name); > + PMD_DRV_LOG(INFO, "name =3D %s\n", name); > if (!strncasecmp(name, "PPPOE", 5)) > ptype_mapping[i].sw_ptype |=3D > RTE_PTYPE_L2_ETHER_PPPOE; > @@ -12541,6 +12568,10 @@ i40e_update_customized_ptype(struct > rte_eth_dev *dev, uint8_t *pkg, > ptype_mapping[i].sw_ptype |=3D > RTE_PTYPE_TUNNEL_GTPU; > in_tunnel =3D true; > + } else if (!strncasecmp(name, "ESP", 3)) { > + ptype_mapping[i].sw_ptype |=3D > + RTE_PTYPE_TUNNEL_ESP; > + in_tunnel =3D true; > } else if (!strncasecmp(name, "GRENAT", 6)) { > ptype_mapping[i].sw_ptype |=3D > RTE_PTYPE_TUNNEL_GRENAT; > @@ -12560,7 +12591,7 @@ i40e_update_customized_ptype(struct > rte_eth_dev *dev, uint8_t *pkg, > ret =3D rte_pmd_i40e_ptype_mapping_update(port_id, ptype_mapping, > ptype_num, 0); > if (ret) > - PMD_DRV_LOG(ERR, "Failed to update mapping table."); > + PMD_DRV_LOG(ERR, "Failed to update ptype mapping table."); >=20 > rte_free(ptype_mapping); > rte_free(ptype); > @@ -12625,6 +12656,17 @@ i40e_update_customized_info(struct > rte_eth_dev *dev, uint8_t *pkg, > } > } >=20 > + /* Check if ESP is supported. */ > + for (i =3D 0; i < proto_num; i++) { > + if (!strncmp(proto[i].name, "ESP", 3)) { > + if (op =3D=3D RTE_PMD_I40E_PKG_OP_WR_ADD) > + pf->esp_support =3D true; > + else > + pf->esp_support =3D false; > + break; > + } > + } > + > /* Update customized pctype info */ > ret =3D i40e_update_customized_pctype(dev, pkg, pkg_size, > proto_num, proto, op); > diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethde= v.h > index 295ad59..792a047 100644 > --- a/drivers/net/i40e/i40e_ethdev.h > +++ b/drivers/net/i40e/i40e_ethdev.h > @@ -501,6 +501,29 @@ struct i40e_gtp_ipv6_flow { > struct rte_eth_ipv6_flow ip6; > }; >=20 > +/* A structure used to define the input for ESP IPV4 flow */ struct > +i40e_esp_ipv4_flow { > + struct rte_eth_ipv4_flow ipv4; > + uint32_t spi; /* SPI in big endian. */ > +}; > + > +/* A structure used to define the input for ESP IPV6 flow */ struct > +i40e_esp_ipv6_flow { > + struct rte_eth_ipv6_flow ipv6; > + uint32_t spi; /* SPI in big endian. */ > +}; > +/* A structure used to define the input for ESP IPV4 UDP flow */ struct > +i40e_esp_ipv4_udp_flow { > + struct rte_eth_udpv4_flow udp; > + uint32_t spi; /* SPI in big endian. */ > +}; > + > +/* A structure used to define the input for ESP IPV6 UDP flow */ struct > +i40e_esp_ipv6_udp_flow { > + struct rte_eth_udpv6_flow udp; > + uint32_t spi; /* SPI in big endian. */ > +}; > + > /* A structure used to define the input for raw type flow */ struct > i40e_raw_flow { > uint16_t pctype; > @@ -526,6 +549,10 @@ union i40e_fdir_flow { > struct i40e_gtp_ipv4_flow gtp_ipv4_flow; > struct i40e_gtp_ipv6_flow gtp_ipv6_flow; > struct i40e_raw_flow raw_flow; > + struct i40e_esp_ipv4_flow esp_ipv4_flow; > + struct i40e_esp_ipv6_flow esp_ipv6_flow; > + struct i40e_esp_ipv4_udp_flow esp_ipv4_udp_flow; > + struct i40e_esp_ipv6_udp_flow esp_ipv6_udp_flow; > }; >=20 > enum i40e_fdir_ip_type { > @@ -542,8 +569,10 @@ struct i40e_fdir_flow_ext { > uint16_t dst_id; /* VF ID, available when is_vf is 1*/ > bool inner_ip; /* If there is inner ip */ > enum i40e_fdir_ip_type iip_type; /* ip type for inner ip */ > + enum i40e_fdir_ip_type oip_type; /* ip type for outer ip */ > bool customized_pctype; /* If customized pctype is used */ > bool pkt_template; /* If raw packet template is used */ > + bool is_udp; /* ipv4|ipv6 udp flow */ > }; >=20 > /* A structure used to define the input for a flow director filter entry= */ @@ > -769,6 +798,8 @@ enum i40e_tunnel_type { > I40E_TUNNEL_TYPE_QINQ, > I40E_TUNNEL_TYPE_GTPC, > I40E_TUNNEL_TYPE_GTPU, > + I40E_TUNNEL_TYPE_ESPoUDP, > + I40E_TUNNEL_TYPE_ESPoIP, > I40E_TUNNEL_TYPE_MAX, > }; >=20 > @@ -897,6 +928,12 @@ enum i40e_new_pctype { > I40E_CUSTOMIZED_GTPU_IPV4, > I40E_CUSTOMIZED_GTPU_IPV6, > I40E_CUSTOMIZED_GTPU, > + I40E_CUSTOMIZED_ESP_IPV4, > + I40E_CUSTOMIZED_ESP_IPV6, > + I40E_CUSTOMIZED_ESP_IPV4_UDP, > + I40E_CUSTOMIZED_ESP_IPV6_UDP, > + I40E_CUSTOMIZED_AH_IPV4, > + I40E_CUSTOMIZED_AH_IPV6, > I40E_CUSTOMIZED_MAX, > }; >=20 > @@ -1001,6 +1038,7 @@ struct i40e_pf { >=20 > /* Dynamic Device Personalization */ > bool gtp_support; /* 1 - support GTP-C and GTP-U */ > + bool esp_support; /* 1 - support ESP SPI */ > /* customer customized pctype */ > struct i40e_customized_pctype > customized_pctype[I40E_CUSTOMIZED_MAX]; > /* Switch Domain Id */ > diff --git a/drivers/net/i40e/i40e_fdir.c b/drivers/net/i40e/i40e_fdir.c = index > dee007d..3fa6297 100644 > --- a/drivers/net/i40e/i40e_fdir.c > +++ b/drivers/net/i40e/i40e_fdir.c > @@ -54,6 +54,8 @@ > #define I40E_FDIR_GTP_MSG_TYPE_0X01 0x01 > #define I40E_FDIR_GTP_MSG_TYPE_0XFF 0xFF >=20 > +#define I40E_FDIR_ESP_DST_PORT 4500 > + > /* Wait time for fdir filter programming */ #define > I40E_FDIR_MAX_WAIT_US 10000 >=20 > @@ -971,6 +973,37 @@ i40e_flow_fdir_find_customized_pctype(struct > i40e_pf *pf, uint8_t pctype) } >=20 > static inline int > +fill_ip6_head(const struct i40e_fdir_input *fdir_input, unsigned char > *raw_pkt, > + uint8_t next_proto, uint8_t len, uint16_t *ether_type) { > + struct rte_ipv6_hdr *ip6; > + > + ip6 =3D (struct rte_ipv6_hdr *)raw_pkt; > + > + *ether_type =3D rte_cpu_to_be_16(RTE_ETHER_TYPE_IPV6); > + ip6->vtc_flow =3D rte_cpu_to_be_32(I40E_FDIR_IPv6_DEFAULT_VTC_FLOW > | > + (fdir_input->flow.ipv6_flow.tc << I40E_FDIR_IPv6_TC_OFFSET)); > + ip6->payload_len =3D rte_cpu_to_be_16(I40E_FDIR_IPv6_PAYLOAD_LEN); > + ip6->proto =3D fdir_input->flow.ipv6_flow.proto ? > + fdir_input->flow.ipv6_flow.proto : next_proto; > + ip6->hop_limits =3D fdir_input->flow.ipv6_flow.hop_limits ? > + fdir_input->flow.ipv6_flow.hop_limits : > + I40E_FDIR_IPv6_DEFAULT_HOP_LIMITS; > + /** > + * The source and destination fields in the transmitted packet > + * need to be presented in a reversed order with respect > + * to the expected received packets. > + */ > + rte_memcpy(&ip6->src_addr, &fdir_input->flow.ipv6_flow.dst_ip, > + IPV6_ADDR_LEN); > + rte_memcpy(&ip6->dst_addr, &fdir_input->flow.ipv6_flow.src_ip, > + IPV6_ADDR_LEN); > + len +=3D sizeof(struct rte_ipv6_hdr); > + > + return len; > +} > + > +static inline int > i40e_flow_fdir_fill_eth_ip_head(struct i40e_pf *pf, > const struct i40e_fdir_input *fdir_input, > unsigned char *raw_pkt, > @@ -1045,16 +1078,29 @@ i40e_flow_fdir_fill_eth_ip_head(struct i40e_pf > *pf, > ip->src_addr =3D fdir_input->flow.ip4_flow.dst_ip; > ip->dst_addr =3D fdir_input->flow.ip4_flow.src_ip; >=20 > - if (!is_customized_pctype) > + if (!is_customized_pctype) { > ip->next_proto_id =3D fdir_input->flow.ip4_flow.proto ? > fdir_input->flow.ip4_flow.proto : > next_proto[fdir_input->pctype]; > - else if (cus_pctype->index =3D=3D I40E_CUSTOMIZED_GTPC || > + len +=3D sizeof(struct rte_ipv4_hdr); > + } else if (cus_pctype->index =3D=3D I40E_CUSTOMIZED_GTPC || > cus_pctype->index =3D=3D I40E_CUSTOMIZED_GTPU_IPV4 || > cus_pctype->index =3D=3D I40E_CUSTOMIZED_GTPU_IPV6 || > - cus_pctype->index =3D=3D I40E_CUSTOMIZED_GTPU) > + cus_pctype->index =3D=3D I40E_CUSTOMIZED_GTPU) { > ip->next_proto_id =3D IPPROTO_UDP; > - len +=3D sizeof(struct rte_ipv4_hdr); > + len +=3D sizeof(struct rte_ipv4_hdr); > + } else if (cus_pctype->index =3D=3D I40E_CUSTOMIZED_ESP_IPV4) { > + ip->next_proto_id =3D IPPROTO_ESP; > + len +=3D sizeof(struct rte_ipv4_hdr); > + } else if (cus_pctype->index =3D=3D I40E_CUSTOMIZED_ESP_IPV4_UDP) { > + ip->next_proto_id =3D IPPROTO_UDP; > + len +=3D sizeof(struct rte_ipv4_hdr); > + } else if (cus_pctype->index =3D=3D I40E_CUSTOMIZED_ESP_IPV6) > + len =3D fill_ip6_head(fdir_input, raw_pkt, IPPROTO_ESP, > + len, ether_type); > + else if (cus_pctype->index =3D=3D I40E_CUSTOMIZED_ESP_IPV6_UDP) > + len =3D fill_ip6_head(fdir_input, raw_pkt, IPPROTO_UDP, > + len, ether_type); > } else if (pctype =3D=3D I40E_FILTER_PCTYPE_NONF_IPV6_TCP || > pctype =3D=3D I40E_FILTER_PCTYPE_NONF_IPV6_UDP || > pctype =3D=3D I40E_FILTER_PCTYPE_NONF_IPV6_SCTP || @@ > -1088,8 +1134,7 @@ i40e_flow_fdir_fill_eth_ip_head(struct i40e_pf *pf, > IPV6_ADDR_LEN); > len +=3D sizeof(struct rte_ipv6_hdr); > } else { > - PMD_DRV_LOG(ERR, "unknown pctype %u.", > - fdir_input->pctype); > + PMD_DRV_LOG(ERR, "unknown pctype %u.", fdir_input->pctype); > return -1; > } >=20 > @@ -1115,6 +1160,10 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf, > struct rte_flow_item_gtp *gtp; > struct rte_ipv4_hdr *gtp_ipv4; > struct rte_ipv6_hdr *gtp_ipv6; > + struct rte_flow_item_esp *esp; > + struct rte_ipv4_hdr *esp_ipv4; > + struct rte_ipv6_hdr *esp_ipv6; > + > uint8_t size, dst =3D 0; > uint8_t i, pit_idx, set_idx =3D I40E_FLXPLD_L4_IDX; /* use l4 by defaul= t*/ > int len; > @@ -1285,10 +1334,71 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf, > } else > payload =3D (unsigned char *)gtp + > sizeof(struct rte_flow_item_gtp); > + } else if (cus_pctype->index =3D=3D I40E_CUSTOMIZED_ESP_IPV4 || > + cus_pctype->index =3D=3D I40E_CUSTOMIZED_ESP_IPV6 || > + cus_pctype->index =3D=3D I40E_CUSTOMIZED_ESP_IPV4_UDP || > + cus_pctype->index =3D=3D I40E_CUSTOMIZED_ESP_IPV6_UDP) { > + if (cus_pctype->index =3D=3D I40E_CUSTOMIZED_ESP_IPV4) { > + esp_ipv4 =3D (struct rte_ipv4_hdr *) > + (raw_pkt + len); > + esp =3D (struct rte_flow_item_esp *)esp_ipv4; > + esp->hdr.spi =3D > + fdir_input->flow.esp_ipv4_flow.spi; > + payload =3D (unsigned char *)esp + > + sizeof(struct rte_esp_hdr); > + len +=3D sizeof(struct rte_esp_hdr); > + } else if (cus_pctype->index =3D=3D > + I40E_CUSTOMIZED_ESP_IPV4_UDP) { > + esp_ipv4 =3D (struct rte_ipv4_hdr *) > + (raw_pkt + len); > + udp =3D (struct rte_udp_hdr *)esp_ipv4; > + udp->dst_port =3D rte_cpu_to_be_16 > + (I40E_FDIR_ESP_DST_PORT); > + > + udp->dgram_len =3D rte_cpu_to_be_16 > + (I40E_FDIR_UDP_DEFAULT_LEN); > + esp =3D (struct rte_flow_item_esp *) > + ((unsigned char *)esp_ipv4 + > + sizeof(struct rte_udp_hdr)); > + esp->hdr.spi =3D > + fdir_input->flow.esp_ipv4_udp_flow.spi; > + payload =3D (unsigned char *)esp + > + sizeof(struct rte_esp_hdr); > + len +=3D sizeof(struct rte_udp_hdr) + > + sizeof(struct rte_esp_hdr); > + } else if (cus_pctype->index =3D=3D > + I40E_CUSTOMIZED_ESP_IPV6) { > + esp_ipv6 =3D (struct rte_ipv6_hdr *) > + (raw_pkt + len); > + esp =3D (struct rte_flow_item_esp *)esp_ipv6; > + esp->hdr.spi =3D > + fdir_input->flow.esp_ipv6_flow.spi; > + payload =3D (unsigned char *)esp + > + sizeof(struct rte_esp_hdr); > + len +=3D sizeof(struct rte_esp_hdr); > + } else if (cus_pctype->index =3D=3D > + I40E_CUSTOMIZED_ESP_IPV6_UDP) { > + esp_ipv6 =3D (struct rte_ipv6_hdr *) > + (raw_pkt + len); > + udp =3D (struct rte_udp_hdr *)esp_ipv6; > + udp->dst_port =3D rte_cpu_to_be_16 > + (I40E_FDIR_ESP_DST_PORT); > + > + udp->dgram_len =3D rte_cpu_to_be_16 > + (I40E_FDIR_UDP_DEFAULT_LEN); > + esp =3D (struct rte_flow_item_esp *) > + ((unsigned char *)esp_ipv6 + > + sizeof(struct rte_udp_hdr)); > + esp->hdr.spi =3D > + fdir_input->flow.esp_ipv6_udp_flow.spi; > + payload =3D (unsigned char *)esp + > + sizeof(struct rte_esp_hdr); > + len +=3D sizeof(struct rte_udp_hdr) + > + sizeof(struct rte_esp_hdr); > + } > } > } else { > - PMD_DRV_LOG(ERR, "unknown pctype %u.", > - fdir_input->pctype); > + PMD_DRV_LOG(ERR, "unknown pctype %u.", fdir_input->pctype); > return -1; > } >=20 > @@ -1305,7 +1415,7 @@ i40e_flow_fdir_construct_pkt(struct i40e_pf *pf, > &fdir_input->flow_ext.flexbytes[dst], > size * sizeof(uint16_t)); > } > - > + rte_hexdump(stdout, NULL, raw_pkt, len); > return 0; > } >=20 > diff --git a/drivers/net/i40e/i40e_flow.c b/drivers/net/i40e/i40e_flow.c = index > 6102103..c585d8b 100644 > --- a/drivers/net/i40e/i40e_flow.c > +++ b/drivers/net/i40e/i40e_flow.c > @@ -110,8 +110,7 @@ static int i40e_flow_destroy_tunnel_filter(struct > i40e_pf *pf, static int i40e_flow_flush_fdir_filter(struct i40e_pf *pf);= static > int i40e_flow_flush_ethertype_filter(struct i40e_pf *pf); static int > i40e_flow_flush_tunnel_filter(struct i40e_pf *pf); -static int > -i40e_flow_flush_rss_filter(struct rte_eth_dev *dev); > +static int i40e_flow_flush_rss_filter(struct rte_eth_dev *dev); > static int > i40e_flow_parse_qinq_filter(struct rte_eth_dev *dev, > const struct rte_flow_attr *attr, @@ -1615,6 +1614,36 > @@ static enum rte_flow_item_type pattern_qinq_1[] =3D { > RTE_FLOW_ITEM_TYPE_END, > }; >=20 > +static enum rte_flow_item_type pattern_fdir_ipv4_esp[] =3D { > + RTE_FLOW_ITEM_TYPE_ETH, > + RTE_FLOW_ITEM_TYPE_IPV4, > + RTE_FLOW_ITEM_TYPE_ESP, > + RTE_FLOW_ITEM_TYPE_END, > +}; > + > +static enum rte_flow_item_type pattern_fdir_ipv6_esp[] =3D { > + RTE_FLOW_ITEM_TYPE_ETH, > + RTE_FLOW_ITEM_TYPE_IPV6, > + RTE_FLOW_ITEM_TYPE_ESP, > + RTE_FLOW_ITEM_TYPE_END, > +}; > + > +static enum rte_flow_item_type pattern_fdir_ipv4_udp_esp[] =3D { > + RTE_FLOW_ITEM_TYPE_ETH, > + RTE_FLOW_ITEM_TYPE_IPV4, > + RTE_FLOW_ITEM_TYPE_UDP, > + RTE_FLOW_ITEM_TYPE_ESP, > + RTE_FLOW_ITEM_TYPE_END, > +}; > + > +static enum rte_flow_item_type pattern_fdir_ipv6_udp_esp[] =3D { > + RTE_FLOW_ITEM_TYPE_ETH, > + RTE_FLOW_ITEM_TYPE_IPV6, > + RTE_FLOW_ITEM_TYPE_UDP, > + RTE_FLOW_ITEM_TYPE_ESP, > + RTE_FLOW_ITEM_TYPE_END, > +}; > + > static struct i40e_valid_pattern i40e_supported_patterns[] =3D { > /* Ethertype */ > { pattern_ethertype, i40e_flow_parse_ethertype_filter }, @@ -1628,6 > +1657,8 @@ static struct i40e_valid_pattern i40e_supported_patterns[] =3D= { > { pattern_fdir_ipv4_gtpu, i40e_flow_parse_fdir_filter }, > { pattern_fdir_ipv4_gtpu_ipv4, i40e_flow_parse_fdir_filter }, > { pattern_fdir_ipv4_gtpu_ipv6, i40e_flow_parse_fdir_filter }, > + { pattern_fdir_ipv4_esp, i40e_flow_parse_fdir_filter }, > + { pattern_fdir_ipv4_udp_esp, i40e_flow_parse_fdir_filter }, > { pattern_fdir_ipv6, i40e_flow_parse_fdir_filter }, > { pattern_fdir_ipv6_udp, i40e_flow_parse_fdir_filter }, > { pattern_fdir_ipv6_tcp, i40e_flow_parse_fdir_filter }, @@ -1636,6 > +1667,8 @@ static struct i40e_valid_pattern i40e_supported_patterns[] =3D= { > { pattern_fdir_ipv6_gtpu, i40e_flow_parse_fdir_filter }, > { pattern_fdir_ipv6_gtpu_ipv4, i40e_flow_parse_fdir_filter }, > { pattern_fdir_ipv6_gtpu_ipv6, i40e_flow_parse_fdir_filter }, > + { pattern_fdir_ipv6_esp, i40e_flow_parse_fdir_filter }, > + { pattern_fdir_ipv6_udp_esp, i40e_flow_parse_fdir_filter }, > /* FDIR - support default flow type with flexible payload */ > { pattern_fdir_ethertype_raw_1, i40e_flow_parse_fdir_filter }, > { pattern_fdir_ethertype_raw_2, i40e_flow_parse_fdir_filter }, @@ > -2420,6 +2453,28 @@ i40e_flow_fdir_get_pctype_value(struct i40e_pf *pf, > cus_pctype =3D i40e_find_customized_pctype(pf, > I40E_CUSTOMIZED_GTPU_IPV6); > break; > + case RTE_FLOW_ITEM_TYPE_ESP: > + if (!filter->input.flow_ext.is_udp) { > + if (filter->input.flow_ext.oip_type =3D=3D > + I40E_FDIR_IPTYPE_IPV4) > + cus_pctype =3D i40e_find_customized_pctype(pf, > + I40E_CUSTOMIZED_ESP_IPV4); > + else if (filter->input.flow_ext.oip_type =3D=3D > + I40E_FDIR_IPTYPE_IPV6) > + cus_pctype =3D i40e_find_customized_pctype(pf, > + I40E_CUSTOMIZED_ESP_IPV6); > + } else { > + if (filter->input.flow_ext.oip_type =3D=3D > + I40E_FDIR_IPTYPE_IPV4) > + cus_pctype =3D i40e_find_customized_pctype(pf, > + I40E_CUSTOMIZED_ESP_IPV4_UDP); > + else if (filter->input.flow_ext.oip_type =3D=3D > + I40E_FDIR_IPTYPE_IPV6) > + cus_pctype =3D i40e_find_customized_pctype(pf, > + I40E_CUSTOMIZED_ESP_IPV6_UDP); > + filter->input.flow_ext.is_udp =3D false; > + } > + break; > default: > PMD_DRV_LOG(ERR, "Unsupported item type"); > break; > @@ -2431,6 +2486,30 @@ i40e_flow_fdir_get_pctype_value(struct i40e_pf > *pf, > return I40E_FILTER_PCTYPE_INVALID; > } >=20 > +static void > +i40e_flow_set_filter_spi(struct i40e_fdir_filter_conf *filter, > + const struct rte_flow_item_esp *esp_spec) { > + if (filter->input.flow_ext.oip_type =3D=3D > + I40E_FDIR_IPTYPE_IPV4) { > + if (filter->input.flow_ext.is_udp) > + filter->input.flow.esp_ipv4_udp_flow.spi =3D > + esp_spec->hdr.spi; > + else > + filter->input.flow.esp_ipv4_flow.spi =3D > + esp_spec->hdr.spi; > + } > + if (filter->input.flow_ext.oip_type =3D=3D > + I40E_FDIR_IPTYPE_IPV6) { > + if (filter->input.flow_ext.is_udp) > + filter->input.flow.esp_ipv6_udp_flow.spi =3D > + esp_spec->hdr.spi; > + else > + filter->input.flow.esp_ipv6_flow.spi =3D > + esp_spec->hdr.spi; > + } > +} > + > /* 1. Last in item should be NULL as range is not supported. > * 2. Supported patterns: refer to array i40e_supported_patterns. > * 3. Default supported flow type and input set: refer to array @@ -2459= ,6 > +2538,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev *dev, > const struct rte_flow_item_udp *udp_spec, *udp_mask; > const struct rte_flow_item_sctp *sctp_spec, *sctp_mask; > const struct rte_flow_item_gtp *gtp_spec, *gtp_mask; > + const struct rte_flow_item_esp *esp_spec, *esp_mask; > const struct rte_flow_item_raw *raw_spec, *raw_mask; > const struct rte_flow_item_vf *vf_spec; >=20 > @@ -2654,10 +2734,18 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev > *dev, > ipv4_spec->hdr.src_addr; > filter->input.flow.ip4_flow.dst_ip =3D > ipv4_spec->hdr.dst_addr; > + > + filter->input.flow_ext.inner_ip =3D false; > + filter->input.flow_ext.oip_type =3D > + I40E_FDIR_IPTYPE_IPV4; > } else if (!ipv4_spec && !ipv4_mask && !outer_ip) { > filter->input.flow_ext.inner_ip =3D true; > filter->input.flow_ext.iip_type =3D > I40E_FDIR_IPTYPE_IPV4; > + } else if (!ipv4_spec && !ipv4_mask && outer_ip) { > + filter->input.flow_ext.inner_ip =3D false; > + filter->input.flow_ext.oip_type =3D > + I40E_FDIR_IPTYPE_IPV4; > } else if ((ipv4_spec || ipv4_mask) && !outer_ip) { > rte_flow_error_set(error, EINVAL, > RTE_FLOW_ERROR_TYPE_ITEM, > @@ -2716,6 +2804,10 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev > *dev, > filter->input.flow.ipv6_flow.hop_limits =3D > ipv6_spec->hdr.hop_limits; >=20 > + filter->input.flow_ext.inner_ip =3D false; > + filter->input.flow_ext.oip_type =3D > + I40E_FDIR_IPTYPE_IPV6; > + > rte_memcpy(filter->input.flow.ipv6_flow.src_ip, > ipv6_spec->hdr.src_addr, 16); > rte_memcpy(filter->input.flow.ipv6_flow.dst_ip, > @@ -2729,6 +2821,10 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev > *dev, > filter->input.flow_ext.inner_ip =3D true; > filter->input.flow_ext.iip_type =3D > I40E_FDIR_IPTYPE_IPV6; > + } else if (!ipv6_spec && !ipv6_mask && outer_ip) { > + filter->input.flow_ext.inner_ip =3D false; > + filter->input.flow_ext.oip_type =3D > + I40E_FDIR_IPTYPE_IPV6; > } else if ((ipv6_spec || ipv6_mask) && !outer_ip) { > rte_flow_error_set(error, EINVAL, > RTE_FLOW_ERROR_TYPE_ITEM, > @@ -2828,7 +2924,7 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev > *dev, > udp_spec->hdr.dst_port; > } > } > - > + filter->input.flow_ext.is_udp =3D true; > layer_idx =3D I40E_FLXPLD_L4_IDX; >=20 > break; > @@ -2863,6 +2959,39 @@ i40e_flow_parse_fdir_pattern(struct rte_eth_dev > *dev, > cus_proto =3D item_type; > } > break; > + case RTE_FLOW_ITEM_TYPE_ESP: > + if (!pf->esp_support) { > + rte_flow_error_set(error, EINVAL, > + RTE_FLOW_ERROR_TYPE_ITEM, > + item, > + "Unsupported ESP protocol"); > + return -rte_errno; > + } > + > + esp_spec =3D item->spec; > + esp_mask =3D item->mask; > + > + if (!esp_spec || !esp_mask) { > + rte_flow_error_set(error, EINVAL, > + RTE_FLOW_ERROR_TYPE_ITEM, > + item, > + "Invalid ESP item"); > + return -rte_errno; > + } > + > + if (esp_spec && esp_mask) { > + if (esp_mask->hdr.spi !=3D UINT32_MAX) { > + rte_flow_error_set(error, EINVAL, > + RTE_FLOW_ERROR_TYPE_ITEM, > + item, > + "Invalid ESP mask"); > + return -rte_errno; > + } > + i40e_flow_set_filter_spi(filter, esp_spec); > + filter->input.flow_ext.customized_pctype =3D true; > + cus_proto =3D item_type; > + } > + break; > case RTE_FLOW_ITEM_TYPE_SCTP: > sctp_spec =3D item->spec; > sctp_mask =3D item->mask; > -- > 2.7.4