From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id B1432A058B; Wed, 8 Apr 2020 02:15:44 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CBBBD1BEE7; Wed, 8 Apr 2020 02:15:43 +0200 (CEST) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 05D301BEE1 for ; Wed, 8 Apr 2020 02:15:41 +0200 (CEST) IronPort-SDR: Kd/QT/v//Q4Tm55DEoOudfAUri9xlYj0LcL2YekBmhNq5nfCmj2VDmr3WT4z5zWcBrJLWm195g oU2J+DbHNjuA== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Apr 2020 17:15:41 -0700 IronPort-SDR: tHA4NzxdvYr1Aa1SUl1kaYNYqDI7cx5zb0KieEuFooWZGTM2rQhGSxv3HpBiP126jM9PL9hqr3 2L4W6FqLD5UQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,357,1580803200"; d="scan'208";a="330363696" Received: from fmsmsx107.amr.corp.intel.com ([10.18.124.205]) by orsmga001.jf.intel.com with ESMTP; 07 Apr 2020 17:15:40 -0700 Received: from fmsmsx154.amr.corp.intel.com (10.18.116.70) by fmsmsx107.amr.corp.intel.com (10.18.124.205) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 7 Apr 2020 17:15:40 -0700 Received: from shsmsx104.ccr.corp.intel.com (10.239.4.70) by FMSMSX154.amr.corp.intel.com (10.18.116.70) with Microsoft SMTP Server (TLS) id 14.3.439.0; Tue, 7 Apr 2020 17:15:40 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.146]) by SHSMSX104.ccr.corp.intel.com ([169.254.5.225]) with mapi id 14.03.0439.000; Wed, 8 Apr 2020 08:15:37 +0800 From: "Zhang, Qi Z" To: "Iremonger, Bernard" , "Guo, Jia" , "Ye, Xiaolong" CC: "dev@dpdk.org" , "Wu, Jingjing" , "Cao, Yahui" , "Su, Simei" , "Guo, Jia" Thread-Topic: [dpdk-dev] [dpdk-dev v2 1/4] ethdev: add new RSS offload types Thread-Index: AQHWA0J2G00OmavZ8UmPOihj2PJ+gqhtb+wAgAD/BRA= Date: Wed, 8 Apr 2020 00:15:37 +0000 Message-ID: <039ED4275CED7440929022BC67E70611547F50D6@SHSMSX103.ccr.corp.intel.com> References: <20200318170401.7938-5-jia.guo@intel.com> <20200326164039.36687-1-jia.guo@intel.com> <20200326164039.36687-2-jia.guo@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [dpdk-dev v2 1/4] ethdev: add new RSS offload types X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" > -----Original Message----- > From: Iremonger, Bernard > Sent: Wednesday, April 8, 2020 1:02 AM > To: Guo, Jia ; Ye, Xiaolong ; > Zhang, Qi Z > Cc: dev@dpdk.org; Wu, Jingjing ; Cao, Yahui > ; Su, Simei ; Guo, Jia > > Subject: RE: [dpdk-dev] [dpdk-dev v2 1/4] ethdev: add new RSS offload typ= es >=20 > Hi Jeff, >=20 > > -----Original Message----- > > From: dev On Behalf Of Jeff Guo > > Sent: Thursday, March 26, 2020 4:41 PM > > To: Ye, Xiaolong ; Zhang, Qi Z > > > > Cc: dev@dpdk.org; Wu, Jingjing ; Cao, Yahui > > ; Su, Simei ; Guo, Jia > > > > Subject: [dpdk-dev] [dpdk-dev v2 1/4] ethdev: add new RSS offload > > types > > > > Defines some new RSS offload types for ETH/SVLAN/CVLAN/GTPU/L2TPV3/ > > ESP/AH/PFCP. > > > > Signed-off-by: Jeff Guo > > --- > > v1: > > 1.refine some rte eth rss offload types. > > --- > > lib/librte_ethdev/rte_ethdev.h | 11 ++++++++++- > > 1 file changed, 10 insertions(+), 1 deletion(-) > > > > diff --git a/lib/librte_ethdev/rte_ethdev.h > > b/lib/librte_ethdev/rte_ethdev.h index d1a593ad1..29cdf07cd 100644 > > --- a/lib/librte_ethdev/rte_ethdev.h > > +++ b/lib/librte_ethdev/rte_ethdev.h > > @@ -511,6 +511,13 @@ struct rte_eth_rss_conf { > > #define ETH_RSS_GENEVE (1ULL << 20) > > #define ETH_RSS_NVGRE (1ULL << 21) > > #define ETH_RSS_GTPU (1ULL << 23) > > +#define ETH_RSS_ETH (1ULL << 24) > > +#define ETH_RSS_S_VLAN (1ULL << 25) > > +#define ETH_RSS_C_VLAN (1ULL << 26) > > +#define ETH_RSS_IPSEC_ESP (1ULL << 27) > > +#define ETH_RSS_IPSEC_AH (1ULL << 28) >=20 > Is IPSEC needed in above ESP and AH macros? > Would ETH_RSS_ESP and ETH_RSS_AH be sufficient ? +1 >=20 > > +#define ETH_RSS_L2TPV3 (1ULL << 29) > > +#define ETH_RSS_PFCP (1ULL << 30) > > > > /* > > * We use the following macros to combine with above ETH_RSS_* for > @@ > > - > > 524,7 +531,9 @@ struct rte_eth_rss_conf { > > #define ETH_RSS_L3_SRC_ONLY (1ULL << 63) > > #define ETH_RSS_L3_DST_ONLY (1ULL << 62) > > #define ETH_RSS_L4_SRC_ONLY (1ULL << 61) > > -#define ETH_RSS_L4_DST_ONLY (1ULL << 60) > > +#define ETH_RSS_L4_DST_ONLY (1ULL << 60) > > +#define ETH_RSS_ETH_SRC_ONLY (1ULL << 59) > > +#define ETH_RSS_ETH_DST_ONLY (1ULL << 58) > > > > /** > > * For input set change of hash filter, if SRC_ONLY and DST_ONLY of > > -- > > 2.20.1 >=20 > Regards, >=20 > Bernard.