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From: "Zhang, Qi Z" <qi.z.zhang@intel.com>
To: "Iremonger, Bernard" <bernard.iremonger@intel.com>, "Guo, Jia"
<jia.guo@intel.com>, "Ye, Xiaolong" <xiaolong.ye@intel.com>
CC: "dev@dpdk.org" <dev@dpdk.org>, "Wu, Jingjing" <jingjing.wu@intel.com>,
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Jia" <jia.guo@intel.com>
Thread-Topic: [dpdk-dev] [dpdk-dev v2 1/4] ethdev: add new RSS offload types
Thread-Index: AQHWA0J2G00OmavZ8UmPOihj2PJ+gqhtb+wAgAD/BRA=
Date: Wed, 8 Apr 2020 00:15:37 +0000
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Subject: Re: [dpdk-dev] [dpdk-dev v2 1/4] ethdev: add new RSS offload types
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> -----Original Message-----
> From: Iremonger, Bernard <bernard.iremonger@intel.com>
> Sent: Wednesday, April 8, 2020 1:02 AM
> To: Guo, Jia <jia.guo@intel.com>; Ye, Xiaolong <xiaolong.ye@intel.com>;
> Zhang, Qi Z <qi.z.zhang@intel.com>
> Cc: dev@dpdk.org; Wu, Jingjing <jingjing.wu@intel.com>; Cao, Yahui
> <yahui.cao@intel.com>; Su, Simei <simei.su@intel.com>; Guo, Jia
> <jia.guo@intel.com>
> Subject: RE: [dpdk-dev] [dpdk-dev v2 1/4] ethdev: add new RSS offload typ=
es
>=20
> Hi Jeff,
>=20
> > -----Original Message-----
> > From: dev <dev-bounces@dpdk.org> On Behalf Of Jeff Guo
> > Sent: Thursday, March 26, 2020 4:41 PM
> > To: Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z
> > <qi.z.zhang@intel.com>
> > Cc: dev@dpdk.org; Wu, Jingjing <jingjing.wu@intel.com>; Cao, Yahui
> > <yahui.cao@intel.com>; Su, Simei <simei.su@intel.com>; Guo, Jia
> > <jia.guo@intel.com>
> > Subject: [dpdk-dev] [dpdk-dev v2 1/4] ethdev: add new RSS offload
> > types
> >
> > Defines some new RSS offload types for ETH/SVLAN/CVLAN/GTPU/L2TPV3/
> > ESP/AH/PFCP.
> >
> > Signed-off-by: Jeff Guo <jia.guo@intel.com>
> > ---
> > v1:
> > 1.refine some rte eth rss offload types.
> > ---
> > lib/librte_ethdev/rte_ethdev.h | 11 ++++++++++-
> > 1 file changed, 10 insertions(+), 1 deletion(-)
> >
> > diff --git a/lib/librte_ethdev/rte_ethdev.h
> > b/lib/librte_ethdev/rte_ethdev.h index d1a593ad1..29cdf07cd 100644
> > --- a/lib/librte_ethdev/rte_ethdev.h
> > +++ b/lib/librte_ethdev/rte_ethdev.h
> > @@ -511,6 +511,13 @@ struct rte_eth_rss_conf {
> > #define ETH_RSS_GENEVE (1ULL << 20)
> > #define ETH_RSS_NVGRE (1ULL << 21)
> > #define ETH_RSS_GTPU (1ULL << 23)
> > +#define ETH_RSS_ETH (1ULL << 24)
> > +#define ETH_RSS_S_VLAN (1ULL << 25)
> > +#define ETH_RSS_C_VLAN (1ULL << 26)
> > +#define ETH_RSS_IPSEC_ESP (1ULL << 27)
> > +#define ETH_RSS_IPSEC_AH (1ULL << 28)
>=20
> Is IPSEC needed in above ESP and AH macros?
> Would ETH_RSS_ESP and ETH_RSS_AH be sufficient ?
+1
>=20
> > +#define ETH_RSS_L2TPV3 (1ULL << 29)
> > +#define ETH_RSS_PFCP (1ULL << 30)
> >
> > /*
> > * We use the following macros to combine with above ETH_RSS_* for
> @@
> > -
> > 524,7 +531,9 @@ struct rte_eth_rss_conf {
> > #define ETH_RSS_L3_SRC_ONLY (1ULL << 63)
> > #define ETH_RSS_L3_DST_ONLY (1ULL << 62)
> > #define ETH_RSS_L4_SRC_ONLY (1ULL << 61)
> > -#define ETH_RSS_L4_DST_ONLY (1ULL << 60)
> > +#define ETH_RSS_L4_DST_ONLY (1ULL << 60)
> > +#define ETH_RSS_ETH_SRC_ONLY (1ULL << 59)
> > +#define ETH_RSS_ETH_DST_ONLY (1ULL << 58)
> >
> > /**
> > * For input set change of hash filter, if SRC_ONLY and DST_ONLY of
> > --
> > 2.20.1
>=20
> Regards,
>=20
> Bernard.