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To: "'zhoumin'" <zhoumin@loongson.cn>,
 "'Thomas Monjalon'" <thomas@monjalon.net>,
 "'Ruifeng Wang'" <Ruifeng.Wang@arm.com>,
 "'Zhang, Qi Z'" <qi.z.zhang@intel.com>
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Subject: RE: [PATCH v3] net/ixgbe: add proper memory barriers for some Rx
 functions
Date: Tue, 13 Jun 2023 11:30:21 +0800
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On Tuesday, June 13, 2023 9:43 AM, zhoumin wrote:
> On Mon, June 12, 2023 at 8:44PM, Thomas Monjalon wrote:
> > 12/06/2023 13:58, zhoumin:
> >> On Mon, June 12, 2023 at 6:26PM, Thomas Monjalon wrote:
> >>> 15/05/2023 04:10, Zhang, Qi Z:
> >>>> From: Ruifeng Wang <Ruifeng.Wang@arm.com>
> >>>>> From: Min Zhou <zhoumin@loongson.cn>
> >>>>>> ---
> >>>>>> v3:
> >>>>>> - Use rte_smp_rmb() as the proper memory barrier instead of rte_rmb()
> >>>>>> ---
> >>>>>> v2:
> >>>>>> - Make the calling of rte_rmb() for all platforms
> >>>>>> ---

Hi zhoumin,

I recently learned that Loongson is doing tests with Wangxun NICs on 3C5000, and also
found this problem on Wangxun NICs. I'm wondering if it would also be fixed on txgbe/ngbe.

Thanks.