From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 4C47FA00BE; Tue, 7 Jul 2020 08:11:15 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 7173B1DA33; Tue, 7 Jul 2020 08:11:14 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id A4F021DA32 for ; Tue, 7 Jul 2020 08:11:12 +0200 (CEST) IronPort-SDR: 8XorCOOjiAkpltwnbn3rwEXLt8NFlqeUaXGtGeAact5o7u29/HRGajqqHZUZRQWhzXpsiZXi5P eUsL1RIni70Q== X-IronPort-AV: E=McAfee;i="6000,8403,9674"; a="212514876" X-IronPort-AV: E=Sophos;i="5.75,321,1589266800"; d="scan'208";a="212514876" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jul 2020 23:11:11 -0700 IronPort-SDR: 4OjJxR1oyocZgSeUQmpi1jPZlIySAA7/SkNZqkXaJMoewi5+711sjedX8ollsGHuxRfayOR1UJ Um/7LGNCCXdg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,321,1589266800"; d="scan'208";a="283342693" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by orsmga006.jf.intel.com with ESMTP; 06 Jul 2020 23:11:10 -0700 Received: from fmsmsx117.amr.corp.intel.com (10.18.116.17) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 6 Jul 2020 23:11:10 -0700 Received: from shsmsx102.ccr.corp.intel.com (10.239.4.154) by fmsmsx117.amr.corp.intel.com (10.18.116.17) with Microsoft SMTP Server (TLS) id 14.3.439.0; Mon, 6 Jul 2020 23:11:09 -0700 Received: from shsmsx101.ccr.corp.intel.com ([169.254.1.22]) by shsmsx102.ccr.corp.intel.com ([169.254.2.43]) with mapi id 14.03.0439.000; Tue, 7 Jul 2020 14:11:06 +0800 From: "Sun, GuinanX" To: "Xing, Beilei" , "dev@dpdk.org" CC: "Guo, Jia" Thread-Topic: [PATCH v2] net/i40e: enable port filter by switch filter Thread-Index: AQHWTpn3asQ+Om297k2e7WQ0qloQ3KjwKGwAgAO0ZoA= Date: Tue, 7 Jul 2020 06:11:05 +0000 Message-ID: <05758BDAD7FC8E4BAED63D0390A8A9558780BD@SHSMSX101.ccr.corp.intel.com> References: <20200611052416.14592-1-guinanx.sun@intel.com> <20200630044205.54900-1-guinanx.sun@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2] net/i40e: enable port filter by switch filter X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi beilei > -----Original Message----- > From: Xing, Beilei > Sent: Tuesday, June 30, 2020 2:16 PM > To: Sun, GuinanX ; dev@dpdk.org > Cc: Guo, Jia > Subject: RE: [PATCH v2] net/i40e: enable port filter by switch filter >=20 >=20 >=20 > > -----Original Message----- > > From: Sun, GuinanX > > Sent: Tuesday, June 30, 2020 12:42 PM > > To: dev@dpdk.org > > Cc: Xing, Beilei ; Guo, Jia > > ; Sun, GuinanX > > Subject: [PATCH v2] net/i40e: enable port filter by switch filter >=20 > How about 'support cloud filter with l4 port'? I agree with you , patch v3 will fix it. >=20 > Please also fix all the warnings in patchwork: > http://mails.dpdk.org/archives/test-report/2020-June/139555.html. Issues that affect readability have not been modified, others have been mod= ified. >=20 > > > > This patch enables the filter that supports to create following two > > rules for the same packet type: >=20 > Better to clarify which packet types will be supported. Patch V3 will fix it. >=20 > > One is to select source port only as input set and the other is for > > destination port only. > > > > Signed-off-by: Guinan Sun > > --- > > v2: > > * Fixed code style and variable naming > > --- > > doc/guides/rel_notes/release_20_08.rst | 8 + > > drivers/net/i40e/i40e_ethdev.c | 195 ++++++++++++++++++++- > > drivers/net/i40e/i40e_ethdev.h | 17 ++ > > drivers/net/i40e/i40e_flow.c | 223 +++++++++++++++++++++++++ > > 4 files changed, 442 insertions(+), 1 deletion(-) > > > > diff --git a/doc/guides/rel_notes/release_20_08.rst > > b/doc/guides/rel_notes/release_20_08.rst > > index 3c40424cc..c4d094eac 100644 > > --- a/doc/guides/rel_notes/release_20_08.rst > > +++ b/doc/guides/rel_notes/release_20_08.rst > > @@ -87,6 +87,14 @@ New Features > > > > * Added support for DCF datapath configuration. > > > > +* **Updated Intel i40e driver.** > > + > > + Updated i40e PMD with new features and improvements, including: > > + > > + * Added a new type of cloud filter to support the coexistence of the > > + following two rules. One selects L4 destination as input set and >=20 > L4 destination port Patch V3 will fix it. >=20 > > + the other one selects L4 source port. > > + >=20 > BTW, replace filter is used for the patch, so which protocol is impacted = with > this change? > e.g. If using this feature, can cloud filter for vxlan work well? > If there's any impact, please add the limitation in the doc. Limitation has been added in the doc. >=20 > > Removed Items > > ------------- > > > > diff --git a/drivers/net/i40e/i40e_ethdev.c > > b/drivers/net/i40e/i40e_ethdev.c index 970a31cb2..cea7f6b59 100644 > > --- a/drivers/net/i40e/i40e_ethdev.c > > +++ b/drivers/net/i40e/i40e_ethdev.c > > @@ -7956,6 +7956,13 @@ i40e_dev_tunnel_filter_set(struct i40e_pf *pf, > > #define I40E_TR_GRE_KEY_MASK0x400 #define > > I40E_TR_GRE_KEY_WITH_XSUM_MASK0x800 > > #define I40E_TR_GRE_NO_KEY_MASK0x8000 > > +#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_PORT_TR_WORD0 0x49 > > #define > > +I40E_AQC_REPLACE_CLOUD_CMD_INPUT_DIRECTION_WORD0 0x41 > > #define > > +I40E_AQC_REPLACE_CLOUD_CMD_INPUT_INGRESS_WORD0 0x80 #define > > +I40E_DIRECTION_INGRESS_KEY0x8000 #define I40E_TR_L4_TYPE_TCP0x2 > > +#define I40E_TR_L4_TYPE_UDP0x4 #define I40E_TR_L4_TYPE_SCTP0x8 > > > > static enum > > i40e_status_code i40e_replace_mpls_l1_filter(struct i40e_pf *pf) @@ - > > 8254,6 +8261,131 @@ i40e_status_code > > i40e_replace_gtp_cloud_filter(struct > > i40e_pf *pf) > > return status; > > } > > > > +static enum i40e_status_code > > +i40e_replace_port_l1_filter(struct i40e_pf *pf, enum > > +i40e_l4_port_type > > +l4_port_type) { > > +struct i40e_aqc_replace_cloud_filters_cmd_buf filter_replace_buf; > > +struct i40e_aqc_replace_cloud_filters_cmd filter_replace; enum > > +i40e_status_code status =3D I40E_SUCCESS; struct i40e_hw *hw =3D > > +I40E_PF_TO_HW(pf); struct rte_eth_dev *dev =3D ((struct i40e_adapter > > +*)hw->back)- > > >eth_dev; > > + > > +if (pf->support_multi_driver) { > > +PMD_DRV_LOG(ERR, "Replace l1 filter is not supported."); return > > +I40E_NOT_SUPPORTED; } > > + > > +memset(&filter_replace, 0, > > + sizeof(struct i40e_aqc_replace_cloud_filters_cmd)); > > +memset(&filter_replace_buf, 0, > > + sizeof(struct i40e_aqc_replace_cloud_filters_cmd_buf)); > > + > > +/* create L1 filter */ > > +if (l4_port_type =3D=3D I40E_L4_PORT_TYPE_SRC) { > > +filter_replace.old_filter_type =3D > > + > > I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TUNNLE_KEY; > > +filter_replace.new_filter_type =3D > > I40E_AQC_ADD_CLOUD_FILTER_0X11; >=20 > To create L1 filter, so should be I40E_AQC_ADD_L1_FILTER_0X11 here? Patch V3 will fix it. >=20 > > +filter_replace_buf.data[8] =3D > > + > > I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_SRC_PORT; > > +} else { > > +filter_replace.old_filter_type =3D > > + > > I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG_IVLAN; > > +filter_replace.new_filter_type =3D > > I40E_AQC_ADD_CLOUD_FILTER_0X10; >=20 > Same as above. Patch V3 will fix it. >=20 > > +filter_replace_buf.data[8] =3D > > + > > I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_DST_PORT; > > +} > > + > > +filter_replace.tr_bit =3D 0; > > +/* Prepare the buffer, 3 entries */ > > +filter_replace_buf.data[0] =3D > > + > > I40E_AQC_REPLACE_CLOUD_CMD_INPUT_DIRECTION_WORD0; > > +filter_replace_buf.data[0] |=3D > > +I40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED; > > +filter_replace_buf.data[2] =3D 0x00; > > +filter_replace_buf.data[3] =3D > > +I40E_AQC_REPLACE_CLOUD_CMD_INPUT_INGRESS_WORD0; > > +filter_replace_buf.data[4] =3D > > +I40E_AQC_REPLACE_CLOUD_CMD_INPUT_PORT_TR_WORD0; > > +filter_replace_buf.data[4] |=3D > > +I40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED; > > +filter_replace_buf.data[5] =3D 0x00; > > +filter_replace_buf.data[6] =3D I40E_TR_L4_TYPE_UDP | > > +I40E_TR_L4_TYPE_TCP | I40E_TR_L4_TYPE_SCTP; > > +filter_replace_buf.data[7] =3D 0x00; filter_replace_buf.data[8] |=3D > > +I40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED; > > +filter_replace_buf.data[9] =3D 0x00; > > +filter_replace_buf.data[10] =3D 0xFF; > > +filter_replace_buf.data[11] =3D 0xFF; > > + > > +status =3D i40e_aq_replace_cloud_filters(hw, &filter_replace, > > + &filter_replace_buf); > > +if (!status && (filter_replace.old_filter_type !=3D > > +filter_replace.new_filter_type)) > > +PMD_DRV_LOG(WARNING, "i40e device %s changed cloud l1 > > type." > > + " original: 0x%x, new: 0x%x", > > + dev->device->name, > > + filter_replace.old_filter_type, > > + filter_replace.new_filter_type); > > + > > +return status; > > +} > > + > > +static enum > > +i40e_status_code i40e_replace_port_cloud_filter(struct i40e_pf *pf, > > +enum i40e_l4_port_type > > l4_port_type) { > > +struct i40e_aqc_replace_cloud_filters_cmd_buf filter_replace_buf; > > +struct i40e_aqc_replace_cloud_filters_cmd filter_replace; enum > > +i40e_status_code status =3D I40E_SUCCESS; struct i40e_hw *hw =3D > > +I40E_PF_TO_HW(pf); struct rte_eth_dev *dev =3D ((struct i40e_adapter > > +*)hw->back)- > > >eth_dev; > > + > > +if (pf->support_multi_driver) { > > +PMD_DRV_LOG(ERR, "Replace cloud filter is not supported."); return > > +I40E_NOT_SUPPORTED; } > > + > > +memset(&filter_replace, 0, > > + sizeof(struct i40e_aqc_replace_cloud_filters_cmd)); > > +memset(&filter_replace_buf, 0, > > + sizeof(struct i40e_aqc_replace_cloud_filters_cmd_buf)); > > + > > +if (l4_port_type =3D=3D I40E_L4_PORT_TYPE_SRC) { > > +filter_replace.old_filter_type =3D > > I40E_AQC_ADD_CLOUD_FILTER_IIP; > > +filter_replace.new_filter_type =3D > > +I40E_AQC_ADD_L1_FILTER_0X11; > > +filter_replace_buf.data[4] =3D > > I40E_AQC_ADD_CLOUD_FILTER_0X11; > > +} else { > > +filter_replace.old_filter_type =3D > > I40E_AQC_ADD_CLOUD_FILTER_OIP; > > +filter_replace.new_filter_type =3D > > +I40E_AQC_ADD_CLOUD_FILTER_0X10; > > +filter_replace_buf.data[4] =3D > > I40E_AQC_ADD_CLOUD_FILTER_0X10; > > +} > > + > > +filter_replace.valid_flags =3D I40E_AQC_REPLACE_CLOUD_FILTER; > > +filter_replace.tr_bit =3D 0; > > +/* Prepare the buffer, 2 entries */ > > +filter_replace_buf.data[0] =3D > > I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_STAG; > > +filter_replace_buf.data[0] |=3D > > +I40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED; > > +filter_replace_buf.data[4] |=3D > > +I40E_AQC_REPLACE_CLOUD_CMD_INPUT_VALIDATED; > > +status =3D i40e_aq_replace_cloud_filters(hw, &filter_replace, > > + &filter_replace_buf); > > + > > +if (!status && (filter_replace.old_filter_type !=3D > > +filter_replace.new_filter_type)) > > +PMD_DRV_LOG(WARNING, "i40e device %s changed cloud > > filter type." > > + " original: 0x%x, new: 0x%x", > > + dev->device->name, > > + filter_replace.old_filter_type, > > + filter_replace.new_filter_type); > > + > > +return status; > > +} > > + > > int > > i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf, > > struct i40e_tunnel_filter_conf *tunnel_filter, @@ -8401,6 > > +8533,58 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf, > > pfilter->general_fields[0] =3D tunnel_filter->inner_vlan; > > pfilter->general_fields[1] =3D tunnel_filter->outer_vlan; big_buffer = =3D > > 1; > > +break; > > +case I40E_TUNNEL_TYPE_UDP: > > +case I40E_TUNNEL_TYPE_TCP: > > +case I40E_TUNNEL_TYPE_SCTP: >=20 > What's the tunnel_type_udp/tcp/sctp? It's not for tunnel, just normal > UDP/TCP/SCTP. Patch V3 will fix it. >=20 > > +if (tunnel_filter->l4_port_type =3D=3D I40E_L4_PORT_TYPE_SRC) { if > > +(!pf->sport_replace_flag) { i40e_replace_port_l1_filter(pf, > > +tunnel_filter- > > >l4_port_type); > > +i40e_replace_port_cloud_filter(pf, > > tunnel_filter->l4_port_type); > > +pf->sport_replace_flag =3D 1; > > +} > > +teid_le =3D rte_cpu_to_le_32(tunnel_filter->tenant_id); > > +pfilter- > > >general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD0] =3D > > +I40E_DIRECTION_INGRESS_KEY; > > + > > +if (tunnel_filter->tunnel_type =3D=3D > > I40E_TUNNEL_TYPE_UDP) > > +pfilter- > > >general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD1] =3D > > +I40E_TR_L4_TYPE_UDP; > > +else if (tunnel_filter->tunnel_type =3D=3D > > I40E_TUNNEL_TYPE_TCP) > > +pfilter- > > >general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD1] =3D > > +I40E_TR_L4_TYPE_TCP; > > +else > > +pfilter- > > >general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD1] =3D > > +I40E_TR_L4_TYPE_SCTP; > > + > > +pfilter- > > >general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X11_WORD2] =3D > > +(teid_le >> 16) & 0xFFFF; > > +big_buffer =3D 1; > > +} else { > > +if (!pf->dport_replace_flag) { > > +i40e_replace_port_l1_filter(pf, tunnel_filter- > > >l4_port_type); > > +i40e_replace_port_cloud_filter(pf, > > tunnel_filter->l4_port_type); > > +pf->dport_replace_flag =3D 1; > > +} > > +teid_le =3D rte_cpu_to_le_32(tunnel_filter->tenant_id); > > +pfilter- > > >general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD0] =3D > > +I40E_DIRECTION_INGRESS_KEY; > > + > > +if (tunnel_filter->tunnel_type =3D=3D > > I40E_TUNNEL_TYPE_UDP) > > +pfilter- > > >general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD1] =3D > > +I40E_TR_L4_TYPE_UDP; > > +else if (tunnel_filter->tunnel_type =3D=3D > > I40E_TUNNEL_TYPE_TCP) > > +pfilter- > > >general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD1] =3D > > +I40E_TR_L4_TYPE_TCP; > > +else > > +pfilter- > > >general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD1] =3D > > +I40E_TR_L4_TYPE_SCTP; > > + > > +pfilter- > > >general_fields[I40E_AQC_ADD_CLOUD_FV_FLU_0X10_WORD2] =3D > > +(teid_le >> 16) & 0xFFFF; > > +big_buffer =3D 1; > > +} > > + > > break; > > default: > > /* Other tunnel types is not supported. */ @@ -8424,7 > > +8608,16 @@ i40e_dev_consistent_tunnel_filter_set(struct i40e_pf *pf, > > else if (tunnel_filter->tunnel_type =3D=3D I40E_TUNNEL_TYPE_QINQ) > > pfilter->element.flags |=3D I40E_AQC_ADD_CLOUD_FILTER_0X10; -else { > > +else if (tunnel_filter->tunnel_type =3D=3D I40E_TUNNEL_TYPE_UDP || > > +tunnel_filter->tunnel_type =3D=3D I40E_TUNNEL_TYPE_TCP || > > +tunnel_filter->tunnel_type =3D=3D I40E_TUNNEL_TYPE_SCTP) { if > > +(tunnel_filter->l4_port_type =3D=3D I40E_L4_PORT_TYPE_SRC) > > +pfilter->element.flags |=3D > > +I40E_AQC_ADD_L1_FILTER_0X11; > > +else > > +pfilter->element.flags |=3D > > +I40E_AQC_ADD_CLOUD_FILTER_0X10; > > +} else { > > val =3D i40e_dev_get_filter_type(tunnel_filter->filter_type, > > &pfilter->element.flags); > > if (val < 0) { > > diff --git a/drivers/net/i40e/i40e_ethdev.h > > b/drivers/net/i40e/i40e_ethdev.h index e5d0ce53f..56955068b 100644 > > --- a/drivers/net/i40e/i40e_ethdev.h > > +++ b/drivers/net/i40e/i40e_ethdev.h > > @@ -767,6 +767,8 @@ struct i40e_rss_pattern_info { > > > > #define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TEID_WORD0 44 > #define > > I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_TEID_WORD1 45 > > +#define I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_SRC_PORT 29 > #define > > +I40E_AQC_REPLACE_CLOUD_CMD_INPUT_FV_DST_PORT 30 > > #define I40E_AQC_ADD_CLOUD_TNL_TYPE_MPLSOUDP8 > > #define I40E_AQC_ADD_CLOUD_TNL_TYPE_MPLSOGRE9 > > #define I40E_AQC_ADD_CLOUD_FILTER_0X100x10 > > @@ -828,9 +830,20 @@ enum i40e_tunnel_type > { I40E_TUNNEL_TYPE_GTPU, > > I40E_TUNNEL_TYPE_ESPoUDP, I40E_TUNNEL_TYPE_ESPoIP, > > +I40E_TUNNEL_TYPE_UDP, > > +I40E_TUNNEL_TYPE_TCP, > > +I40E_TUNNEL_TYPE_SCTP, >=20 > the macro name should be changed. Patch V3 will fix it. >=20 > > I40E_TUNNEL_TYPE_MAX, > > }; > > > > +/** > > + * L4 port type. > > + */ > > +enum i40e_l4_port_type { > > +I40E_L4_PORT_TYPE_SRC =3D 0, > > +I40E_L4_PORT_TYPE_DST, > > +}; > > + > ... >=20