From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id C3B1B7CEA for ; Thu, 26 Apr 2018 12:45:53 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Apr 2018 03:45:52 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.49,330,1520924400"; d="scan'208";a="35421195" Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by fmsmga008.fm.intel.com with ESMTP; 26 Apr 2018 03:45:52 -0700 Received: from fmsmsx121.amr.corp.intel.com (10.18.125.36) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 26 Apr 2018 03:45:51 -0700 Received: from shsmsx152.ccr.corp.intel.com (10.239.6.52) by fmsmsx121.amr.corp.intel.com (10.18.125.36) with Microsoft SMTP Server (TLS) id 14.3.319.2; Thu, 26 Apr 2018 03:45:52 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.240]) by SHSMSX152.ccr.corp.intel.com ([169.254.6.6]) with mapi id 14.03.0319.002; Thu, 26 Apr 2018 18:45:51 +0800 From: "Xu, Rosen" To: Hemant Agrawal , "dev@dpdk.org" , "Richardson, Bruce" CC: "Doherty, Declan" , "shreyansh.jain@nxp.com" , "Yigit, Ferruh" , "Ananyev, Konstantin" , "Zhang, Tianfei" , "Wu, Hao" , "gaetan.rivet@6wind.com" , "Xu, Yilun" Thread-Topic: [dpdk-dev] [PATCH v5 3/3] Add Intel FPGA OPAE Share Code Thread-Index: AQHTzAyGkz97Gh04Y0G1AZaEtfhs0qQS/xYA Date: Thu, 26 Apr 2018 10:45:50 +0000 Message-ID: <0E78D399C70DA940A335608C6ED296D739F91E7E@SHSMSX104.ccr.corp.intel.com> References: <1521553556-62982-1-git-send-email-rosen.xu@intel.com> <1522824677-86958-1-git-send-email-rosen.xu@intel.com> <1522824677-86958-4-git-send-email-rosen.xu@intel.com> <3ac95e6a-9554-1d94-9f97-fcb85e870caa@nxp.com> In-Reply-To: <3ac95e6a-9554-1d94-9f97-fcb85e870caa@nxp.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiM2U4NzVmY2QtNGJjZS00ZjVkLTk5MWYtZTBkMTA3MjI5ZmFhIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE2LjUuOS4zIiwiVHJ1c3RlZExhYmVsSGFzaCI6Ik9MUzNSVFV0XC9GczhNRFwvdlFZbFF6aE1QS3RqWG9HejUxYkRFb1wvNDNWcWc9In0= x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.200.100 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v5 3/3] Add Intel FPGA OPAE Share Code X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 26 Apr 2018 10:45:54 -0000 SGkgSGVtYW50LA0KDQo+IC0tLS0tT3JpZ2luYWwgTWVzc2FnZS0tLS0tDQo+IEZyb206IEhlbWFu dCBBZ3Jhd2FsIFttYWlsdG86aGVtYW50LmFncmF3YWxAbnhwLmNvbV0NCj4gU2VudDogV2VkbmVz ZGF5LCBBcHJpbCAwNCwgMjAxOCAyMDowMA0KPiBUbzogWHUsIFJvc2VuIDxyb3Nlbi54dUBpbnRl bC5jb20+OyBkZXZAZHBkay5vcmc7IFJpY2hhcmRzb24sIEJydWNlDQo+IDxicnVjZS5yaWNoYXJk c29uQGludGVsLmNvbT4NCj4gQ2M6IERvaGVydHksIERlY2xhbiA8ZGVjbGFuLmRvaGVydHlAaW50 ZWwuY29tPjsgc2hyZXlhbnNoLmphaW5AbnhwLmNvbTsNCj4gWWlnaXQsIEZlcnJ1aCA8ZmVycnVo LnlpZ2l0QGludGVsLmNvbT47IEFuYW55ZXYsIEtvbnN0YW50aW4NCj4gPGtvbnN0YW50aW4uYW5h bnlldkBpbnRlbC5jb20+OyBaaGFuZywgVGlhbmZlaSA8dGlhbmZlaS56aGFuZ0BpbnRlbC5jb20+ Ow0KPiBXdSwgSGFvIDxoYW8ud3VAaW50ZWwuY29tPjsgZ2FldGFuLnJpdmV0QDZ3aW5kLmNvbTsg WHUsIFlpbHVuDQo+IDx5aWx1bi54dUBpbnRlbC5jb20+DQo+IFN1YmplY3Q6IFJlOiBbZHBkay1k ZXZdIFtQQVRDSCB2NSAzLzNdIEFkZCBJbnRlbCBGUEdBIE9QQUUgU2hhcmUgQ29kZQ0KPiANCj4g DQo+IEhpIFJvc2VuL0JydWNlLA0KPiANCj4gT24gNC80LzIwMTggMTI6MjEgUE0sIFJvc2VuIFh1 IHdyb3RlOg0KPiA+ICsrKyBiL2RyaXZlcnMvcmF3L2lmcGdhX3Jhd2Rldi9iYXNlL01ha2VmaWxl DQo+ID4gQEAgLTAsMCArMSw1NCBAQA0KPiA+ICsjICAgQlNEIExJQ0VOU0UNCj4gPiArIw0KPiA+ ICsjICAgQ29weXJpZ2h0KGMpIDIwMTctMjAxOCBJbnRlbCBDb3Jwb3JhdGlvbi4gQWxsIHJpZ2h0 cyByZXNlcnZlZC4NCj4gPiArIyAgIEFsbCByaWdodHMgcmVzZXJ2ZWQuDQo+ID4gKyMNCj4gPiAr IyAgIFJlZGlzdHJpYnV0aW9uIGFuZCB1c2UgaW4gc291cmNlIGFuZCBiaW5hcnkgZm9ybXMsIHdp dGggb3Igd2l0aG91dA0KPiA+ICsjICAgbW9kaWZpY2F0aW9uLCBhcmUgcGVybWl0dGVkIHByb3Zp ZGVkIHRoYXQgdGhlIGZvbGxvd2luZyBjb25kaXRpb25zDQo+ID4gKyMgICBhcmUgbWV0Og0KPiA+ ICsjDQo+ID4gKyMgICAgICogUmVkaXN0cmlidXRpb25zIG9mIHNvdXJjZSBjb2RlIG11c3QgcmV0 YWluIHRoZSBhYm92ZSBjb3B5cmlnaHQNCj4gPiArIyAgICAgICBub3RpY2UsIHRoaXMgbGlzdCBv ZiBjb25kaXRpb25zIGFuZCB0aGUgZm9sbG93aW5nIGRpc2NsYWltZXIuDQo+ID4gKyMgICAgICog UmVkaXN0cmlidXRpb25zIGluIGJpbmFyeSBmb3JtIG11c3QgcmVwcm9kdWNlIHRoZSBhYm92ZSBj b3B5cmlnaHQNCj4gPiArIyAgICAgICBub3RpY2UsIHRoaXMgbGlzdCBvZiBjb25kaXRpb25zIGFu ZCB0aGUgZm9sbG93aW5nIGRpc2NsYWltZXIgaW4NCj4gPiArIyAgICAgICB0aGUgZG9jdW1lbnRh dGlvbiBhbmQvb3Igb3RoZXIgbWF0ZXJpYWxzIHByb3ZpZGVkIHdpdGggdGhlDQo+ID4gKyMgICAg ICAgZGlzdHJpYnV0aW9uLg0KPiA+ICsjICAgICAqIE5laXRoZXIgdGhlIG5hbWUgb2YgSW50ZWwg Q29ycG9yYXRpb24gbm9yIHRoZSBuYW1lcyBvZiBpdHMNCj4gPiArIyAgICAgICBjb250cmlidXRv cnMgbWF5IGJlIHVzZWQgdG8gZW5kb3JzZSBvciBwcm9tb3RlIHByb2R1Y3RzIGRlcml2ZWQNCj4g PiArIyAgICAgICBmcm9tIHRoaXMgc29mdHdhcmUgd2l0aG91dCBzcGVjaWZpYyBwcmlvciB3cml0 dGVuIHBlcm1pc3Npb24uDQo+ID4gKyMNCj4gPiArIyAgIFRISVMgU09GVFdBUkUgSVMgUFJPVklE RUQgQlkgVEhFIENPUFlSSUdIVCBIT0xERVJTIEFORA0KPiBDT05UUklCVVRPUlMNCj4gPiArIyAg ICJBUyBJUyIgQU5EIEFOWSBFWFBSRVNTIE9SIElNUExJRUQgV0FSUkFOVElFUywgSU5DTFVESU5H LCBCVVQNCj4gTk9UDQo+ID4gKyMgICBMSU1JVEVEIFRPLCBUSEUgSU1QTElFRCBXQVJSQU5USUVT IE9GIE1FUkNIQU5UQUJJTElUWSBBTkQNCj4gRklUTkVTUyBGT1INCj4gPiArIyAgIEEgUEFSVElD VUxBUiBQVVJQT1NFIEFSRSBESVNDTEFJTUVELiBJTiBOTyBFVkVOVCBTSEFMTCBUSEUNCj4gQ09Q WVJJR0hUDQo+ID4gKyMgICBPV05FUiBPUiBDT05UUklCVVRPUlMgQkUgTElBQkxFIEZPUiBBTlkg RElSRUNULCBJTkRJUkVDVCwNCj4gSU5DSURFTlRBTCwNCj4gPiArIyAgIFNQRUNJQUwsIEVYRU1Q TEFSWSwgT1IgQ09OU0VRVUVOVElBTCBEQU1BR0VTIChJTkNMVURJTkcsDQo+IEJVVCBOT1QNCj4g PiArIyAgIExJTUlURUQgVE8sIFBST0NVUkVNRU5UIE9GIFNVQlNUSVRVVEUgR09PRFMgT1IgU0VS VklDRVM7DQo+IExPU1MgT0YgVVNFLA0KPiA+ICsjICAgREFUQSwgT1IgUFJPRklUUzsgT1IgQlVT SU5FU1MgSU5URVJSVVBUSU9OKSBIT1dFVkVSIENBVVNFRA0KPiBBTkQgT04gQU5ZDQo+ID4gKyMg ICBUSEVPUlkgT0YgTElBQklMSVRZLCBXSEVUSEVSIElOIENPTlRSQUNULCBTVFJJQ1QgTElBQklM SVRZLCBPUg0KPiBUT1JUDQo+ID4gKyMgICAoSU5DTFVESU5HIE5FR0xJR0VOQ0UgT1IgT1RIRVJX SVNFKSBBUklTSU5HIElOIEFOWSBXQVkgT1VUDQo+IE9GIFRIRSBVU0UNCj4gPiArIyAgIE9GIFRI SVMgU09GVFdBUkUsIEVWRU4gSUYgQURWSVNFRCBPRiBUSEUgUE9TU0lCSUxJVFkgT0YgU1VDSA0K PiBEQU1BR0UuDQo+IA0KPiBUaGVzZSBmaWxlcyBhcmUgYWRkaW5nIHRoZSBmdWxsIGxpY2Vuc2Ug Ym9pbGVyIHBsYXRlLg0KPiBXaGF0IGlzIHlvdXIgcGxhbiB0byBjaGFuZ2UgaXQgdG8gU1BEWD8N Cj4gDQo+IA0KPiBCcnVjZSwgbWF5IGJlIHlvdXIgc2NyaXB0IGNhbiBoZWxwIFJvc2VuIHRvIGRv IGl0IGZhc3Rlci4NCkl0J3MgZml4ZWQgaW4gUEFUQ0ggdjYuDQo+IFJlZ2FyZHMsDQo+IEhlbWFu dA0K