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From: "Xu, Rosen" <rosen.xu@intel.com>
To: "Wu, Jingjing" <jingjing.wu@intel.com>, "dev@dpdk.org" <dev@dpdk.org>,
 "thomas@monjalon.net" <thomas@monjalon.net>
CC: "Zhang, Roy Fan" <roy.fan.zhang@intel.com>, "Doherty, Declan"
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 <konstantin.ananyev@intel.com>, "Zhang, Tianfei" <tianfei.zhang@intel.com>,
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Thread-Topic: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library
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Date: Thu, 10 May 2018 12:20:46 +0000
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Subject: Re: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS Library
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Hi Jingjing,

> -----Original Message-----
> From: Wu, Jingjing
> Sent: Thursday, May 10, 2018 16:44
> To: Xu, Rosen <rosen.xu@intel.com>; dev@dpdk.org; thomas@monjalon.net
> Cc: Xu, Rosen <rosen.xu@intel.com>; Zhang, Roy Fan
> <roy.fan.zhang@intel.com>; Doherty, Declan <declan.doherty@intel.com>;
> Richardson, Bruce <bruce.richardson@intel.com>; shreyansh.jain@nxp.com;
> Yigit, Ferruh <ferruh.yigit@intel.com>; Ananyev, Konstantin
> <konstantin.ananyev@intel.com>; Zhang, Tianfei <tianfei.zhang@intel.com>;
> Liu, Song <song.liu@intel.com>; Wu, Hao <hao.wu@intel.com>;
> gaetan.rivet@6wind.com
> Subject: RE: [dpdk-dev] [PATCH v10 1/3] bus/ifpga: Add Intel FPGA BUS
> Library
>=20
> Hi, Rosen
>=20
> Few comments below.

Thanks a lot Jingjing.
=20
>=20
> Thanks
> Jingjing
>=20
> [......]
> > +static struct rte_ifpga_device *
> > +ifpga_find_ifpga_dev(const struct rte_rawdev *rdev) {
> > +	struct rte_ifpga_device *ifpga_dev =3D NULL;
> > +
> > +	TAILQ_FOREACH(ifpga_dev, &ifpga_device_list, next) {
> > +		if (rdev &&
> rdev -> ifpage_dev  ??

Rdev doesn't has this variable.

> > +			ifpga_dev->rdev &&
> > +			ifpga_dev->rdev =3D=3D rdev)
> > +			return ifpga_dev;
> > +	}
> > +	return NULL;
> > +}
> > +
> > +static struct rte_afu_device *
> > +ifpga_find_afu_dev(const struct rte_ifpga_device *ifpga_dev,
> > +	const struct rte_afu_id *afu_id)
> > +{
> > +	struct rte_afu_device *afu_dev =3D NULL;
> > +
> > +	TAILQ_FOREACH(afu_dev, &ifpga_dev->afu_list, next) {
> > +		if (!ifpga_afu_id_cmp(&afu_dev->id, afu_id))
> Add checking afu_dev?

Fixed.

> [...]
>=20
> > +static int
> > +ifpga_parse(const char *name, void *addr) {
> > +	int *out =3D addr;
> > +	struct rte_rawdev *rawdev =3D NULL;
> > +	char rawdev_name[RTE_RAWDEV_NAME_MAX_LEN];
> > +	char *c1 =3D NULL, *c2 =3D NULL;
> According to coding style, we need to two lines for the definition like:
> char *c1 =3D NULL;
> char *c2 =3D NULL;

Fixed

> > +	int port =3D IFPGA_BUS_DEV_PORT_MAX;
> > +	char str_port[8];
> > +	int str_port_len =3D 0;
> > +	int ret;
> > +
> > +	memset(str_port, 0, 8);
> > +	c1 =3D strchr(name, '|');
> > +	if (c1 !=3D NULL) {
> > +		str_port_len =3D c1-name;
> According to coding style, spaces are required around opreations.

Fixed.

> > +		c2 =3D c1+1;
> > +	}