From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id BE803A00E6 for ; Tue, 11 Jun 2019 04:33:58 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 827F41C228; Tue, 11 Jun 2019 04:33:57 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 9F9891C223; Tue, 11 Jun 2019 04:33:55 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 10 Jun 2019 19:33:54 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,577,1557212400"; d="scan'208";a="183640827" Received: from fmsmsx103.amr.corp.intel.com ([10.18.124.201]) by fmsmga002.fm.intel.com with ESMTP; 10 Jun 2019 19:33:54 -0700 Received: from shsmsx153.ccr.corp.intel.com (10.239.6.53) by FMSMSX103.amr.corp.intel.com (10.18.124.201) with Microsoft SMTP Server (TLS) id 14.3.408.0; Mon, 10 Jun 2019 19:33:54 -0700 Received: from shsmsx104.ccr.corp.intel.com ([169.254.5.137]) by SHSMSX153.ccr.corp.intel.com ([169.254.12.192]) with mapi id 14.03.0415.000; Tue, 11 Jun 2019 10:33:49 +0800 From: "Xu, Rosen" To: "Wei, Dan" , "dev@dpdk.org" CC: "Yigit, Ferruh" , "stable@dpdk.org" Thread-Topic: [DPDK v2] net/ipn3ke: modifications on AFU configurations Thread-Index: AQHVFpKggPhmNelLiEGWrOMJ1JXeWKaEwm7ggAWS6ICAC3l/0A== Date: Tue, 11 Jun 2019 02:33:49 +0000 Message-ID: <0E78D399C70DA940A335608C6ED296D73A7DE0DF@SHSMSX104.ccr.corp.intel.com> References: <1559228335-35214-1-git-send-email-dan.wei@intel.com> <0E78D399C70DA940A335608C6ED296D73A7A536E@SHSMSX104.ccr.corp.intel.com> <35413AA7DC893F4FA6679F94DEE6B7E73C235811@CDSMSX102.ccr.corp.intel.com> In-Reply-To: <35413AA7DC893F4FA6679F94DEE6B7E73C235811@CDSMSX102.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiODI4ZTY1YTAtZjVmZC00ZGQyLTlkNjItNWIxYjY1N2Y1MDVlIiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoia3A3ODNtYktqXC9mWGE5dVZjM1JcL3pWY2VqclwvU1hrVTM0SDI4T25oMHZIUU5za2ZBRjltYVd3U1dJblpQTzAweSJ9 x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.400.15 dlp-reaction: no-action x-originating-ip: [10.239.127.40] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [DPDK v2] net/ipn3ke: modifications on AFU configurations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi Dan, Thanks your clarify, pls apply them in new patch set, not just explain them= in this patch. > -----Original Message----- > From: Wei, Dan > Sent: Tuesday, June 04, 2019 11:19 > To: Xu, Rosen ; dev@dpdk.org > Cc: Yigit, Ferruh ; stable@dpdk.org > Subject: RE: [DPDK v2] net/ipn3ke: modifications on AFU configurations >=20 > Hi Rosen, thank you for your comments. >=20 > > > > -----Original Message----- > > > From: Wei, Dan > > > Sent: Thursday, May 30, 2019 22:59 > > > To: dev@dpdk.org > > > Cc: Yigit, Ferruh ; Wei, Dan > > > ; Xu, Rosen ; > stable@dpdk.org > > > Subject: [DPDK v2] net/ipn3ke: modifications on AFU configurations > > > > > > Modify AFU configurations for new Blue Bitstream of A10 on N3000 card= : > > > > Blue Bitstream is new term, pls explain it or take modification. > BBS is the abbreviation of Blue Bitsteam. >=20 > > > - AFU register access: RTL changes the UPL base address and the > > > read/write commands of register indirect access. > > > > What means UPL? > > Could you descript it in more common language? > UPL is the abbreviation of User Programable Logic which is the cotainer= of > vBNG IP. >=20 > > > - Add delays to wait for the HW reset completion. > > > > Does HW same means with RTL? > It means RTL + DDR. >=20 > > > - Refine log for debug: print UPL_version not only for vBNG bit > > > stream, but also for other bit streams > > > > > > Fixes: c01c748e4ae6 ("net/ipn3ke: add new driver") > > > Cc: rosen.xu@intel.com > > > Cc: stable@dpdk.org > > > > > > Signed-off-by: Dan Wei > > > --- > > > drivers/net/ipn3ke/ipn3ke_ethdev.c | 14 ++++++++++++-- > > > drivers/net/ipn3ke/ipn3ke_ethdev.h | 9 +++++---- > > > drivers/net/ipn3ke/ipn3ke_flow.c | 1 + > > > 3 files changed, 18 insertions(+), 6 deletions(-) > > > > > > diff --git a/drivers/net/ipn3ke/ipn3ke_ethdev.c > > > b/drivers/net/ipn3ke/ipn3ke_ethdev.c > > > index 9079b57..84eb0e9 100644 > > > --- a/drivers/net/ipn3ke/ipn3ke_ethdev.c > > > +++ b/drivers/net/ipn3ke/ipn3ke_ethdev.c > > > @@ -223,15 +223,25 @@ > > > "LineSideMACType", &mac_type); > > > hw->retimer.mac_type =3D (int)mac_type; > > > > > > + /* After power on, wait until init done */ > > > + while (IPN3KE_READ_REG(hw, IPN3KE_INIT_DONE) !=3D 0x3) > > > + ; > > > + > > > + IPN3KE_AFU_PMD_DEBUG("UPL_version is 0x%x\n", > > > IPN3KE_READ_REG(hw, 0)); > > > + > > > if (afu_dev->id.uuid.uuid_low =3D=3D IPN3KE_UUID_VBNG_LOW && > > > afu_dev->id.uuid.uuid_high =3D=3D IPN3KE_UUID_VBNG_HIGH) { > > > ipn3ke_hw_cap_init(hw); > > > - IPN3KE_AFU_PMD_DEBUG("UPL_version is 0x%x\n", > > > - IPN3KE_READ_REG(hw, 0)); > > > > Why did you remove Debug code? > The debug code is moved up. Not only the version of vBNG Bitsteam, but > also > that of other bitsteams, should be printed out. > > > /* Reset FPGA IP */ > > > IPN3KE_WRITE_REG(hw, IPN3KE_CTRL_RESET, 1); > > > + rte_delay_us(10); > > > IPN3KE_WRITE_REG(hw, IPN3KE_CTRL_RESET, 0); > > > + > > > + /* After reset, wait until init done */ > > > + while (IPN3KE_READ_REG(hw, IPN3KE_INIT_DONE) !=3D 0x3) > > > + ; > > > + rte_delay_us(10); > > > }