From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 0241743BDF; Fri, 8 Mar 2024 08:01:59 +0100 (CET) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id DDEA840298; Fri, 8 Mar 2024 08:01:58 +0100 (CET) Received: from szxga06-in.huawei.com (szxga06-in.huawei.com [45.249.212.32]) by mails.dpdk.org (Postfix) with ESMTP id A866040274; Fri, 8 Mar 2024 08:01:57 +0100 (CET) Received: from mail.maildlp.com (unknown [172.19.163.17]) by szxga06-in.huawei.com (SkyGuard) with ESMTP id 4TrcX83tvvz1vwCm; Fri, 8 Mar 2024 15:01:12 +0800 (CST) Received: from dggpeml500024.china.huawei.com (unknown [7.185.36.10]) by mail.maildlp.com (Postfix) with ESMTPS id 8DE861A0172; Fri, 8 Mar 2024 15:01:53 +0800 (CST) Received: from [10.67.121.161] (10.67.121.161) by dggpeml500024.china.huawei.com (7.185.36.10) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.1.2507.35; Fri, 8 Mar 2024 15:01:53 +0800 Subject: Re: [PATCH] dmadev: fix structure alignment To: Wenwu Ma , CC: , References: <20240308053711.1260154-1-wenwux.ma@intel.com> From: fengchengwen Message-ID: <0c592c31-6a4d-1307-074c-5050de6c86b9@huawei.com> Date: Fri, 8 Mar 2024 15:01:53 +0800 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Thunderbird/68.11.0 MIME-Version: 1.0 In-Reply-To: <20240308053711.1260154-1-wenwux.ma@intel.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.67.121.161] X-ClientProxiedBy: dggems703-chm.china.huawei.com (10.3.19.180) To dggpeml500024.china.huawei.com (7.185.36.10) X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Acked-by: Chengwen Feng On 2024/3/8 13:37, Wenwu Ma wrote: > The structure rte_dma_dev needs cacheline alignment, but the return > value of malloc may not be aligned to the cacheline. Therefore, > extra memory is applied for realignment. > > Fixes: b36970f2e13e ("dmadev: introduce DMA device library") > Cc: stable@dpdk.org > > Signed-off-by: Wenwu Ma > --- > lib/dmadev/rte_dmadev.c | 18 ++++++++++++++---- > 1 file changed, 14 insertions(+), 4 deletions(-) > > diff --git a/lib/dmadev/rte_dmadev.c b/lib/dmadev/rte_dmadev.c > index 5953a77bd6..61e106d574 100644 > --- a/lib/dmadev/rte_dmadev.c > +++ b/lib/dmadev/rte_dmadev.c > @@ -160,15 +160,25 @@ static int > dma_dev_data_prepare(void) > { > size_t size; > + void *ptr; > > if (rte_dma_devices != NULL) > return 0; > > - size = dma_devices_max * sizeof(struct rte_dma_dev); > - rte_dma_devices = malloc(size); > - if (rte_dma_devices == NULL) > + /* The dma device object is expected to align cacheline, but > + * the return value of malloc may not be aligned to the cache line. > + * Therefore, extra memory is applied for realignment. > + * note: We do not call posix_memalign/aligned_alloc because it is > + * version dependent on libc. > + */ > + size = dma_devices_max * sizeof(struct rte_dma_dev) + > + RTE_CACHE_LINE_SIZE; > + ptr = malloc(size); > + if (ptr == NULL) > return -ENOMEM; > - memset(rte_dma_devices, 0, size); > + memset(ptr, 0, size); > + > + rte_dma_devices = RTE_PTR_ALIGN(ptr, RTE_CACHE_LINE_SIZE); > > return 0; > } >