From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id BCA8F458CD; Mon, 2 Sep 2024 11:57:48 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 5A24140DD2; Mon, 2 Sep 2024 11:55:46 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by mails.dpdk.org (Postfix) with ESMTP id 47F0C40678 for ; Mon, 2 Sep 2024 11:55:24 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1725270924; x=1756806924; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=nKnp0DvZNkATLERkT+jyjH/zQBZFiK/BgKdNsWwFC4U=; b=jj3SOMhg/5/JwepI4/RZ+yg9JpJZKnCe1RAIT7xz1hm3h7qqdfeIhotj fe2NO+fvh6Yf5kaotkmb4sx9rtvZtfBSBYvnxsGQ/Ef+hh7/AvyVE0riD 7a1JlZMBjJXSIVUlSkU4X7aekp3HUGK6KXOQ8MUTc6vnLk++oFupFB+vB MeXhiDoZWqVldYNaqFYUAQBiRu7yXOniAee2eR/yPl2zid/Sar7NYQU5u YDUsZ5rAG+HLh6EO0K5Ax59VpL1AfufHk9HGrCaz43tE5QNluiC6cfyIU Ghaho5nhkZyF55EOz9TtmBX1B2VPBRf2Kji7FbcDAw46RS9gD7nIpuzyU A==; X-CSE-ConnectionGUID: 12jsqb9GQ6qt+3YHifvoqg== X-CSE-MsgGUID: khlKC9yoTwul5Q6ihenZJg== X-IronPort-AV: E=McAfee;i="6700,10204,11182"; a="26747252" X-IronPort-AV: E=Sophos;i="6.10,195,1719903600"; d="scan'208";a="26747252" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2024 02:55:23 -0700 X-CSE-ConnectionGUID: +9JgOPUoTQGrwQMQUkcT4Q== X-CSE-MsgGUID: 6IqUIasMRZubtZ/jZlwcNw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,195,1719903600"; d="scan'208";a="64598007" Received: from silpixa00401119.ir.intel.com ([10.55.129.167]) by fmviesa009.fm.intel.com with ESMTP; 02 Sep 2024 02:55:22 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: bruce.richardson@intel.com Subject: [PATCH v1 25/30] net/i40e/base: add register definitions for FLU Date: Mon, 2 Sep 2024 10:54:37 +0100 Message-ID: <0ca1f6857169990fcb01368494aac786e9b500ee.1725270827.git.anatoly.burakov@intel.com> X-Mailer: git-send-email 2.43.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Piotr Skajewski These registers are relevant to MAC source pruning feature. Signed-off-by: Piotr Skajewski Signed-off-by: Anatoly Burakov --- drivers/net/i40e/base/i40e_register.h | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h index e8372575e4..beac70f8d6 100644 --- a/drivers/net/i40e/base/i40e_register.h +++ b/drivers/net/i40e/base/i40e_register.h @@ -2049,6 +2049,14 @@ #define I40E_PRTPM_TLPIC 0x001E43C0 /* Reset: GLOBR */ #define I40E_PRTPM_TLPIC_ETLPIC_SHIFT 0 #define I40E_PRTPM_TLPIC_ETLPIC_MASK I40E_MASK(0xFFFFFFFF, I40E_PRTPM_TLPIC_ETLPIC_SHIFT) +#define I40E_GL_PRE_FLU_MSK_PH1_H(_i) (0x00269F20 + ((_i) * 4)) /* _i=0...6 */ /* Reset: CORER */ +#define I40E_GL_PRE_FLU_MSK_PH1_H_MAX_INDEX 6 +#define I40E_GL_PRE_FLU_MSK_PH1_H_MASK_HIGH_SHIFT 0 +#define I40E_GL_PRE_FLU_MSK_PH1_H_MASK_HIGH_MASK I40E_MASK(0xFFFF, I40E_GL_PRE_FLU_MSK_PH1_H_MASK_HIGH_SHIFT) +#define I40E_GL_PRE_FLU_MSK_PH1_L(_i) (0x00269EE0 + ((_i) * 4)) /* _i=0...6 */ /* Reset: CORER */ +#define I40E_GL_PRE_FLU_MSK_PH1_L_MAX_INDEX 6 +#define I40E_GL_PRE_FLU_MSK_PH1_L_MASK_LOW_SHIFT 0 +#define I40E_GL_PRE_FLU_MSK_PH1_L_MASK_LOW_MASK I40E_MASK(0xFFFFFFFF, I40E_GL_PRE_FLU_MSK_PH1_L_MASK_LOW_SHIFT) #define I40E_GL_PRS_FVBM(_i) (0x00269760 + ((_i) * 4)) /* _i=0...3 */ /* Reset: CORER */ #define I40E_GL_PRS_FVBM_MAX_INDEX 3 #define I40E_GL_PRS_FVBM_FV_BYTE_INDX_SHIFT 0 -- 2.43.5