From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id DA13B458CD; Mon, 2 Sep 2024 11:57:17 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id A78B440B95; Mon, 2 Sep 2024 11:55:40 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by mails.dpdk.org (Postfix) with ESMTP id 9EAE240668 for ; Mon, 2 Sep 2024 11:55:18 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1725270918; x=1756806918; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=GpmDxALCg6erHkN1mtplDbwbao+fotuDfjzi1SUbu8o=; b=I+GJwdeNJdfT6nIai9fN3jdFBKLDoLDk4o5lMoFVwyXo4sI6wMUlEp2E GYv8fiAfGiP1JPJiUlgALyywHlgDJ2WJqTqdtIGhajUtkfpFY9zgFGBOq WpGAUgKgBBdbtTa0q5mk9mlVNpvg+tkYF2Gy8tXXp3WPrN/7/MuPTH5Iw V67ohsW8abEvZmZij85SZyfoirdYxswUJ7kzSyASgbAehLuAzBQ9ypAYe WxTzJ/3SgWC89bIerLjKA3Qyv/tncEZVXuPpUHkwcSz6Vf/jv34PLV+ji 88euJXD9iOxZCvL4dRTDMshAHXiqBkwS7kILlFuIV3fJmxsF0efE9cqqU w==; X-CSE-ConnectionGUID: vi21hdmiSq+bPwlnICCeUw== X-CSE-MsgGUID: 1oF1WHEVRb6YDCoUwosB4w== X-IronPort-AV: E=McAfee;i="6700,10204,11182"; a="26747235" X-IronPort-AV: E=Sophos;i="6.10,195,1719903600"; d="scan'208";a="26747235" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Sep 2024 02:55:18 -0700 X-CSE-ConnectionGUID: gG3Q3VyxQ3OxxQBAgD6AoQ== X-CSE-MsgGUID: dAv5lKloQwyfBF4GUqebog== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.10,195,1719903600"; d="scan'208";a="64597955" Received: from silpixa00401119.ir.intel.com ([10.55.129.167]) by fmviesa009.fm.intel.com with ESMTP; 02 Sep 2024 02:55:17 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: bruce.richardson@intel.com Subject: [PATCH v1 20/30] net/i40e/base: add PHY debug register dump Date: Mon, 2 Sep 2024 10:54:32 +0100 Message-ID: <0d0f2d9f0dd0806a0769b08ed146398864ce0390.1725270827.git.anatoly.burakov@intel.com> X-Mailer: git-send-email 2.43.5 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Radoslaw Tyl Add definitions for register dump for some PHY registers in order to assist field debugging of link issues. Signed-off-by: Radoslaw Tyl Signed-off-by: Anatoly Burakov --- drivers/net/i40e/base/i40e_register.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/i40e/base/i40e_register.h b/drivers/net/i40e/base/i40e_register.h index f440f0cbd1..e8372575e4 100644 --- a/drivers/net/i40e/base/i40e_register.h +++ b/drivers/net/i40e/base/i40e_register.h @@ -1414,6 +1414,13 @@ #define I40E_PRTMAC_PCS_LINK_STATUS1_LINK_SPEED_SHIFT 24 #define I40E_PRTMAC_PCS_LINK_STATUS1_LINK_SPEED_MASK \ I40E_MASK(0x7, I40E_PRTMAC_PCS_LINK_STATUS1_LINK_SPEED_SHIFT) +#define I40E_PRTMAC_PCS_LINK_STATUS2 0x0008C220 +#define I40E_PRTMAC_PCS_LINK_CTRL 0x0008C260 +#define I40E_PRTMAC_PCS_XGMII_FIFO_STATUS 0x0008C320 +#define I40E_PRTMAC_PCS_AN_LP_STATUS 0x0008C680 +#define I40E_PRTMAC_PCS_KR_STATUS 0x0008CA00 +#define I40E_PRTMAC_PCS_FEC_KR_STATUS1 0x0008CC20 +#define I40E_PRTMAC_PCS_FEC_KR_STATUS2 0x0008CC40 #define I40E_GL_FWRESETCNT 0x00083100 /* Reset: POR */ #define I40E_GL_FWRESETCNT_FWRESETCNT_SHIFT 0 #define I40E_GL_FWRESETCNT_FWRESETCNT_MASK I40E_MASK(0xFFFFFFFF, I40E_GL_FWRESETCNT_FWRESETCNT_SHIFT) -- 2.43.5