From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from out1-smtp.messagingengine.com (out1-smtp.messagingengine.com [66.111.4.25]) by dpdk.org (Postfix) with ESMTP id 4724B12009 for ; Tue, 16 Jan 2018 10:48:10 +0100 (CET) Received: from compute1.internal (compute1.nyi.internal [10.202.2.41]) by mailout.nyi.internal (Postfix) with ESMTP id C8B6D20CD1; Tue, 16 Jan 2018 04:48:09 -0500 (EST) Received: from frontend2 ([10.202.2.161]) by compute1.internal (MEProxy); Tue, 16 Jan 2018 04:48:09 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=monjalon.net; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-sender :x-me-sender:x-sasl-enc; s=mesmtp; bh=dODTfZJsEJY/smeJ2RQvo0rIXo fFrmiZvOGno2Jr+60=; b=B/w2RyPiko/4ueTvybwaOOqA6OJ+KJTU6aHrpp8kSc w09+iCtaGTSaLxOxu62p+9y1Nna4Ani3gZ3tqrHmobrzj0lHX6ArP/DOqpk9L9zb UsJrjDqaY15No2EO1b4y0duVH/PQwnhB4YB+6cWVHekzBn0uiNt8xtb2F3K7EKQ0 g= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-transfer-encoding:content-type :date:from:in-reply-to:message-id:mime-version:references :subject:to:x-me-sender:x-me-sender:x-sasl-enc; s=fm1; bh=dODTfZ JsEJY/smeJ2RQvo0rIXofFrmiZvOGno2Jr+60=; b=QzNOi57W7cTAiX53fHkwK+ 4+oYKKT+DTxI9ooQmNZcYU7ArEBJq3STAj6uKeB1d/IcxYcj3pgMG65iF1YrVdr/ qgTpmUpp+DGMYJOgL7q1BFcsuIvO5WyvKmTqDSaAZTM6AgS4R7dTr3Ony9Z7P5T4 telCKY1ZyH1q9UCWSru7x1Ha2S74yoBI4GkctlvJ9x5owlhjIOiO0MVY7NF2XDOh wtn+7/F86rBZ0E4v/mBiOAMSOdCSkxhZQ1w7MbxPF3tLOWD3r2mxnC7O5dkq3Bj0 9A5pnq+RcIomaMfECjvJ1050UAjQozi6OCmFB8i9CuZTgjpNYIPd+2C68UfjFjjw == X-ME-Sender: Received: from xps.localnet (184.203.134.77.rev.sfr.net [77.134.203.184]) by mail.messagingengine.com (Postfix) with ESMTPA id 7835624608; Tue, 16 Jan 2018 04:48:09 -0500 (EST) From: Thomas Monjalon To: "Rybalchenko, Kirill" Cc: dev@dpdk.org, "Chilikin, Andrey" , "Yigit, Ferruh" Date: Tue, 16 Jan 2018 10:47:38 +0100 Message-ID: <10699556.vRynAbPGuX@xps> In-Reply-To: <696B43C21188DF4F9C9091AAE4789B824E2B8810@IRSMSX108.ger.corp.intel.com> References: <1516035500-6010-1-git-send-email-kirill.rybalchenko@intel.com> <1777513.sriIylAOkO@xps> <696B43C21188DF4F9C9091AAE4789B824E2B8810@IRSMSX108.ger.corp.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Subject: Re: [dpdk-dev] [PATCH v3] ethdev: increase flow type limit from 32 to 64 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 16 Jan 2018 09:48:10 -0000 16/01/2018 10:44, Rybalchenko, Kirill: > Hi Thomas, > > From: Thomas Monjalon [mailto:thomas@monjalon.net] > > 15/01/2018 18:33, Kirill Rybalchenko: > > > --- a/lib/librte_ether/rte_eth_ctrl.h > > > +++ b/lib/librte_ether/rte_eth_ctrl.h > > > @@ -662,9 +662,9 @@ enum rte_fdir_mode { > > > RTE_FDIR_MODE_PERFECT_TUNNEL, /**< Enable FDIR filter mode - > > tunnel. */ > > > }; > > > > > > -#define UINT32_BIT (CHAR_BIT * sizeof(uint32_t)) > > > +#define UINT64_BIT (CHAR_BIT * sizeof(uint64_t)) > > > #define RTE_FLOW_MASK_ARRAY_SIZE \ > > > - (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT32_BIT)/UINT32_BIT) > > > + (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT) > > > > > > /** > > > * A structure used to get the information of flow director filter. > > > @@ -681,7 +681,7 @@ struct rte_eth_fdir_info { > > > uint32_t guarant_spc; /**< Guaranteed spaces.*/ > > > uint32_t best_spc; /**< Best effort spaces.*/ > > > /** Bit mask for every supported flow type. */ > > > - uint32_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE]; > > > + uint64_t flow_types_mask[RTE_FLOW_MASK_ARRAY_SIZE]; > > > uint32_t max_flexpayload; /**< Total flex payload in bytes. */ > > > /** Flexible payload unit in bytes. Size and alignments of all flex > > > payload segments should be multiplies of this value. */ @@ > > > -774,7 +774,7 @@ enum rte_eth_hash_function { }; > > > > > > #define RTE_SYM_HASH_MASK_ARRAY_SIZE \ > > > - (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT32_BIT)/UINT32_BIT) > > > + (RTE_ALIGN(RTE_ETH_FLOW_MAX, UINT64_BIT)/UINT64_BIT) > > > /** > > > * A structure used to set or get global hash function configurations which > > > * include symmetric hash enable per flow type and hash function type. > > > @@ -787,9 +787,9 @@ enum rte_eth_hash_function { struct > > > rte_eth_hash_global_conf { > > > enum rte_eth_hash_function hash_func; /**< Hash function type */ > > > /** Bit mask for symmetric hash enable per flow type */ > > > - uint32_t > > sym_hash_enable_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE]; > > > + uint64_t > > sym_hash_enable_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE]; > > > /** Bit mask indicates if the corresponding bit is valid */ > > > - uint32_t valid_bit_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE]; > > > + uint64_t valid_bit_mask[RTE_SYM_HASH_MASK_ARRAY_SIZE]; > > > }; > > > > This is still changing the ABI. > > Am I missing something? > > > We change size of structures rte_eth_fdir_info and rte_eth_hash_filter_info. Yes, and these structures are allocated and read by the application? So it is an ABI break. > Application can use these structures for DPDK library API call only in > rte_eth_dev_filter_ctrl() function call. In the patch this function is > modified in the way that it will be compatible with user binary applications > compiled with previous versions of DPDK library. Have you tried to use a patched DPDK with a binary compiled with DPDK 17.11?