From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 9ECE1A00E6 for ; Thu, 13 Jun 2019 19:05:17 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 12F811D374; Thu, 13 Jun 2019 19:05:17 +0200 (CEST) Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by dpdk.org (Postfix) with ESMTP id 9537A1CE5B for ; Thu, 13 Jun 2019 19:05:15 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by fmsmga106.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Jun 2019 10:05:09 -0700 X-ExtLoop1: 1 Received: from fmsmsx105.amr.corp.intel.com ([10.18.124.203]) by FMSMGA003.fm.intel.com with ESMTP; 13 Jun 2019 10:05:09 -0700 Received: from fmsmsx152.amr.corp.intel.com (10.18.125.5) by FMSMSX105.amr.corp.intel.com (10.18.124.203) with Microsoft SMTP Server (TLS) id 14.3.408.0; Thu, 13 Jun 2019 10:05:08 -0700 Received: from FMSMSX109.amr.corp.intel.com ([169.254.15.58]) by FMSMSX152.amr.corp.intel.com ([169.254.6.47]) with mapi id 14.03.0415.000; Thu, 13 Jun 2019 10:05:08 -0700 From: "Chautru, Nicolas" To: "Chalupnik, KamilX" , "thomas@monjalon.net" , "akhil.goyal@nxp.com" , "dev@dpdk.org" CC: "Yigit, Ferruh" , "Mokhtar, Amr" Thread-Topic: [dpdk-dev] [PATCH v4] baseband/fpga_lte_fec: adding driver for FEC on FPGA Thread-Index: AQHVIThZ+vPxsn2HUka3q7FJi/9sKKaZ0D/w Date: Thu, 13 Jun 2019 17:05:07 +0000 Message-ID: <1183128033837D43A851F70F33ED5C575C19DB1D@FMSMSX109.amr.corp.intel.com> References: <1559811890-24952-2-git-send-email-nicolas.chautru@intel.com> <1560186064-37665-1-git-send-email-nicolas.chautru@intel.com> <1560186064-37665-2-git-send-email-nicolas.chautru@intel.com> In-Reply-To: Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-titus-metadata-40: eyJDYXRlZ29yeUxhYmVscyI6IiIsIk1ldGFkYXRhIjp7Im5zIjoiaHR0cDpcL1wvd3d3LnRpdHVzLmNvbVwvbnNcL0ludGVsMyIsImlkIjoiMmJjNzIyZjktZTM0My00ZGY5LWEwZWUtZmRkOGE0NDAzMGY1IiwicHJvcHMiOlt7Im4iOiJDVFBDbGFzc2lmaWNhdGlvbiIsInZhbHMiOlt7InZhbHVlIjoiQ1RQX05UIn1dfV19LCJTdWJqZWN0TGFiZWxzIjpbXSwiVE1DVmVyc2lvbiI6IjE3LjEwLjE4MDQuNDkiLCJUcnVzdGVkTGFiZWxIYXNoIjoiaEFNXC9CUGlkZXhxZ2xyRDRvVGN0NXRBUk9uMDIrOTczUzFMNUs3azd6V3FpTU5SZ043eUk4OVwvdTc3bzYrY1hDIn0= x-ctpclassification: CTP_NT dlp-product: dlpe-windows dlp-version: 11.0.600.7 dlp-reaction: no-action x-originating-ip: [10.1.200.106] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v4] baseband/fpga_lte_fec: adding driver for FEC on FPGA X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" >-----Original Message----- >From: Chalupnik, KamilX=20 >Sent: Wednesday, June 12, 2019 9:03 AM >To: Chautru, Nicolas ; thomas@monjalon.net; akh= il.goyal@nxp.com; dev@dpdk.org >Cc: Yigit, Ferruh ; Mokhtar, Amr ; Chautru, Nicolas >Subject: RE: [dpdk-dev] [PATCH v4] baseband/fpga_lte_fec: adding driver fo= r FEC on FPGA > >Hi Nic, > > >> -----Original Message----- >> From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Nicolas Chautru >> Sent: Monday, June 10, 2019 7:01 PM >> To: thomas@monjalon.net; akhil.goyal@nxp.com; dev@dpdk.org >> Cc: Yigit, Ferruh ; Mokhtar, Amr=20 >> ; Chautru, Nicolas >> Subject: [dpdk-dev] [PATCH v4] baseband/fpga_lte_fec: adding driver=20 >> for FEC on FPGA >>=20 >> Supports for FEC 4G PMD Driver on FPGA card PAC N3000 >>=20 >> Signed-off-by: Nicolas Chautru >> --- >> config/common_base | 6 + >> doc/guides/bbdevs/fpga_lte_fec.rst | 318 +++ >> doc/guides/bbdevs/index.rst | 1 + >> drivers/baseband/Makefile | 2 + >> drivers/baseband/fpga_lte_fec/Makefile | 29 + >> drivers/baseband/fpga_lte_fec/fpga_lte_fec.c | 2674 >> ++++++++++++++++++++ >> drivers/baseband/fpga_lte_fec/fpga_lte_fec.h | 73 + >> drivers/baseband/fpga_lte_fec/meson.build | 7 + >> .../rte_pmd_bbdev_fpga_lte_fec_version.map | 3 + >> drivers/baseband/meson.build | 2 +- >> mk/rte.app.mk | 1 + >> 11 files changed, 3115 insertions(+), 1 deletion(-) create mode=20 >> 100644 doc/guides/bbdevs/fpga_lte_fec.rst >> create mode 100644 drivers/baseband/fpga_lte_fec/Makefile >> create mode 100644 drivers/baseband/fpga_lte_fec/fpga_lte_fec.c >> create mode 100644 drivers/baseband/fpga_lte_fec/fpga_lte_fec.h >> create mode 100644 drivers/baseband/fpga_lte_fec/meson.build >> create mode 100644 >> drivers/baseband/fpga_lte_fec/rte_pmd_bbdev_fpga_lte_fec_version.map > > >Generally code looks ok. Just few comments. >In all new files please change "Copyright(c) 2018" to "2019" > Thanks for the catch. Will update now. > > >> diff --git a/drivers/baseband/fpga_lte_fec/fpga_lte_fec.c >... >> +static inline int >> +enqueue_enc_one_op_cb(struct fpga_queue *q, struct >> rte_bbdev_enc_op *op, >> + uint16_t desc_offset) >> +{ >... >> + if (check_bit(op->turbo_enc.op_flags, >> RTE_BBDEV_TURBO_RATE_MATCH)) >> + out_length =3D (e + 7) >> 3; >> + else >> + out_length =3D (k >> 3) * 3 + 2; >> + >> + mbuf_append(output, output, out_length); >> + > =09 >Value returned by mbuf_append should be check. I guess we can put that che= ck under RTE_LIBRTE_BBDEV_DEBUG flag. >Please apply this to all places where mbuf_append is used. > We discussed in parallel that the driver is not meant to catch all user errors condition even in debug mode. We agreed that this was not required b= ut thanks for the thorough review. > >> diff --git >> a/drivers/baseband/fpga_lte_fec/rte_pmd_bbdev_fpga_lte_fec_version.m >> ap >> b/drivers/baseband/fpga_lte_fec/rte_pmd_bbdev_fpga_lte_fec_version.m >> ap >> +DPDK_18.08 { >> + local: *; >> +}; > >Shouldn't be DPDK_19.08? > You are right. Time flies since that driver started!=20 > >Best regards, >Kamil > Take care, Thanks,=20 Nic