From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 36A14A0563; Wed, 15 Apr 2020 17:51:24 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id A24B11D993; Wed, 15 Apr 2020 17:51:23 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 5185B1D992 for ; Wed, 15 Apr 2020 17:51:22 +0200 (CEST) IronPort-SDR: ef/IS7eZKe/2ZP/FUgF7PemH0AIBn7v0RNnfeMFdYkmSf/k8pqlDnmFg8kWpILDCXK8PYwQfQZ lzY1fkI13Aeg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Apr 2020 08:51:21 -0700 IronPort-SDR: guoUOIOePgSZke/nbraJins4d1qaFZi7fJmsMEkoamafHu2k1dg5WZumXqQ2lATkn2P9eFVhdX z9aOGyvkIklg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,387,1580803200"; d="scan'208";a="400352010" Received: from orsmsx106.amr.corp.intel.com ([10.22.225.133]) by orsmga004.jf.intel.com with ESMTP; 15 Apr 2020 08:51:21 -0700 Received: from orsmsx152.amr.corp.intel.com (10.22.226.39) by ORSMSX106.amr.corp.intel.com (10.22.225.133) with Microsoft SMTP Server (TLS) id 14.3.439.0; Wed, 15 Apr 2020 08:51:21 -0700 Received: from orsmsx155.amr.corp.intel.com ([169.254.7.107]) by ORSMSX152.amr.corp.intel.com ([169.254.8.85]) with mapi id 14.03.0439.000; Wed, 15 Apr 2020 08:51:20 -0700 From: "Chautru, Nicolas" To: "Xu, Rosen" , "dev@dpdk.org" CC: "Richardson, Bruce" , "O'Hare, Cathal" , "akhil.goyal@nxp.com" Thread-Topic: [dpdk-dev] [PATCH v2 06/13] baseband/fpga_5gnr_fec: add queue configuration Thread-Index: AQHWD68mVleArXJ7Ck61eeUar/1m4qh3v4vwgAJwgwCAACl+MA== Date: Wed, 15 Apr 2020 15:51:19 +0000 Message-ID: <1183128033837D43A851F70F33ED5C57893C3323@ORSMSX155.amr.corp.intel.com> References: <1585526580-113508-1-git-send-email-nicolas.chautru@intel.com> <1585526580-113508-7-git-send-email-nicolas.chautru@intel.com> <0E78D399C70DA940A335608C6ED296D73AEF8ECE@SHSMSX104.ccr.corp.intel.com> <1183128033837D43A851F70F33ED5C576EFEAB6B@FMSMSX109.amr.corp.intel.com> <0E78D399C70DA940A335608C6ED296D73AF109BE@SHSMSX104.ccr.corp.intel.com> In-Reply-To: <0E78D399C70DA940A335608C6ED296D73AF109BE@SHSMSX104.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-product: dlpe-windows dlp-version: 11.2.0.6 dlp-reaction: no-action x-originating-ip: [10.22.254.138] Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Subject: Re: [dpdk-dev] [PATCH v2 06/13] baseband/fpga_5gnr_fec: add queue configuration X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Hi > From: Xu, Rosen > Hi, >=20 > > -----Original Message----- > > From: Chautru, Nicolas > > Sent: Tuesday, April 14, 2020 8:16 > > To: Xu, Rosen ; dev@dpdk.org; akhil.goyal@nxp.com > > Cc: Richardson, Bruce > > Subject: RE: [dpdk-dev] [PATCH v2 06/13] baseband/fpga_5gnr_fec: add > > queue configuration > > > > Thanks Rosen for your thorough code review. Some comments in-line below= . > > > > > From: Xu, Rosen > > > > > > Hi, > > > > > > Could you prefix all functions name with the FPGA IP name? FPGA is a > > > very common device name. > > > > > > > I don't see such a guideline being used across all other PMDs. > > Unsure it always help notably as this would create many long function > > names with fpga_5gnr_fec_ added each time, and these names are not > > exposed outside of this .c file. > > Also some of the fpga_ prefixes would apply for either fpga_lte_fec or > > fpga_5gnr_fec PMD. > > If this becomes of a new guide lines we can rename every single > > function in each existing baseband PMD in future release (not just this= new > PMD). >=20 > What I mentioned is that, let's take FVL for example, in our PMD, we name= it's > PMD functions with I40e_xxx, i40e is Intel NIC name, but for your design = it > named with fpga_5gnr_xxx, fpga is a common device, That means not Intel > only provide FPGA, no sure if any other developer summit other FPGA based= 5G > acceleration IP, is it ok? >=20 The new baseband PMD is indeed called "fpga_5gnr_fec" which may sound fairl= y generic.=20 Note that that an older existing baseband PMD is currently called "fpga_lte= _fec", the new PMD is the 5G version while the previous provided 4G capabil= ity. This depends on the user image being loaded onto the FPGA chip.=20 Both these PMDs are in effect currently used by the ecosystem with the FPGA= variant from Intel called Vista Creek (based on Altera Arria10 chip) but t= here is no limitation for same driver to be used on other chip (notably wit= h increased cell density on=20 newer process) as long as the HW ring interface is the same or compatible i= mage is loaded agnostically on the chip.=20 Let me know if unclear.=20 =20