From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from smtp-fw-2101.amazon.com (smtp-fw-2101.amazon.com [72.21.196.25]) by dpdk.org (Postfix) with ESMTP id 9D84B7EB0 for ; Tue, 18 Nov 2014 18:19:42 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1416331804; x=1447867804; h=from:to:subject:date:message-id:references:in-reply-to: content-transfer-encoding:mime-version; bh=PWSRMrDIHlcq+uBWOXPFAdVQk+zE8Z68T8Ada1pRd08=; b=KbrXhe5WNdceuUgE56p9c76CpRRZT1NthUNO5QqYqrmMrLuh+24Z4Vy0 rFl62RsTEaZcPaXpN7PsOogn+tAnOjxKs4R/gKFg0ta9BabBcCOZmhK/4 BwhApS379J2pqkUEs/8hbmeogzduX+48DUesd27l3dQzA7PvbI8BJvj7/ o=; X-IronPort-AV: E=Sophos;i="5.07,410,1413244800"; d="scan'208";a="136579867" Received: from email-inbound-relay-60001.pdx1.amazon.com ([10.232.153.146]) by smtp-border-fw-out-2101.iad2.amazon.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 18 Nov 2014 17:30:02 +0000 Received: from ex10-hub-9001.ant.amazon.com (pdx1-ws-svc-lb16-vlan3.amazon.com [10.239.138.214]) by email-inbound-relay-60001.pdx1.amazon.com (8.14.7/8.14.7) with ESMTP id sAIHU08u019765 (version=TLSv1/SSLv3 cipher=AES256-SHA bits=256 verify=OK); Tue, 18 Nov 2014 17:30:01 GMT Received: from EX10-MBX-31007.ant.amazon.com ([fe80::dc2d:ebf:d4a1:fac]) by ex10-hub-9001.ant.amazon.com ([::1]) with mapi id 14.03.0181.006; Tue, 18 Nov 2014 09:29:47 -0800 From: "Wang, Shawn" To: Yerden Zhumabekov , Neil Horman , "Richardson, Bruce" , "dev@dpdk.org" Thread-Topic: [dpdk-dev] [PATCH v4 3/5] hash: add fallback to software CRC32 implementation Thread-Index: AQHQA1MUQYBy/0vxnkW4QcbVbv1NU5xmor1c Date: Tue, 18 Nov 2014 17:29:46 +0000 Message-ID: <12C2AAD9525203489F7B523D670129D91CCF3615@ex10-mbx-31007.ant.amazon.com> References: <1409724351-23786-1-git-send-email-e_zhumabekov@sts.kz> <20141118144138.GB32375@hmsreliant.think-freely.org> <546B607B.9030808@sts.kz> <20141118160005.GC32375@hmsreliant.think-freely.org>, <546B7E2D.7050705@sts.kz> In-Reply-To: <546B7E2D.7050705@sts.kz> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-originating-ip: [172.17.1.118] Content-Type: text/plain; charset="koi8-r" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Precedence: Bulk Subject: Re: [dpdk-dev] [PATCH v4 3/5] hash: add fallback to software CRC32 implementation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 18 Nov 2014 17:19:42 -0000 I have a general question about using CPUID to detect supported instruction= set.=0A= What if we are compiling the software with some old hardware which does not= support SSE4.2, but run it on new hardware which does support SSE4.2. Is t= here still a static way to force the compiler to turn on the SSE4.2 support= ? =0A= I guess for SSE4.2, most of the CPU has support for it now. But for AVX2, t= his might not be the case.=0A= ________________________________________=0A= From: dev [dev-bounces@dpdk.org] on behalf of Yerden Zhumabekov [e_zhumabek= ov@sts.kz]=0A= Sent: Tuesday, November 18, 2014 9:13 AM=0A= To: Neil Horman; Richardson, Bruce; dev@dpdk.org=0A= Subject: Re: [dpdk-dev] [PATCH v4 3/5] hash: add fallback to software CRC32= implementation=0A= =0A= 18.11.2014 22:00, Neil Horman =D0=C9=DB=C5=D4:=0A= > On Tue, Nov 18, 2014 at 09:06:35PM +0600, Yerden Zhumabekov wrote:=0A= >> 18.11.2014 20:41, Neil Horman =D0=C9=DB=C5=D4:=0A= >>> On Tue, Nov 18, 2014 at 08:03:40PM +0600, Yerden Zhumabekov wrote:=0A= >>>> /**=0A= >>>> * Use single crc32 instruction to perform a hash on a 4 byte value.= =0A= >>>> + * Fall back to software crc32 implementation in case SSE4.2 is=0A= >>>> + * not supported=0A= >>>> *=0A= >>>> * @param data=0A= >>>> * Data to perform hash on.=0A= >>>> @@ -376,11 +413,18 @@ crc32c_2words(uint64_t data, uint32_t init_val)= =0A= >>>> static inline uint32_t=0A= >>>> rte_hash_crc_4byte(uint32_t data, uint32_t init_val)=0A= >>>> {=0A= >>>> - return _mm_crc32_u32(init_val, data);=0A= >>>> +#ifdef RTE_MACHINE_CPUFLAG_SSE4_2=0A= >>>> + if (likely(crc32_alg =3D=3D CRC32_SSE42))=0A= >>>> + return _mm_crc32_u32(init_val, data);=0A= >>>> +#endif=0A= >>> you don't really need these ifdefs here anymore given that you have a= =0A= >>> constructor to do the algorithm selection. In fact you need to remove = them, in=0A= >>> the event you build on a system that doesn't support SSE42, but run on = a system=0A= >>> that does.=0A= >> Originally, I thought so as well. I wrote the code without these ifdefs,= =0A= >> but it didn't compile on my machine which doesn't support SSE4.2. Error= =0A= >> was triggered by nmmintrin.h which has a check for respective GCC=0A= >> extension. So I think these ifdefs are indeed required.=0A= >>=0A= > You need to edit the makefile so that the compiler gets passed the option= =0A= > -msse42. That way it will know to emit sse42 instructions. It will also = allow=0A= > you to remove the ifdef from the include file=0A= =0A= In this case, I guess there are two options:=0A= 1) modify all makefiles which use librte_hash=0A= 2) move all function bodies from rte_hash_crc.h to separate module,=0A= leaving prototype definitions there only.=0A= =0A= Everybody's up for the second option? :)=0A= =0A= --=0A= Sincerely,=0A= =0A= Yerden Zhumabekov=0A= State Technical Service=0A= Astana, KZ=0A= =0A= =0A=