From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 721BD45501; Wed, 26 Jun 2024 14:06:15 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 61952434AD; Wed, 26 Jun 2024 13:57:22 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by mails.dpdk.org (Postfix) with ESMTP id DBAF442E95 for ; Wed, 26 Jun 2024 13:45:40 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1719402341; x=1750938341; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=H+klyM/nK7y6WUHp9wzwiTg32/nhWXpi3UMMH1HSZSw=; b=czW7tyd9UkY/8DFLJ3WB/ngKjXd16GeWoHsVLc83n/2bKi7GD1RBvDRD xPOsPk6ddIVAHD++HsoxGMZsOF+jTepf9/h+e8y2MaHKrsteOXeqMxE1U +6RwsvifWNKy/d1q8Q/ufQ3/fqavKfCz3Oxs84HemSJn5iNKwLAIbjpka qD5FtXV6m3AuxxNSezNnkojNfXrUv1sQFNFsdNSYzVVyLVRSXm5r0vMTD /GbzkmM703EHWlMwHxdiYzpl05X/A8gyx0DLr3Q5hDmpvYK9KuADYfBDx H23AdpS6Lem5/1wGx1bp5D7Sep1Xq4AOzc+wCtNL64R8ee+TZAwsQmYes w==; X-CSE-ConnectionGUID: ADSEYDItRv+3vtzdQts+oQ== X-CSE-MsgGUID: WBtXF54kShiEdj5fISoY8Q== X-IronPort-AV: E=McAfee;i="6700,10204,11114"; a="38979600" X-IronPort-AV: E=Sophos;i="6.08,266,1712646000"; d="scan'208";a="38979600" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jun 2024 04:45:40 -0700 X-CSE-ConnectionGUID: nDboyOWURsOrRU1FCOPN4w== X-CSE-MsgGUID: WxilIAl2RDatleyO9W/PbA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,266,1712646000"; d="scan'208";a="43874587" Received: from unknown (HELO silpixa00401119.ir.intel.com) ([10.55.129.167]) by orviesa010.jf.intel.com with ESMTP; 26 Jun 2024 04:45:39 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: Milena Olech , ian.stokes@intel.com, bruce.richardson@intel.com Subject: [PATCH v4 094/103] net/ice/base: change a method to get pca9575 handle Date: Wed, 26 Jun 2024 12:42:22 +0100 Message-ID: <13bba2433e1edb98c35094efa1bc6382d3e48fd7.1719401848.git.anatoly.burakov@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Milena Olech More universal method for getting pca9575 handle is introduced. The first step is to look for CLK_MUX handle. Having that it is possible to find CLK_MUX GPIO pin. Provided data let check what is driving the pin - the expectation is that pca9575 node part number is returned. Signed-off-by: Milena Olech Signed-off-by: Ian Stokes --- drivers/net/ice/base/ice_adminq_cmd.h | 12 +++++-- drivers/net/ice/base/ice_ptp_hw.c | 50 +++++++++++++++++++++++---- 2 files changed, 53 insertions(+), 9 deletions(-) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index 936735022d..96ba19f94a 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -1761,6 +1761,8 @@ struct ice_aqc_link_topo_params { #define ICE_AQC_LINK_TOPO_NODE_TYPE_CAGE 6 #define ICE_AQC_LINK_TOPO_NODE_TYPE_MEZZ 7 #define ICE_AQC_LINK_TOPO_NODE_TYPE_ID_EEPROM 8 +#define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_CTRL 9 +#define ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX 10 #define ICE_AQC_LINK_TOPO_NODE_TYPE_GPS 11 #define ICE_AQC_LINK_TOPO_NODE_CTX_S 4 #define ICE_AQC_LINK_TOPO_NODE_CTX_M \ @@ -1798,8 +1800,13 @@ struct ice_aqc_link_topo_addr { struct ice_aqc_get_link_topo { struct ice_aqc_link_topo_addr addr; u8 node_part_num; -#define ICE_ACQ_GET_LINK_TOPO_NODE_NR_PCA9575 0x21 -#define ICE_ACQ_GET_LINK_TOPO_NODE_NR_GEN_GPS 0x48 +#define ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575 0x21 +#define ICE_AQC_GET_LINK_TOPO_NODE_NR_ZL30632_80032 0x24 +#define ICE_AQC_GET_LINK_TOPO_NODE_NR_SI5383_5384 0x25 +#define ICE_AQC_GET_LINK_TOPO_NODE_NR_E822_PHY 0x30 +#define ICE_AQC_GET_LINK_TOPO_NODE_NR_C827 0x31 +#define ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX 0x47 +#define ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_GPS 0x48 u8 rsvd[9]; }; @@ -1827,6 +1834,7 @@ struct ice_aqc_get_link_topo_pin { #define ICE_AQC_LINK_TOPO_IO_FUNC_RED_LED 12 #define ICE_AQC_LINK_TOPO_IO_FUNC_GREEN_LED 13 #define ICE_AQC_LINK_TOPO_IO_FUNC_BLUE_LED 14 +#define ICE_AQC_LINK_TOPO_IO_FUNC_CLK_IN 20 #define ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_S 5 #define ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_M \ (0x7 << ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_S) diff --git a/drivers/net/ice/base/ice_ptp_hw.c b/drivers/net/ice/base/ice_ptp_hw.c index b340b4aa6d..cb689c1a25 100644 --- a/drivers/net/ice/base/ice_ptp_hw.c +++ b/drivers/net/ice/base/ice_ptp_hw.c @@ -5167,10 +5167,11 @@ ice_get_phy_tx_tstamp_ready_e810(struct ice_hw *hw, u8 port, u64 *tstamp_ready) static int ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle) { + u8 node_part_number, idx, node_type_ctx_clk_mux, node_part_num_clk_mux; + struct ice_aqc_get_link_topo_pin cmd_pin; + u16 node_handle, clock_mux_handle; struct ice_aqc_get_link_topo cmd; - u8 node_part_number, idx; int status; - u16 node_handle; if (!hw || !pca9575_handle) return ICE_ERR_PARAM; @@ -5182,11 +5183,46 @@ ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle) } memset(&cmd, 0, sizeof(cmd)); + memset(&cmd_pin, 0, sizeof(cmd_pin)); - /* Set node type to GPIO controller */ + node_type_ctx_clk_mux = (ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX << + ICE_AQC_LINK_TOPO_NODE_TYPE_S); + node_type_ctx_clk_mux |= (ICE_AQC_LINK_TOPO_NODE_CTX_GLOBAL << + ICE_AQC_LINK_TOPO_NODE_CTX_S); + node_part_num_clk_mux = ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_CLK_MUX; + + /* Look for CLOCK MUX handle in the netlist */ + status = ice_find_netlist_node(hw, node_type_ctx_clk_mux, + node_part_num_clk_mux, + &clock_mux_handle); + if (status) + return ICE_ERR_NOT_SUPPORTED; + + /* Take CLOCK MUX GPIO pin */ + cmd_pin.input_io_params = (ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_GPIO << + ICE_AQC_LINK_TOPO_INPUT_IO_TYPE_S); + cmd_pin.input_io_params |= (ICE_AQC_LINK_TOPO_IO_FUNC_CLK_IN << + ICE_AQC_LINK_TOPO_INPUT_IO_FUNC_S); + cmd_pin.addr.handle = CPU_TO_LE16(clock_mux_handle); + cmd_pin.addr.topo_params.node_type_ctx = + (ICE_AQC_LINK_TOPO_NODE_TYPE_CLK_MUX << + ICE_AQC_LINK_TOPO_NODE_TYPE_S); + cmd_pin.addr.topo_params.node_type_ctx |= + (ICE_AQC_LINK_TOPO_NODE_CTX_PROVIDED << + ICE_AQC_LINK_TOPO_NODE_CTX_S); + + status = ice_aq_get_netlist_node_pin(hw, &cmd_pin, &node_handle); + if (status) + return ICE_ERR_NOT_SUPPORTED; + + /* Check what is driving the pin */ cmd.addr.topo_params.node_type_ctx = - (ICE_AQC_LINK_TOPO_NODE_TYPE_M & - ICE_AQC_LINK_TOPO_NODE_TYPE_GPIO_CTRL); + (ICE_AQC_LINK_TOPO_NODE_TYPE_GPIO_CTRL << + ICE_AQC_LINK_TOPO_NODE_TYPE_S); + cmd.addr.topo_params.node_type_ctx |= + (ICE_AQC_LINK_TOPO_NODE_CTX_GLOBAL << + ICE_AQC_LINK_TOPO_NODE_CTX_S); + cmd.addr.handle = CPU_TO_LE16(node_handle); #define SW_PCA9575_SFP_TOPO_IDX 2 #define SW_PCA9575_QSFP_TOPO_IDX 1 @@ -5207,7 +5243,7 @@ ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle) return ICE_ERR_NOT_SUPPORTED; /* Verify if we found the right IO expander type */ - if (node_part_number != ICE_ACQ_GET_LINK_TOPO_NODE_NR_PCA9575) + if (node_part_number != ICE_AQC_GET_LINK_TOPO_NODE_NR_PCA9575) return ICE_ERR_NOT_SUPPORTED; /* If present save the handle and return it */ @@ -5226,7 +5262,7 @@ ice_get_pca9575_handle(struct ice_hw *hw, u16 *pca9575_handle) bool ice_is_gps_present_e810t(struct ice_hw *hw) { if (ice_find_netlist_node(hw, ICE_AQC_LINK_TOPO_NODE_TYPE_GPS, - ICE_ACQ_GET_LINK_TOPO_NODE_NR_GEN_GPS, NULL)) + ICE_AQC_GET_LINK_TOPO_NODE_NR_GEN_GPS, NULL)) return false; return true; -- 2.43.0