From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [143.182.124.21]) by dpdk.org (Postfix) with ESMTP id 5770C58EE for ; Wed, 27 Aug 2014 04:10:48 +0200 (CEST) Received: from azsmga001.ch.intel.com ([10.2.17.19]) by azsmga101.ch.intel.com with ESMTP; 26 Aug 2014 19:14:47 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,408,1406617200"; d="scan'208";a="473000504" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by azsmga001.ch.intel.com with ESMTP; 26 Aug 2014 19:14:27 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id s7R2EPlj005252; Wed, 27 Aug 2014 10:14:25 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id s7R2EMS4030110; Wed, 27 Aug 2014 10:14:24 +0800 Received: (from wujingji@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s7R2EMdD030106; Wed, 27 Aug 2014 10:14:22 +0800 From: Jingjing Wu To: dev@dpdk.org Date: Wed, 27 Aug 2014 10:13:50 +0800 Message-Id: <1409105634-29980-4-git-send-email-jingjing.wu@intel.com> X-Mailer: git-send-email 1.7.0.7 In-Reply-To: <1409105634-29980-1-git-send-email-jingjing.wu@intel.com> References: <1409105634-29980-1-git-send-email-jingjing.wu@intel.com> Subject: [dpdk-dev] [PATCH v2 3/7] i40e: function implement in i40e for flow director filter programming X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 27 Aug 2014 02:10:53 -0000 support the API ops defined in ethdev, the behavior according to each command: RTE_CMD_FDIR_RULE_ADD: add a new FDIR filter rule. RTE_CMD_FDIR_RULE_DEL: delete a FDIR filter rule. Signed-off-by: jingjing.wu Reviewed-by: Helin Zhang Reviewed-by: Jing Chen Reviewed-by: Jijiang Liu --- lib/librte_pmd_i40e/Makefile | 4 + lib/librte_pmd_i40e/i40e_ethdev.c | 43 ++++++++ lib/librte_pmd_i40e/i40e_ethdev.h | 7 ++ lib/librte_pmd_i40e/i40e_fdir.c | 225 ++++++++++++++++++++++++++++++++++++++ lib/librte_pmd_i40e/rte_i40e.h | 111 +++++++++++++++++++ 5 files changed, 390 insertions(+) create mode 100644 lib/librte_pmd_i40e/rte_i40e.h diff --git a/lib/librte_pmd_i40e/Makefile b/lib/librte_pmd_i40e/Makefile index 6537654..3da20c5 100644 --- a/lib/librte_pmd_i40e/Makefile +++ b/lib/librte_pmd_i40e/Makefile @@ -88,6 +88,10 @@ SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_rxtx.c SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_ethdev_vf.c SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_pf.c SRCS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += i40e_fdir.c + +# install this header file +SYMLINK-$(CONFIG_RTE_LIBRTE_I40E_PMD)-include := rte_i40e.h + # this lib depends upon: DEPDIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += lib/librte_eal lib/librte_ether DEPDIRS-$(CONFIG_RTE_LIBRTE_I40E_PMD) += lib/librte_mempool lib/librte_mbuf diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c index a08b43c..7dcf964 100644 --- a/lib/librte_pmd_i40e/i40e_ethdev.c +++ b/lib/librte_pmd_i40e/i40e_ethdev.c @@ -48,6 +48,7 @@ #include #include #include +#include #include "i40e_logs.h" #include "i40e/i40e_register_x710_int.h" @@ -205,6 +206,9 @@ static int i40e_dev_rss_hash_update(struct rte_eth_dev *dev, struct rte_eth_rss_conf *rss_conf); static int i40e_dev_rss_hash_conf_get(struct rte_eth_dev *dev, struct rte_eth_rss_conf *rss_conf); +static int i40e_rx_classification_filter_ctl(struct rte_eth_dev *dev, + enum rte_eth_command cmd, + void *args); /* Default hash key buffer for RSS */ static uint32_t rss_key_default[I40E_PFQF_HKEY_MAX_INDEX + 1]; @@ -256,6 +260,7 @@ static struct eth_dev_ops i40e_eth_dev_ops = { .reta_query = i40e_dev_rss_reta_query, .rss_hash_update = i40e_dev_rss_hash_update, .rss_hash_conf_get = i40e_dev_rss_hash_conf_get, + .rx_classification_filter_ctl = i40e_rx_classification_filter_ctl, }; static struct eth_driver rte_i40e_pmd = { @@ -4185,3 +4190,41 @@ i40e_pf_config_mq_rx(struct i40e_pf *pf) return 0; } + +static int +i40e_rx_classification_filter_ctl(struct rte_eth_dev *dev, + enum rte_eth_command cmd, + void *args) +{ + struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private); + struct rte_i40e_fdir_entry *fdir_entry = NULL; + int ret = I40E_SUCCESS; + + switch (cmd) { + case RTE_CMD_FDIR_RULE_ADD: + if (args == NULL) + return I40E_ERR_PARAM; + fdir_entry = (struct rte_i40e_fdir_entry *)args; + ret = i40e_fdir_filter_programming(pf, + fdir_entry->soft_id, + &fdir_entry->input, + &fdir_entry->action, + TRUE); + break; + case RTE_CMD_FDIR_RULE_DEL: + if (args == NULL) + return I40E_ERR_PARAM; + fdir_entry = (struct rte_i40e_fdir_entry *)args; + ret = i40e_fdir_filter_programming(pf, + fdir_entry->soft_id, + &fdir_entry->input, + &fdir_entry->action, + FALSE); + break; + default: + PMD_DRV_LOG(ERR, "unknown command type %u\n", cmd); + ret = I40E_ERR_PARAM; + break; + } + return ret; +} diff --git a/lib/librte_pmd_i40e/i40e_ethdev.h b/lib/librte_pmd_i40e/i40e_ethdev.h index c2c7fa9..5edb99e 100644 --- a/lib/librte_pmd_i40e/i40e_ethdev.h +++ b/lib/librte_pmd_i40e/i40e_ethdev.h @@ -34,6 +34,8 @@ #ifndef _I40E_ETHDEV_H_ #define _I40E_ETHDEV_H_ +#include "rte_i40e.h" + #define I40E_AQ_LEN 32 #define I40E_AQ_BUF_SZ 4096 /* Number of queues per TC should be one of 1, 2, 4, 8, 16, 32, 64 */ @@ -332,6 +334,11 @@ i40e_fdir_setup_rx_resources(struct i40e_pf *pf, unsigned int socket_id); int i40e_fdir_setup(struct i40e_pf *pf); void i40e_fdir_teardown(struct i40e_pf *pf); +int i40e_fdir_filter_programming(struct i40e_pf *pf, + uint16_t soft_id, + struct rte_i40e_fdir_input *fdir_filter, + struct rte_i40e_fdir_action *fdir_action, + bool add); /* I40E_DEV_PRIVATE_TO */ #define I40E_DEV_PRIVATE_TO_PF(adapter) \ diff --git a/lib/librte_pmd_i40e/i40e_fdir.c b/lib/librte_pmd_i40e/i40e_fdir.c index f6297a8..df9a889 100644 --- a/lib/librte_pmd_i40e/i40e_fdir.c +++ b/lib/librte_pmd_i40e/i40e_fdir.c @@ -48,11 +48,21 @@ #include "i40e/i40e_type.h" #include "i40e_ethdev.h" #include "i40e_rxtx.h" +/* Wait count and inteval for fdir filter programming */ +#define I40E_FDIR_WAIT_COUNT 10 +#define I40E_FDIR_WAIT_INTERVAL_US 1000 #define I40E_COUNTER_PF 2 /* Statistic counter index for one pf */ #define I40E_COUNTER_INDEX_FDIR(pf_id) (0 + (pf_id) * I40E_COUNTER_PF) +#ifndef RTE_MBUF_DATA_DMA_ADDR +#define RTE_MBUF_DATA_DMA_ADDR(mb) \ + ((uint64_t)((mb)->buf_physaddr + \ + (uint64_t)((char *)((mb)->pkt.data) - \ + (char *)(mb)->buf_addr))) +#endif + static int i40e_fdir_rx_queue_init(struct i40e_rx_queue *rxq) { @@ -206,3 +216,218 @@ i40e_fdir_teardown(struct i40e_pf *pf) pf->fdir.fdir_vsi = NULL; return; } + +/* Construct the tx flags */ +static inline uint64_t +i40e_build_ctob(uint32_t td_cmd, + uint32_t td_offset, + unsigned int size, + uint32_t td_tag) +{ + return rte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DATA | + ((uint64_t)td_cmd << I40E_TXD_QW1_CMD_SHIFT) | + ((uint64_t)td_offset << I40E_TXD_QW1_OFFSET_SHIFT) | + ((uint64_t)size << I40E_TXD_QW1_TX_BUF_SZ_SHIFT) | + ((uint64_t)td_tag << I40E_TXD_QW1_L2TAG1_SHIFT)); +} + +/* + * check the programming status descriptor in rx queue. + * done after Programming Flow Director is programmed on + * tx queue + */ +static inline int +i40e_check_fdir_programming_status(struct i40e_rx_queue *rxq) +{ + volatile union i40e_rx_desc *rxdp; + uint64_t qword1; + uint32_t rx_status; + uint32_t len, id; + uint32_t error; + int ret = 0; + + rxdp = &rxq->rx_ring[rxq->rx_tail]; + qword1 = rte_le_to_cpu_64(rxdp->wb.qword1.status_error_len); + rx_status = (qword1 & I40E_RXD_QW1_STATUS_MASK) + >> I40E_RXD_QW1_STATUS_SHIFT; + + if (rx_status & (1 << I40E_RX_DESC_STATUS_DD_SHIFT)) { + len = qword1 >> I40E_RX_PROG_STATUS_DESC_LENGTH_SHIFT; + id = (qword1 & I40E_RX_PROG_STATUS_DESC_QW1_PROGID_MASK) >> + I40E_RX_PROG_STATUS_DESC_QW1_PROGID_SHIFT; + + if (len == I40E_RX_PROG_STATUS_DESC_LENGTH && + id == I40E_RX_PROG_STATUS_DESC_FD_FILTER_STATUS) { + error = (qword1 & + I40E_RX_PROG_STATUS_DESC_QW1_ERROR_MASK) >> + I40E_RX_PROG_STATUS_DESC_QW1_ERROR_SHIFT; + if (error == (0x1 << + I40E_RX_PROG_STATUS_DESC_FD_TBL_FULL_SHIFT)) { + PMD_DRV_LOG(ERR, "Failed to add FDIR filter" + " (FD_ID %u): programming status" + " reported\n", + rxdp->wb.qword0.hi_dword.fd_id); + ret = -1; + } else if (error == (0x1 << + I40E_RX_PROG_STATUS_DESC_NO_FD_ENTRY_SHIFT)) { + PMD_DRV_LOG(ERR, "Failed to delete FDIR filter" + " (FD_ID %u): programming status" + " reported\n", + rxdp->wb.qword0.hi_dword.fd_id); + ret = -1; + } else + PMD_DRV_LOG(ERR, "invalid programming status" + " reported, error = %u\n", error); + } else + PMD_DRV_LOG(ERR, "unknown programming status" + " reported,len = %d, id = %u\n", len, id); + rxdp->wb.qword1.status_error_len = 0; + rxq->rx_tail++; + if (unlikely(rxq->rx_tail == rxq->nb_rx_desc)) + rxq->rx_tail = 0; + } + return ret; +} + +/* + * Program a flow diretor filter rule. + * Is done by Flow Director Programming + * Descriptor followed by packet structure that contains the filter fields + * need to match. + */ +int +i40e_fdir_filter_programming(struct i40e_pf *pf, + uint16_t soft_id, + struct rte_i40e_fdir_input *fdir_input, + struct rte_i40e_fdir_action *fdir_action, + bool add) +{ + struct i40e_tx_queue *txq = pf->fdir.txq; + struct i40e_rx_queue *rxq = pf->fdir.rxq; + volatile struct i40e_tx_desc *txdp; + struct rte_mbuf *mbuf = fdir_input->data; + volatile struct i40e_filter_program_desc *fdirdp; + uint64_t dma_addr; + uint32_t td_cmd; + uint16_t i; + uint8_t dest; + + if (!(pf->flags & I40E_FLAG_FDIR)) { + PMD_DRV_LOG(ERR, "unsupported operation," + "FDIR is not enabled.\n"); + return I40E_NOT_SUPPORTED; + } + + PMD_DRV_LOG(INFO, "filling filter prgramming descriptor\n"); + fdirdp = (volatile struct i40e_filter_program_desc *) + (&(txq->tx_ring[txq->tx_tail])); + + fdirdp->qindex_flex_ptype_vsi = + rte_cpu_to_le_32((fdir_action->rx_queue << + I40E_TXD_FLTR_QW0_QINDEX_SHIFT) & + I40E_TXD_FLTR_QW0_QINDEX_MASK); + + fdirdp->qindex_flex_ptype_vsi |= + rte_cpu_to_le_32((fdir_input->flex_off << + I40E_TXD_FLTR_QW0_FLEXOFF_SHIFT) & + I40E_TXD_FLTR_QW0_FLEXOFF_MASK); + + fdirdp->qindex_flex_ptype_vsi |= + rte_cpu_to_le_32((fdir_input->pctype << + I40E_TXD_FLTR_QW0_PCTYPE_SHIFT) & + I40E_TXD_FLTR_QW0_PCTYPE_MASK); + + /* Use LAN VSI Id if not programmed by user */ + if (fdir_input->dest_vsi == 0) + fdirdp->qindex_flex_ptype_vsi |= + rte_cpu_to_le_32((pf->main_vsi->vsi_id << + I40E_TXD_FLTR_QW0_DEST_VSI_SHIFT) & + I40E_TXD_FLTR_QW0_DEST_VSI_MASK); + else + fdirdp->qindex_flex_ptype_vsi |= + rte_cpu_to_le_32((fdir_input->dest_vsi << + I40E_TXD_FLTR_QW0_DEST_VSI_SHIFT) & + I40E_TXD_FLTR_QW0_DEST_VSI_MASK); + + fdirdp->dtype_cmd_cntindex = + rte_cpu_to_le_32(I40E_TX_DESC_DTYPE_FILTER_PROG); + + if (add) + fdirdp->dtype_cmd_cntindex |= rte_cpu_to_le_32( + I40E_FILTER_PROGRAM_DESC_PCMD_ADD_UPDATE << + I40E_TXD_FLTR_QW1_PCMD_SHIFT); + else + fdirdp->dtype_cmd_cntindex |= rte_cpu_to_le_32( + I40E_FILTER_PROGRAM_DESC_PCMD_REMOVE << + I40E_TXD_FLTR_QW1_PCMD_SHIFT); + + if (fdir_action->drop == RTE_I40E_DEST_DROP_PACKET) + dest = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET; + else + dest = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX; + fdirdp->dtype_cmd_cntindex |= rte_cpu_to_le_32((dest << + I40E_TXD_FLTR_QW1_DEST_SHIFT) & + I40E_TXD_FLTR_QW1_DEST_MASK); + + fdirdp->dtype_cmd_cntindex |= + rte_cpu_to_le_32((fdir_action->report_status<< + I40E_TXD_FLTR_QW1_FD_STATUS_SHIFT) & + I40E_TXD_FLTR_QW1_FD_STATUS_MASK); + + fdirdp->dtype_cmd_cntindex |= + rte_cpu_to_le_32(I40E_TXD_FLTR_QW1_CNT_ENA_MASK); + if (fdir_action->cnt_index != 0) + fdirdp->dtype_cmd_cntindex |= + rte_cpu_to_le_32((fdir_action->cnt_index << + I40E_TXD_FLTR_QW1_CNTINDEX_SHIFT) & + I40E_TXD_FLTR_QW1_CNTINDEX_MASK); + else + fdirdp->dtype_cmd_cntindex |= + rte_cpu_to_le_32((pf->fdir.match_counter_index << + I40E_TXD_FLTR_QW1_CNTINDEX_SHIFT) & + I40E_TXD_FLTR_QW1_CNTINDEX_MASK); + + fdirdp->fd_id = rte_cpu_to_le_32(soft_id); + txq->tx_tail++; + if (txq->tx_tail >= txq->nb_tx_desc) + txq->tx_tail = 0; + + PMD_DRV_LOG(INFO, "filling transmit descriptor\n"); + txdp = &(txq->tx_ring[txq->tx_tail]); + dma_addr = RTE_MBUF_DATA_DMA_ADDR(mbuf); + txdp->buffer_addr = rte_cpu_to_le_64(dma_addr); + td_cmd = I40E_TX_DESC_CMD_EOP | + I40E_TX_DESC_CMD_RS | + I40E_TX_DESC_CMD_DUMMY; + + txdp->cmd_type_offset_bsz = + i40e_build_ctob(td_cmd, 0, + mbuf->pkt.data_len, 0); + + txq->tx_tail++; + if (txq->tx_tail >= txq->nb_tx_desc) + txq->tx_tail = 0; + /* Update the tx tail register */ + rte_wmb(); + I40E_PCI_REG_WRITE(txq->qtx_tail, txq->tx_tail); + + for (i = 0; i < I40E_FDIR_WAIT_COUNT; i++) { + rte_delay_us(I40E_FDIR_WAIT_INTERVAL_US); + if (txdp->cmd_type_offset_bsz & + rte_cpu_to_le_64(I40E_TX_DESC_DTYPE_DESC_DONE)) + break; + } + if (i >= I40E_FDIR_WAIT_COUNT) { + PMD_DRV_LOG(ERR, "Failed to program FDIR filter:" + " timeout to get DD on tx queue\n"); + return I40E_ERR_TIMEOUT; + } + /* totally delay 10 ms to check programming status*/ + rte_delay_us((I40E_FDIR_WAIT_COUNT - i) * I40E_FDIR_WAIT_INTERVAL_US); + if (i40e_check_fdir_programming_status(rxq) < 0) { + PMD_DRV_LOG(ERR, "Failed to program FDIR filter:" + " programming status reported\n"); + return I40E_ERR_CONFIG; + } + return I40E_SUCCESS; +} diff --git a/lib/librte_pmd_i40e/rte_i40e.h b/lib/librte_pmd_i40e/rte_i40e.h new file mode 100644 index 0000000..3d9cc3d --- /dev/null +++ b/lib/librte_pmd_i40e/rte_i40e.h @@ -0,0 +1,111 @@ +/*- + * BSD LICENSE + * + * Copyright(c) 2010-2014 Intel Corporation. All rights reserved. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * * Neither the name of Intel Corporation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RTE_I40E_H_ +#define _RTE_I40E_H_ + +/** + * @file + * + * RTE I40E + * + * The I40E defines the commands and structures specifically for i40e hardware + * features. As different types of NIC hardware may have different features, + * they might not be common for all types of NIC hardwares. The commands and + * structures can be used in applications directly together with generalized + * APIs declared in rte_ethdev.h. The commands couldn't be supported by + * non-i40e PMD. + */ + +#ifdef __cplusplus +extern "C" { +#endif + +#define I40E_FDIR_PKT_LEN 512 +#define I40E_FDIR_IP_DEFAULT_LEN 0x003C +#define I40E_FDIR_IP_DEFAULT_TTL 0x40 +#define I40E_FDIR_IP_DEFAULT_VERSION_IHL 0x45 +#define I40E_FDIR_TCP_DEFAULT_DATAOFF 0x50 +#define I40E_FDIR_IPv6_DEFAULT_VTC_FLOW 0x60300000 +#define I40E_FDIR_IPv6_DEFAULT_PAYLOAD_LEN 0x0014 +#define I40E_FDIR_IPv6_DEFAULT_HOP_LIMITS 0xFF +#define I40E_FDIR_UDP_DEFAULT_LEN 0x0028 + +enum rte_i40e_fdir_status { + RTE_I40E_FDIR_NO_REPORT_STATUS = 0, /**< no report FDIR. */ + RTE_I40E_FDIR_REPORT_FD_ID, /**< only report FD ID. */ + RTE_I40E_FDIR_REPORT_FD_ID_FLEX_4, /**< report FD ID and 4 flex bytes. */ + RTE_I40E_FDIR_REPORT_FLEX_8, /**< report 8 flex bytes. */ +}; + +#define RTE_I40E_DEST_DROP_PACKET 0x01 +#define RTE_I40E_DEST_DIRECT_PACKET_QINDEX 0x02 + +/** + * A structure used to define the input for an flow director filter entry + */ +struct rte_i40e_fdir_input { + uint8_t pctype; + uint8_t flex_off; + uint16_t dest_vsi; /**< destination VSI ID*/ + struct rte_mbuf *data; /**< mbuf store raw packet used to program */ +}; + +/** + * A structure used to define an action when match FDIR packet filter. + */ +struct rte_i40e_fdir_action { + uint16_t rx_queue; /**< queue assigned to if fdir match. */ + uint16_t cnt_index; /**< statistic count index */ + uint8_t drop; /**< accept or reject */ + enum rte_i40e_fdir_status report_status; /**< status report. */ +}; + +/** + * For commands: + * 'RTE_CMD_FDIR_RULE_ADD' + * 'RTE_CMD_FDIR_RULE_DEL' + * + * A structure used to define the flow director filter entry + */ +struct rte_i40e_fdir_entry { + uint16_t soft_id; /**< id */ + struct rte_i40e_fdir_input input; /**< input set */ + struct rte_i40e_fdir_action action; /**< action taken when match */ +}; + +#ifdef __cplusplus +} +#endif + +#endif /* _RTE_I40E_H_ */ -- 1.8.1.4