From mboxrd@z Thu Jan 1 00:00:00 1970
Return-Path: <hzhan75@shecgisg004.sh.intel.com>
Received: from mga09.intel.com (mga09.intel.com [134.134.136.24])
by dpdk.org (Postfix) with ESMTP id D4565B39D
for <dev@dpdk.org>; Wed, 17 Sep 2014 09:48:52 +0200 (CEST)
Received: from orsmga002.jf.intel.com ([10.7.209.21])
by orsmga102.jf.intel.com with ESMTP; 17 Sep 2014 00:48:21 -0700
X-ExtLoop1: 1
X-IronPort-AV: E=Sophos;i="5.04,539,1406617200"; d="scan'208";a="604030999"
Received: from shvmail01.sh.intel.com ([10.239.29.42])
by orsmga002.jf.intel.com with ESMTP; 17 Sep 2014 00:54:30 -0700
Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com
[10.239.29.89])
by shvmail01.sh.intel.com with ESMTP id s8H7sTiI024841;
Wed, 17 Sep 2014 15:54:29 +0800
Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1])
by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id
s8H7sQTn017559; Wed, 17 Sep 2014 15:54:28 +0800
Received: (from hzhan75@localhost)
by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s8H7sQja017555;
Wed, 17 Sep 2014 15:54:26 +0800
From: Helin Zhang <helin.zhang@intel.com>
To: dev@dpdk.org
Date: Wed, 17 Sep 2014 15:54:20 +0800
Message-Id: <1410940461-17509-3-git-send-email-helin.zhang@intel.com>
X-Mailer: git-send-email 1.7.4.1
In-Reply-To: <1410940461-17509-1-git-send-email-helin.zhang@intel.com>
References: <1410940461-17509-1-git-send-email-helin.zhang@intel.com>
Subject: [dpdk-dev] [PATCH 2/3] i40e: rework of PF interrupt cause enable
flags processing
X-BeenThere: dev@dpdk.org
X-Mailman-Version: 2.1.15
Precedence: list
List-Id: patches and discussions about DPDK <dev.dpdk.org>
List-Unsubscribe: <http://dpdk.org/ml/options/dev>,
<mailto:dev-request@dpdk.org?subject=unsubscribe>
List-Archive: <http://dpdk.org/ml/archives/dev/>
List-Post: <mailto:dev@dpdk.org>
List-Help: <mailto:dev-request@dpdk.org?subject=help>
List-Subscribe: <http://dpdk.org/ml/listinfo/dev>,
<mailto:dev-request@dpdk.org?subject=subscribe>
X-List-Received-Date: Wed, 17 Sep 2014 07:48:53 -0000
To get the code cleaner and more straightforward, a macro
is defined for all interrupt cause enable flags. Two more
causes are enabled, and all the interrupt causes for
reporting any errors are compiled conditionally, as they
are for debug only.
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Reviewed-by: Jing Chen <jing.d.chen@intel.com>
Reviewed-by: Jijiang Liu <jijiang.liu@intel.com>
---
lib/librte_pmd_i40e/i40e_ethdev.c | 72 +++++++++++++++++++--------------------
1 file changed, 35 insertions(+), 37 deletions(-)
diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c
index 003b084..6df41ea 100644
--- a/lib/librte_pmd_i40e/i40e_ethdev.c
+++ b/lib/librte_pmd_i40e/i40e_ethdev.c
@@ -117,6 +117,19 @@
(1ULL << I40E_FILTER_PCTYPE_FCOE_OTHER) | \
(1ULL << I40E_FILTER_PCTYPE_L2_PAYLOAD))
+/* Mask of PF interrupt causes */
+#define I40E_PFINT_ICR0_ENA_MASK ( \
+ I40E_PFINT_ICR0_ENA_ECC_ERR_MASK | \
+ I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK | \
+ I40E_PFINT_ICR0_ENA_GRST_MASK | \
+ I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK | \
+ I40E_PFINT_ICR0_ENA_STORM_DETECT_MASK | \
+ I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_MASK | \
+ I40E_PFINT_ICR0_ENA_HMC_ERR_MASK | \
+ I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK | \
+ I40E_PFINT_ICR0_ENA_VFLR_MASK | \
+ I40E_PFINT_ICR0_ENA_ADMINQ_MASK)
+
static int eth_i40e_dev_init(\
__attribute__((unused)) struct eth_driver *eth_drv,
struct rte_eth_dev *eth_dev);
@@ -3261,24 +3274,9 @@ i40e_pf_enable_irq0(struct i40e_hw *hw)
static void
i40e_pf_config_irq0(struct i40e_hw *hw)
{
- uint32_t enable;
-
/* read pending request and disable first */
i40e_pf_disable_irq0(hw);
- /**
- * Enable all interrupt error options to detect possible errors,
- * other informative int are ignored
- */
- enable = I40E_PFINT_ICR0_ENA_ECC_ERR_MASK |
- I40E_PFINT_ICR0_ENA_MAL_DETECT_MASK |
- I40E_PFINT_ICR0_ENA_GRST_MASK |
- I40E_PFINT_ICR0_ENA_PCI_EXCEPTION_MASK |
- I40E_PFINT_ICR0_ENA_LINK_STAT_CHANGE_MASK |
- I40E_PFINT_ICR0_ENA_HMC_ERR_MASK |
- I40E_PFINT_ICR0_ENA_VFLR_MASK |
- I40E_PFINT_ICR0_ENA_ADMINQ_MASK;
-
- I40E_WRITE_REG(hw, I40E_PFINT_ICR0_ENA, enable);
+ I40E_WRITE_REG(hw, I40E_PFINT_ICR0_ENA, I40E_PFINT_ICR0_ENA_MASK);
I40E_WRITE_REG(hw, I40E_PFINT_STAT_CTL0,
I40E_PFINT_STAT_CTL0_OTHER_ITR_INDX_MASK);
@@ -3398,44 +3396,44 @@ i40e_dev_interrupt_handler(__rte_unused struct rte_intr_handle *handle,
icr0 = I40E_READ_REG(hw, I40E_PFINT_ICR0);
icr0_ena = I40E_READ_REG(hw, I40E_PFINT_ICR0_ENA);
- /* Shared IRQ case, return */
+ /* No interrupt event indicated */
if (!(icr0 & I40E_PFINT_ICR0_INTEVENT_MASK)) {
- PMD_DRV_LOG(INFO, "Port%d INT0:share IRQ case, "
- "no INT event to process\n", hw->pf_id);
+ PMD_DRV_LOG(INFO, "No interrupt event\n");
goto done;
}
- if (icr0 & I40E_PFINT_ICR0_LINK_STAT_CHANGE_MASK) {
- PMD_DRV_LOG(INFO, "INT:Link status changed\n");
- i40e_dev_link_update(dev, 0);
- }
-
+#ifdef RTE_LIBRTE_I40E_DEBUG_DRIVER
if (icr0 & I40E_PFINT_ICR0_ECC_ERR_MASK)
- PMD_DRV_LOG(INFO, "INT:Unrecoverable ECC Error\n");
-
+ PMD_DRV_LOG(ERR, "ICR0: unrecoverable ECC error\n");
if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK)
- PMD_DRV_LOG(INFO, "INT:Malicious programming detected\n");
-
+ PMD_DRV_LOG(ERR, "ICR0: malicious programming detected\n");
if (icr0 & I40E_PFINT_ICR0_GRST_MASK)
- PMD_DRV_LOG(INFO, "INT:Global Resets Requested\n");
-
+ PMD_DRV_LOG(INFO, "ICR0: global reset requested\n");
if (icr0 & I40E_PFINT_ICR0_PCI_EXCEPTION_MASK)
- PMD_DRV_LOG(INFO, "INT:PCI EXCEPTION occured\n");
-
+ PMD_DRV_LOG(INFO, "ICR0: PCI exception\n activated\n");
+ if (icr0 & I40E_PFINT_ICR0_STORM_DETECT_MASK)
+ PMD_DRV_LOG(INFO, "ICR0: a change in the storm control "
+ "state\n");
if (icr0 & I40E_PFINT_ICR0_HMC_ERR_MASK)
- PMD_DRV_LOG(INFO, "INT:HMC error occured\n");
+ PMD_DRV_LOG(ERR, "ICR0: HMC error\n");
+ if (icr0 & I40E_PFINT_ICR0_PE_CRITERR_MASK)
+ PMD_DRV_LOG(ERR, "ICR0: protocol engine critical error\n");
+#endif /* RTE_LIBRTE_I40E_DEBUG_DRIVER */
- /* Add processing func to deal with VF reset vent */
if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) {
- PMD_DRV_LOG(INFO, "INT:VF reset detected\n");
+ PMD_DRV_LOG(INFO, "ICR0: VF reset detected\n");
i40e_dev_handle_vfr_event(dev);
}
- /* Find admin queue event */
if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) {
- PMD_DRV_LOG(INFO, "INT:ADMINQ event\n");
+ PMD_DRV_LOG(INFO, "ICR0: adminq event\n");
i40e_dev_handle_aq_msg(dev);
}
+ if (icr0 & I40E_PFINT_ICR0_LINK_STAT_CHANGE_MASK) {
+ PMD_DRV_LOG(INFO, "INT:Link status changed\n");
+ i40e_dev_link_update(dev, 0);
+ }
+
done:
I40E_WRITE_REG(hw, I40E_PFINT_ICR0_ENA, icr0_ena);
/* Re-enable interrupt from device side */
--
1.8.1.4