From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: <hzhan75@shecgisg004.sh.intel.com> Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 8C4047F78 for <dev@dpdk.org>; Wed, 29 Oct 2014 08:01:11 +0100 (CET) Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga103.jf.intel.com with ESMTP; 29 Oct 2014 00:08:02 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,808,1406617200"; d="scan'208";a="598154101" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga001.jf.intel.com with ESMTP; 29 Oct 2014 00:09:42 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id s9T79els015493; Wed, 29 Oct 2014 15:09:40 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id s9T79cMS025870; Wed, 29 Oct 2014 15:09:40 +0800 Received: (from hzhan75@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id s9T79cqv025866; Wed, 29 Oct 2014 15:09:38 +0800 From: Helin Zhang <helin.zhang@intel.com> To: dev@dpdk.org Date: Wed, 29 Oct 2014 15:09:30 +0800 Message-Id: <1414566571-25829-2-git-send-email-helin.zhang@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1414566571-25829-1-git-send-email-helin.zhang@intel.com> References: <1414044079-10006-1-git-send-email-helin.zhang@intel.com> <1414566571-25829-1-git-send-email-helin.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 1/2] i40e: do not use macros defined in i40e_register_x710_int.h X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK <dev.dpdk.org> List-Unsubscribe: <http://dpdk.org/ml/options/dev>, <mailto:dev-request@dpdk.org?subject=unsubscribe> List-Archive: <http://dpdk.org/ml/archives/dev/> List-Post: <mailto:dev@dpdk.org> List-Help: <mailto:dev-request@dpdk.org?subject=help> List-Subscribe: <http://dpdk.org/ml/listinfo/dev>, <mailto:dev-request@dpdk.org?subject=subscribe> X-List-Received-Date: Wed, 29 Oct 2014 07:01:12 -0000 As i40e_register_x710_int.h is for early hardware only and should be removed finally, the macros defiend in it should not be used. For those registers which is not defined, just define it in code directly as workaround. Signed-off-by: Helin Zhang <helin.zhang@intel.com> --- lib/librte_pmd_i40e/i40e_ethdev.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) v2 changes: * Added back writing the register of I40E_GLINT_CTL. * Defined I40E_GLINT_CTL and its relevant, i40e_register_x710_int.h will be deleted. diff --git a/lib/librte_pmd_i40e/i40e_ethdev.c b/lib/librte_pmd_i40e/i40e_ethdev.c index e1f581a..6f2ceb2 100644 --- a/lib/librte_pmd_i40e/i40e_ethdev.c +++ b/lib/librte_pmd_i40e/i40e_ethdev.c @@ -51,7 +51,6 @@ #include <rte_eth_ctrl.h> #include "i40e_logs.h" -#include "i40e/i40e_register_x710_int.h" #include "i40e/i40e_prototype.h" #include "i40e/i40e_adminq_cmd.h" #include "i40e/i40e_type.h" @@ -609,6 +608,10 @@ i40e_vsi_queues_bind_intr(struct i40e_vsi *vsi) I40E_WRITE_REG(hw, I40E_PFINT_ITRN(I40E_ITR_INDEX_DEFAULT, msix_vect - 1), interval); +#ifndef I40E_GLINT_CTL +#define I40E_GLINT_CTL 0x0003F800 +#define I40E_GLINT_CTL_DIS_AUTOMASK_N_MASK 0x4 +#endif /* Disable auto-mask on enabling of all none-zero interrupt */ I40E_WRITE_REG(hw, I40E_GLINT_CTL, I40E_GLINT_CTL_DIS_AUTOMASK_N_MASK); -- 1.8.1.4