From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 5F4E3C43A for ; Thu, 30 Jul 2015 10:34:26 +0200 (CEST) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga101.fm.intel.com with ESMTP; 30 Jul 2015 01:34:25 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.15,576,1432623600"; d="scan'208";a="774341181" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga002.jf.intel.com with ESMTP; 30 Jul 2015 01:34:24 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id t6U8YMqq000861; Thu, 30 Jul 2015 16:34:22 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t6U8YJD1007365; Thu, 30 Jul 2015 16:34:21 +0800 Received: (from wenzhuol@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t6U8YIg1007361; Thu, 30 Jul 2015 16:34:18 +0800 From: Wenzhuo Lu To: dev@dpdk.org Date: Thu, 30 Jul 2015 16:34:17 +0800 Message-Id: <1438245257-7328-1-git-send-email-wenzhuo.lu@intel.com> X-Mailer: git-send-email 1.7.4.1 Subject: [dpdk-dev] [PATCH] e1000: fix ieee1588 timestamp issue X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 30 Jul 2015 08:34:26 -0000 Ieee1588 reads system time to set its timestamp. On 1G NICs, for example, i350, system time is disabled by default. It means the ieee1588 timestamp will always be 0. This patch enables system time when ieee1588 is enabled. Signed-off-by: Wenzhuo Lu --- drivers/net/e1000/igb_ethdev.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c index 56734a3..8fb67ac 100644 --- a/drivers/net/e1000/igb_ethdev.c +++ b/drivers/net/e1000/igb_ethdev.c @@ -3898,11 +3898,19 @@ eth_igb_set_mc_addr_list(struct rte_eth_dev *dev, return 0; } +#define E1000_TSAUXC_DISABLE_SYSTIME 0x80000000 + static int igb_timesync_enable(struct rte_eth_dev *dev) { struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private); uint32_t tsync_ctl; + uint32_t tsauxc; + + /* Enable system time for it isn't on by default. */ + tsauxc = E1000_READ_REG(hw, E1000_TSAUXC); + tsauxc &= ~E1000_TSAUXC_DISABLE_SYSTIME; + E1000_WRITE_REG(hw, E1000_TSAUXC, tsauxc); /* Start incrementing the register used to timestamp PTP packets. */ E1000_WRITE_REG(hw, E1000_TIMINCA, E1000_TIMINCA_INIT); -- 1.9.3