From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 8928A8E8E for ; Thu, 10 Sep 2015 06:39:49 +0200 (CEST) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP; 09 Sep 2015 21:39:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.17,501,1437462000"; d="scan'208";a="558781553" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by FMSMGA003.fm.intel.com with ESMTP; 09 Sep 2015 21:39:48 -0700 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id t8A4dkPD007931; Thu, 10 Sep 2015 12:39:46 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id t8A4dh9v026712; Thu, 10 Sep 2015 12:39:45 +0800 Received: (from xiaowan1@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id t8A4dghD026708; Thu, 10 Sep 2015 12:39:42 +0800 From: Wang Xiao W To: dev@dpdk.org Date: Thu, 10 Sep 2015 12:38:37 +0800 Message-Id: <1441859917-26475-29-git-send-email-xiao.w.wang@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1441859917-26475-1-git-send-email-xiao.w.wang@intel.com> References: <1441859917-26475-1-git-send-email-xiao.w.wang@intel.com> Cc: Wang Xiao W Subject: [dpdk-dev] [PATCH 28/28] fm10k: add support for MASTER_CLK_OFFSET message X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 10 Sep 2015 04:39:50 -0000 Add support for clock offset message from switch manager. Each PEP will be responsible for notifying its own VFs, and the originating PEP must notify its own VFs prior or in addition to sending, as it will not receive a copy of its own message. Base drivers are expected to need custom implementations so no message handler is provided in shared code. Signed-off-by: Wang Xiao W --- drivers/net/fm10k/base/fm10k_api.c | 14 ++++++++++ drivers/net/fm10k/base/fm10k_api.h | 1 + drivers/net/fm10k/base/fm10k_pf.c | 56 +++++++++++++++++++++++++++++++++++++ drivers/net/fm10k/base/fm10k_pf.h | 7 +++++ drivers/net/fm10k/base/fm10k_type.h | 2 ++ drivers/net/fm10k/base/fm10k_vf.c | 3 ++ drivers/net/fm10k/base/fm10k_vf.h | 1 + 7 files changed, 84 insertions(+) diff --git a/drivers/net/fm10k/base/fm10k_api.c b/drivers/net/fm10k/base/fm10k_api.c index a1ab6b1..eb5bdaa 100644 --- a/drivers/net/fm10k/base/fm10k_api.c +++ b/drivers/net/fm10k/base/fm10k_api.c @@ -345,3 +345,17 @@ s32 fm10k_adjust_systime(struct fm10k_hw *hw, s32 ppb) return fm10k_call_func(hw, hw->mac.ops.adjust_systime, (hw, ppb), FM10K_NOT_IMPLEMENTED); } + +/** + * fm10k_notify_offset - Notify switch of change in PTP offset + * @hw: pointer to hardware structure + * @offset: 64bit unsigned offset from hardware SYSTIME value + * + * This function is meant to notify switch of change in the PTP offset for + * the hardware SYSTIME registers. + **/ +s32 fm10k_notify_offset(struct fm10k_hw *hw, u64 offset) +{ + return fm10k_call_func(hw, hw->mac.ops.notify_offset, + (hw, offset), FM10K_NOT_IMPLEMENTED); +} diff --git a/drivers/net/fm10k/base/fm10k_api.h b/drivers/net/fm10k/base/fm10k_api.h index 343d750..113aef5 100644 --- a/drivers/net/fm10k/base/fm10k_api.h +++ b/drivers/net/fm10k/base/fm10k_api.h @@ -58,4 +58,5 @@ s32 fm10k_update_uc_addr(struct fm10k_hw *hw, u16 lport, s32 fm10k_update_mc_addr(struct fm10k_hw *hw, u16 lport, const u8 *mac, u16 vid, bool add); s32 fm10k_adjust_systime(struct fm10k_hw *hw, s32 ppb); +s32 fm10k_notify_offset(struct fm10k_hw *hw, u64 offset); #endif /* _FM10K_API_H_ */ diff --git a/drivers/net/fm10k/base/fm10k_pf.c b/drivers/net/fm10k/base/fm10k_pf.c index 3148a90..6e6d71e 100644 --- a/drivers/net/fm10k/base/fm10k_pf.c +++ b/drivers/net/fm10k/base/fm10k_pf.c @@ -1858,6 +1858,33 @@ const struct fm10k_tlv_attr fm10k_1588_clock_owner_attr[] = { FM10K_TLV_ATTR_LAST }; +const struct fm10k_tlv_attr fm10k_master_clk_offset_attr[] = { + FM10K_TLV_ATTR_U64(FM10K_PF_ATTR_ID_MASTER_CLK_OFFSET), + FM10K_TLV_ATTR_LAST +}; + +/** + * fm10k_iov_notify_offset_pf - Notify VF of change in PTP offset + * @hw: pointer to hardware structure + * @vf_info: pointer to the vf info structure + * @offset: 64bit unsigned offset from hardware SYSTIME + * + * This function sends a message to a given VF to notify it of PTP offset + * changes. + **/ +STATIC void fm10k_iov_notify_offset_pf(struct fm10k_hw *hw, + struct fm10k_vf_info *vf_info, + u64 offset) +{ + u32 msg[4]; + + fm10k_tlv_msg_init(msg, FM10K_VF_MSG_ID_1588); + fm10k_tlv_attr_put_u64(msg, FM10K_1588_MSG_CLK_OFFSET, offset); + + if (vf_info->mbx.ops.enqueue_tx) + vf_info->mbx.ops.enqueue_tx(hw, &vf_info->mbx, msg); +} + /** * fm10k_msg_1588_clock_owner_pf - Message handler for clock ownership from SM * @hw: pointer to hardware structure @@ -1951,6 +1978,33 @@ STATIC s32 fm10k_adjust_systime_pf(struct fm10k_hw *hw, s32 ppb) } /** + * fm10k_notify_offset_pf - Notify switch of change in PTP offset + * @hw: pointer to hardware structure + * @offset: 64bit unsigned offset of SYSTIME + * + * This function sends a message to the switch to indicate a change in the + * offset of the hardware SYSTIME registers. The switch manager is + * responsible for transmitting this message to other hosts. + */ +STATIC s32 fm10k_notify_offset_pf(struct fm10k_hw *hw, u64 offset) +{ + struct fm10k_mbx_info *mbx = &hw->mbx; + u32 msg[4]; + + DEBUGFUNC("fm10k_notify_offset_pf"); + + /* ensure that we control the clock */ + if (!(hw->flags & FM10K_HW_FLAG_CLOCK_OWNER)) + return FM10K_ERR_DEVICE_NOT_SUPPORTED; + + fm10k_tlv_msg_init(msg, FM10K_PF_MSG_ID_MASTER_CLK_OFFSET); + fm10k_tlv_attr_put_u64(msg, FM10K_PF_ATTR_ID_MASTER_CLK_OFFSET, offset); + + /* load onto outgoing mailbox */ + return mbx->ops.enqueue_tx(hw, mbx, msg); +} + +/** * fm10k_read_systime_pf - Reads value of systime registers * @hw: pointer to the hardware structure * @@ -2021,6 +2075,7 @@ s32 fm10k_init_ops_pf(struct fm10k_hw *hw) mac->ops.get_fault = &fm10k_get_fault_pf; mac->ops.get_host_state = &fm10k_get_host_state_pf; mac->ops.adjust_systime = &fm10k_adjust_systime_pf; + mac->ops.notify_offset = &fm10k_notify_offset_pf; mac->ops.read_systime = &fm10k_read_systime_pf; mac->max_msix_vectors = fm10k_get_pcie_msix_count_generic(hw); @@ -2033,6 +2088,7 @@ s32 fm10k_init_ops_pf(struct fm10k_hw *hw) iov->ops.set_lport = &fm10k_iov_set_lport_pf; iov->ops.reset_lport = &fm10k_iov_reset_lport_pf; iov->ops.update_stats = &fm10k_iov_update_stats_pf; + iov->ops.notify_offset = &fm10k_iov_notify_offset_pf; return fm10k_sm_mbx_init(hw, &hw->mbx, fm10k_msg_data_pf); } diff --git a/drivers/net/fm10k/base/fm10k_pf.h b/drivers/net/fm10k/base/fm10k_pf.h index ae8a737..44bd193 100644 --- a/drivers/net/fm10k/base/fm10k_pf.h +++ b/drivers/net/fm10k/base/fm10k_pf.h @@ -58,6 +58,7 @@ enum fm10k_pf_tlv_msg_id_v1 { FM10K_PF_MSG_ID_GET_1588_INFO = 0x506, FM10K_PF_MSG_ID_1588_TIMESTAMP = 0x701, FM10K_PF_MSG_ID_1588_CLOCK_OWNER = 0x702, + FM10K_PF_MSG_ID_MASTER_CLK_OFFSET = 0x703, }; enum fm10k_pf_tlv_attr_id_v1 { @@ -77,6 +78,7 @@ enum fm10k_pf_tlv_attr_id_v1 { FM10K_PF_ATTR_ID_UPDATE_PVID = 0x0D, FM10K_PF_ATTR_ID_1588_TIMESTAMP = 0x10, FM10K_PF_ATTR_ID_1588_CLOCK_OWNER = 0x12, + FM10K_PF_ATTR_ID_MASTER_CLK_OFFSET = 0x14, }; #define FM10K_MSG_LPORT_MAP_GLORT_SHIFT 0 @@ -171,6 +173,11 @@ extern const struct fm10k_tlv_attr fm10k_1588_clock_owner_attr[]; FM10K_MSG_HANDLER(FM10K_PF_MSG_ID_1588_CLOCK_OWNER, \ fm10k_1588_clock_owner_attr, func) +extern const struct fm10k_tlv_attr fm10k_master_clk_offset_attr[]; +#define FM10K_PF_MSG_MASTER_CLK_OFFSET_HANDLER(func) \ + FM10K_MSG_HANDLER(FM10K_PF_MSG_ID_MASTER_CLK_OFFSET, \ + fm10k_master_clk_offset_attr, func) + s32 fm10k_iov_msg_msix_pf(struct fm10k_hw *, u32 **, struct fm10k_mbx_info *); s32 fm10k_iov_msg_mac_vlan_pf(struct fm10k_hw *, u32 **, struct fm10k_mbx_info *); diff --git a/drivers/net/fm10k/base/fm10k_type.h b/drivers/net/fm10k/base/fm10k_type.h index e0fc08d..df1d276 100644 --- a/drivers/net/fm10k/base/fm10k_type.h +++ b/drivers/net/fm10k/base/fm10k_type.h @@ -681,6 +681,7 @@ struct fm10k_mac_ops { s32 (*get_fault)(struct fm10k_hw *, int, struct fm10k_fault *); void (*request_lport_map)(struct fm10k_hw *); s32 (*adjust_systime)(struct fm10k_hw *, s32 ppb); + s32 (*notify_offset)(struct fm10k_hw *, u64 offset); u64 (*read_systime)(struct fm10k_hw *); }; @@ -781,6 +782,7 @@ struct fm10k_iov_ops { s32 (*set_lport)(struct fm10k_hw *, struct fm10k_vf_info *, u16, u8); void (*reset_lport)(struct fm10k_hw *, struct fm10k_vf_info *); void (*update_stats)(struct fm10k_hw *, struct fm10k_hw_stats_q *, u16); + void (*notify_offset)(struct fm10k_hw *, struct fm10k_vf_info*, u64); }; struct fm10k_iov_info { diff --git a/drivers/net/fm10k/base/fm10k_vf.c b/drivers/net/fm10k/base/fm10k_vf.c index 295bae4..a46b488 100644 --- a/drivers/net/fm10k/base/fm10k_vf.c +++ b/drivers/net/fm10k/base/fm10k_vf.c @@ -414,6 +414,8 @@ const struct fm10k_tlv_attr fm10k_lport_state_msg_attr[] = { FM10K_TLV_ATTR_LAST }; +extern const struct fm10k_tlv_attr fm10k_1588_msg_attr[]; + /** * fm10k_msg_lport_state_vf - Message handler for lport_state message from PF * @hw: Pointer to hardware structure @@ -497,6 +499,7 @@ STATIC s32 fm10k_update_xcast_mode_vf(struct fm10k_hw *hw, u16 glort, u8 mode) } const struct fm10k_tlv_attr fm10k_1588_msg_attr[] = { + FM10K_TLV_ATTR_U64(FM10K_1588_MSG_CLK_OFFSET), FM10K_TLV_ATTR_LAST }; diff --git a/drivers/net/fm10k/base/fm10k_vf.h b/drivers/net/fm10k/base/fm10k_vf.h index 333b0d9..116c56f 100644 --- a/drivers/net/fm10k/base/fm10k_vf.h +++ b/drivers/net/fm10k/base/fm10k_vf.h @@ -64,6 +64,7 @@ enum fm10k_tlv_lport_state_attr_id { enum fm10k_tlv_1588_attr_id { FM10K_1588_MSG_TIMESTAMP = 0, /* deprecated */ + FM10K_1588_MSG_CLK_OFFSET, FM10K_1588_MSG_MAX }; -- 1.9.3