From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mx0a-0016ce01.pphosted.com (mx0a-0016ce01.pphosted.com [67.231.148.157]) by dpdk.org (Postfix) with ESMTP id 3C6738E62 for ; Sat, 12 Sep 2015 02:43:40 +0200 (CEST) Received: from pps.filterd (m0045602.ppops.net [127.0.0.1]) by mx0a-0016ce01.pphosted.com (8.15.0.59/8.15.0.59) with SMTP id t8C0hMYl017799 for ; Fri, 11 Sep 2015 17:43:39 -0700 Received: from avcashub1.qlogic.com (avcashub3.qlogic.com [198.70.193.117]) by mx0a-0016ce01.pphosted.com with ESMTP id 1wqyhvsqr3-1 (version=TLSv1/SSLv3 cipher=AES128-SHA bits=128 verify=NOT) for ; Fri, 11 Sep 2015 17:43:39 -0700 Received: from avluser05.qlc.com (10.1.113.115) by qlc.com (10.1.4.192) with Microsoft SMTP Server id 14.3.235.1; Fri, 11 Sep 2015 17:43:38 -0700 Received: (from rmody@localhost) by avluser05.qlc.com (8.14.4/8.14.4/Submit) id t8C0hctc020866; Fri, 11 Sep 2015 17:43:38 -0700 X-Authentication-Warning: avluser05.qlc.com: rmody set sender to rasesh.mody@qlogic.com using -f From: Rasesh Mody To: Date: Fri, 11 Sep 2015 17:42:54 -0700 Message-ID: <1442018576-19981-4-git-send-email-rasesh.mody@qlogic.com> X-Mailer: git-send-email 1.7.10.3 In-Reply-To: <1442018576-19981-1-git-send-email-rasesh.mody@qlogic.com> References: <1442018576-19981-1-git-send-email-rasesh.mody@qlogic.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=nai engine=5700 definitions=7921 signatures=670636 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1507310000 definitions=main-1509120011 Cc: sony.chacko@qlogic.com Subject: [dpdk-dev] [PATCH 3/5] bnx2x: Add RTE_LIBRTE_BNX2X_REG_ACCESS config option X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 12 Sep 2015 00:43:40 -0000 From: Harish Patil Signed-off-by: Harish Patil --- config/common_linuxapp | 1 + drivers/net/bnx2x/Makefile | 2 +- drivers/net/bnx2x/bnx2x.h | 2 +- drivers/net/bnx2x/bnx2x_logs.h | 8 ++++++++ drivers/net/bnx2x/debug.c | 24 ++++++++++++++---------- 5 files changed, 25 insertions(+), 12 deletions(-) diff --git a/config/common_linuxapp b/config/common_linuxapp index 0de43d5..013fa0d 100644 --- a/config/common_linuxapp +++ b/config/common_linuxapp @@ -220,6 +220,7 @@ CONFIG_RTE_LIBRTE_BNX2X_DEBUG_INIT=n CONFIG_RTE_LIBRTE_BNX2X_DEBUG_RX=n CONFIG_RTE_LIBRTE_BNX2X_DEBUG_TX=n CONFIG_RTE_LIBRTE_BNX2X_MF_SUPPORT=n +CONFIG_RTE_LIBRTE_BNX2X_REG_ACCESS=n # # Compile burst-oriented Chelsio Terminator 10GbE/40GbE (CXGBE) PMD diff --git a/drivers/net/bnx2x/Makefile b/drivers/net/bnx2x/Makefile index 87f31b6..6b2df22 100644 --- a/drivers/net/bnx2x/Makefile +++ b/drivers/net/bnx2x/Makefile @@ -23,7 +23,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += bnx2x_ethdev.c SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += ecore_sp.c SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += elink.c SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += bnx2x_vfpf.c -SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_DEBUG) += debug.c +SRCS-$(CONFIG_RTE_LIBRTE_BNX2X_REG_ACCESS) += debug.c # this lib depends upon: DEPDIRS-$(CONFIG_RTE_LIBRTE_BNX2X_PMD) += lib/librte_eal lib/librte_ether lib/librte_hash diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h index 867b92a..ffd101c 100644 --- a/drivers/net/bnx2x/bnx2x.h +++ b/drivers/net/bnx2x/bnx2x.h @@ -1445,7 +1445,7 @@ struct bnx2x_func_init_params { #define BAR1 2 #define BAR2 4 -#ifdef RTE_LIBRTE_BNX2X_DEBUG +#ifdef RTE_LIBRTE_BNX2X_REG_ACCESS uint8_t bnx2x_reg_read8(struct bnx2x_softc *sc, size_t offset); uint16_t bnx2x_reg_read16(struct bnx2x_softc *sc, size_t offset); uint32_t bnx2x_reg_read32(struct bnx2x_softc *sc, size_t offset); diff --git a/drivers/net/bnx2x/bnx2x_logs.h b/drivers/net/bnx2x/bnx2x_logs.h index d31c253..7ef6e64 100644 --- a/drivers/net/bnx2x/bnx2x_logs.h +++ b/drivers/net/bnx2x/bnx2x_logs.h @@ -47,4 +47,12 @@ #define PMD_DRV_LOG(level, fmt, args...) \ PMD_DRV_LOG_RAW(level, fmt "\n", ## args) +#ifdef RTE_LIBRTE_BNX2X_REG_ACCESS +#define PMD_REG_ACCESS_LOG(level, fmt, args...) \ + RTE_LOG(level, PMD, "%s(): " fmt "\n", __func__, ## args) +#else +#define PMD_REG_ACCESS_LOG(level, fmt, args...) do { } while(0) +#endif + + #endif /* _PMD_LOGS_H_ */ diff --git a/drivers/net/bnx2x/debug.c b/drivers/net/bnx2x/debug.c index 9ab4f1d..b5e29f7 100644 --- a/drivers/net/bnx2x/debug.c +++ b/drivers/net/bnx2x/debug.c @@ -44,7 +44,7 @@ void bnx2x_reg_write8(struct bnx2x_softc *sc, size_t offset, uint8_t val) { - PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%02x", offset, val); + PMD_REG_ACCESS_LOG(DEBUG, "offset=0x%08lx val=0x%02x", offset, val); *((volatile uint8_t*)((uint64_t)sc->bar[BAR0].base_addr + offset)) = val; } @@ -52,10 +52,11 @@ void bnx2x_reg_write16(struct bnx2x_softc *sc, size_t offset, uint16_t val) { if ((offset % 2) != 0) { - PMD_DRV_LOG(DEBUG, "Unaligned 16-bit write to 0x%08lx", offset); + PMD_DRV_LOG(NOTICE, "Unaligned 16-bit write to 0x%08lx", + offset); } - PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%04x", offset, val); + PMD_REG_ACCESS_LOG(DEBUG, "offset=0x%08lx val=0x%04x", offset, val); *((volatile uint16_t*)((uint64_t)sc->bar[BAR0].base_addr + offset)) = val; } @@ -63,10 +64,11 @@ void bnx2x_reg_write32(struct bnx2x_softc *sc, size_t offset, uint32_t val) { if ((offset % 4) != 0) { - PMD_DRV_LOG(DEBUG, "Unaligned 32-bit write to 0x%08lx", offset); + PMD_DRV_LOG(NOTICE, "Unaligned 32-bit write to 0x%08lx", + offset); } - PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%08x", offset, val); + PMD_REG_ACCESS_LOG(DEBUG, "offset=0x%08lx val=0x%08x", offset, val); *((volatile uint32_t*)((uint64_t)sc->bar[BAR0].base_addr + offset)) = val; } @@ -76,7 +78,7 @@ bnx2x_reg_read8(struct bnx2x_softc *sc, size_t offset) uint8_t val; val = (uint8_t)(*((volatile uint8_t*)((uint64_t)sc->bar[BAR0].base_addr + offset))); - PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%02x", offset, val); + PMD_REG_ACCESS_LOG(DEBUG, "offset=0x%08lx val=0x%02x", offset, val); return (val); } @@ -87,11 +89,12 @@ bnx2x_reg_read16(struct bnx2x_softc *sc, size_t offset) uint16_t val; if ((offset % 2) != 0) { - PMD_DRV_LOG(DEBUG, "Unaligned 16-bit read from 0x%08lx", offset); + PMD_DRV_LOG(NOTICE, "Unaligned 16-bit read from 0x%08lx", + offset); } val = (uint16_t)(*((volatile uint16_t*)((uint64_t)sc->bar[BAR0].base_addr + offset))); - PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%08x", offset, val); + PMD_REG_ACCESS_LOG(DEBUG, "offset=0x%08lx val=0x%08x", offset, val); return (val); } @@ -102,12 +105,13 @@ bnx2x_reg_read32(struct bnx2x_softc *sc, size_t offset) uint32_t val; if ((offset % 4) != 0) { - PMD_DRV_LOG(DEBUG, "Unaligned 32-bit read from 0x%08lx", offset); + PMD_DRV_LOG(NOTICE, "Unaligned 32-bit read from 0x%08lx", + offset); return 0; } val = (uint32_t)(*((volatile uint32_t*)((uint64_t)sc->bar[BAR0].base_addr + offset))); - PMD_DRV_LOG(DEBUG, "offset=0x%08lx val=0x%08x", offset, val); + PMD_REG_ACCESS_LOG(DEBUG, "offset=0x%08lx val=0x%08x", offset, val); return (val); } -- 1.7.10.3