From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by dpdk.org (Postfix) with ESMTP id 596628F9D for ; Wed, 4 Nov 2015 07:08:12 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga101.jf.intel.com with ESMTP; 03 Nov 2015 22:08:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,241,1444719600"; d="scan'208";a="677957640" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga003.jf.intel.com with ESMTP; 03 Nov 2015 22:08:11 -0800 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id tA4688E3010076; Wed, 4 Nov 2015 14:08:08 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id tA4684og007556; Wed, 4 Nov 2015 14:08:07 +0800 Received: (from cliang18@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id tA4684r1007552; Wed, 4 Nov 2015 14:08:04 +0800 From: Cunming Liang To: dev@dpdk.org Date: Wed, 4 Nov 2015 14:07:38 +0800 Message-Id: <1446617263-7448-9-git-send-email-cunming.liang@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1446617263-7448-1-git-send-email-cunming.liang@intel.com> References: <1446182873-28814-2-git-send-email-cunming.liang@intel.com> <1446617263-7448-1-git-send-email-cunming.liang@intel.com> Subject: [dpdk-dev] [PATCH v3 08/13] ixgbe: fix rx intr compatible issue with PF mbox X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 04 Nov 2015 06:08:13 -0000 When ixgbe runs as a PF, mbox interrupt is prerequisite to make VF start normally. And PF sometimes won't 'dev_start', so the mbox interrupt register during 'dev_init' is required. The patch rolls back the interrupt register for mbox,lsc to the 'dev_init'. As UIO doesn't support multiple vector, mbox has to occupy the only one. It adds condition check on 'dev_start', rxq interrupt is not allowed when PF running in IOV mode via UIO. v3 change: - add doc update follow on the code change Signed-off-by: Cunming Liang --- doc/guides/rel_notes/release_2_2.rst | 2 ++ drivers/net/ixgbe/ixgbe_ethdev.c | 39 ++++++++++++++++++++++++++---------- 2 files changed, 30 insertions(+), 11 deletions(-) diff --git a/doc/guides/rel_notes/release_2_2.rst b/doc/guides/rel_notes/release_2_2.rst index ca8471b..b082fb6 100644 --- a/doc/guides/rel_notes/release_2_2.rst +++ b/doc/guides/rel_notes/release_2_2.rst @@ -152,6 +152,8 @@ Drivers hardware transactional memory support, thread scaling did not work, due to the global ring that is shared by all cores. +* **ixgbe: Fixed PF rx interrupt compatible issue with mbox.** + Libraries ~~~~~~~~~ diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index f1a738c..6b075f6 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -1126,6 +1126,13 @@ eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev) eth_dev->data->port_id, pci_dev->id.vendor_id, pci_dev->id.device_id); + rte_intr_callback_register(&pci_dev->intr_handle, + ixgbe_dev_interrupt_handler, + (void *)eth_dev); + + /* enable uio/vfio intr/eventfd mapping */ + rte_intr_enable(&pci_dev->intr_handle); + /* enable support intr */ ixgbe_enable_intr(eth_dev); @@ -1975,7 +1982,10 @@ ixgbe_dev_start(struct rte_eth_dev *dev) ixgbe_pf_host_configure(dev); /* check and configure queue intr-vector mapping */ - if (dev->data->dev_conf.intr_conf.rxq != 0) { + if (((RTE_ETH_DEV_SRIOV(dev).active && + rte_intr_cap_multiple(intr_handle)) || + !RTE_ETH_DEV_SRIOV(dev).active) && + dev->data->dev_conf.intr_conf.rxq != 0) { intr_vector = dev->data->nb_rx_queues; if (rte_intr_efd_enable(intr_handle, intr_vector)) return -1; @@ -1984,8 +1994,7 @@ ixgbe_dev_start(struct rte_eth_dev *dev) if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) { intr_handle->intr_vec = rte_zmalloc("intr_vec", - dev->data->nb_rx_queues * sizeof(int), - 0); + dev->data->nb_rx_queues * sizeof(int), 0); if (intr_handle->intr_vec == NULL) { PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues" " intr_vec\n", dev->data->nb_rx_queues); @@ -2072,20 +2081,22 @@ ixgbe_dev_start(struct rte_eth_dev *dev) skip_link_setup: - /* check if lsc interrupt is enabled */ - if (dev->data->dev_conf.intr_conf.lsc != 0) { - if (rte_intr_allow_others(intr_handle)) { - rte_intr_callback_register(intr_handle, - ixgbe_dev_interrupt_handler, - (void *)dev); + if (rte_intr_allow_others(intr_handle)) { + /* check if lsc interrupt is enabled */ + if (dev->data->dev_conf.intr_conf.lsc != 0) ixgbe_dev_lsc_interrupt_setup(dev); - } else + } else { + rte_intr_callback_unregister(intr_handle, + ixgbe_dev_interrupt_handler, + (void *)dev); + if (dev->data->dev_conf.intr_conf.lsc != 0) PMD_INIT_LOG(INFO, "lsc won't enable because of" " no intr multiplex\n"); } /* check if rxq interrupt is enabled */ - if (dev->data->dev_conf.intr_conf.rxq != 0) + if (dev->data->dev_conf.intr_conf.rxq != 0 && + rte_intr_dp_is_en(intr_handle)) ixgbe_dev_rxq_interrupt_setup(dev); /* enable uio/vfio intr/eventfd mapping */ @@ -2197,6 +2208,12 @@ ixgbe_dev_stop(struct rte_eth_dev *dev) memset(filter_info->fivetuple_mask, 0, sizeof(uint32_t) * IXGBE_5TUPLE_ARRAY_SIZE); + if (!rte_intr_allow_others(intr_handle)) + /* resume to the default handler */ + rte_intr_callback_register(intr_handle, + ixgbe_dev_interrupt_handler, + (void *)dev); + /* Clean datapath event and queue/vec mapping */ rte_intr_efd_disable(intr_handle); if (intr_handle->intr_vec != NULL) { -- 2.4.3