From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 4F3867EEF for ; Thu, 5 Nov 2015 06:12:27 +0100 (CET) Received: from orsmga002.jf.intel.com ([10.7.209.21]) by fmsmga102.fm.intel.com with ESMTP; 04 Nov 2015 21:12:26 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.20,246,1444719600"; d="scan'208";a="842982330" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by orsmga002.jf.intel.com with ESMTP; 04 Nov 2015 21:12:25 -0800 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id tA55CNBS001933; Thu, 5 Nov 2015 13:12:23 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id tA55CK7n010110; Thu, 5 Nov 2015 13:12:22 +0800 Received: (from heshaope@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id tA55CK97010106; Thu, 5 Nov 2015 13:12:20 +0800 From: Shaopeng He To: dev@dpdk.org Date: Thu, 5 Nov 2015 13:12:06 +0800 Message-Id: <1446700329-10048-5-git-send-email-shaopeng.he@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1446700329-10048-1-git-send-email-shaopeng.he@intel.com> References: <1445831265-14256-1-git-send-email-shaopeng.he@intel.com> <1446700329-10048-1-git-send-email-shaopeng.he@intel.com> Subject: [dpdk-dev] [PATCH v3 4/7] fm10k: add rx queue interrupt en/dis functions X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 05 Nov 2015 05:12:27 -0000 Interrupt mode framework has enable/disable functions for individual rx queue, this patch implements these two functions. Signed-off-by: Shaopeng He Acked-by: Jing Chen --- drivers/net/fm10k/fm10k_ethdev.c | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/drivers/net/fm10k/fm10k_ethdev.c b/drivers/net/fm10k/fm10k_ethdev.c index 4a973e8..9b210d7 100644 --- a/drivers/net/fm10k/fm10k_ethdev.c +++ b/drivers/net/fm10k/fm10k_ethdev.c @@ -2186,6 +2186,37 @@ fm10k_dev_disable_intr_vf(struct rte_eth_dev *dev) } static int +fm10k_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id) +{ + struct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private); + + /* Enable ITR */ + if (hw->mac.type == fm10k_mac_pf) + FM10K_WRITE_REG(hw, FM10K_ITR(Q2V(dev, queue_id)), + FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR); + else + FM10K_WRITE_REG(hw, FM10K_VFITR(Q2V(dev, queue_id)), + FM10K_ITR_AUTOMASK | FM10K_ITR_MASK_CLEAR); + rte_intr_enable(&dev->pci_dev->intr_handle); + return 0; +} + +static int +fm10k_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) +{ + struct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private); + + /* Disable ITR */ + if (hw->mac.type == fm10k_mac_pf) + FM10K_WRITE_REG(hw, FM10K_ITR(Q2V(dev, queue_id)), + FM10K_ITR_MASK_SET); + else + FM10K_WRITE_REG(hw, FM10K_VFITR(Q2V(dev, queue_id)), + FM10K_ITR_MASK_SET); + return 0; +} + +static int fm10k_dev_rxq_interrupt_setup(struct rte_eth_dev *dev) { struct fm10k_hw *hw = FM10K_DEV_PRIVATE_TO_HW(dev->data->dev_private); @@ -2518,6 +2549,8 @@ static const struct eth_dev_ops fm10k_eth_dev_ops = { .tx_queue_setup = fm10k_tx_queue_setup, .tx_queue_release = fm10k_tx_queue_release, .rx_descriptor_done = fm10k_dev_rx_descriptor_done, + .rx_queue_intr_enable = fm10k_dev_rx_queue_intr_enable, + .rx_queue_intr_disable = fm10k_dev_rx_queue_intr_disable, .reta_update = fm10k_reta_update, .reta_query = fm10k_reta_query, .rss_hash_update = fm10k_rss_hash_update, -- 1.9.3