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BLUPR0701MB1714; 5:Q2292wX+AFYlQcdETCpqk6qkpu7v0L5rlwl/F3qWewCu/1JTCpWmin8B6zwf3SAYnIrm3/avbbi42W4EUZaPz74qi+RgpCLGzmsGVjHvcmViheq3eTuFvQZrletJy8HqIaHV9yqXXRSQSYrJcb+0mw==; 24:R9yaqzx4F/Ip+K6QQ9963cKv4cth3GPtNI9P6fE9KXVqSpoNs3t0NI40+VaclvGtBMSMv1OIPmLbAxs5Rnd2BFwqw6rBbZfJPX/ULD5B3dc= SpamDiagnosticOutput: 1:23 SpamDiagnosticMetadata: NSPM X-OriginatorOrg: caviumnetworks.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 06 Dec 2015 16:00:15.9754 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-Transport-CrossTenantHeadersStamped: BLUPR0701MB1714 Subject: [dpdk-dev] [PATCH 2/2] bitmap: optimize for 128-bytes cache line targets X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 06 Dec 2015 16:00:20 -0000 existing rte_bitmap library implementation optimally configured to run on 64-bytes cache line, extending to 128-bytes cache line targets. Signed-off-by: Jerin Jacob --- lib/librte_sched/rte_bitmap.h | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/lib/librte_sched/rte_bitmap.h b/lib/librte_sched/rte_bitmap.h index 3d911e4..e6cf26e 100644 --- a/lib/librte_sched/rte_bitmap.h +++ b/lib/librte_sched/rte_bitmap.h @@ -45,10 +45,10 @@ extern "C" { * The bitmap component provides a mechanism to manage large arrays of bits * through bit get/set/clear and bit array scan operations. * - * The bitmap scan operation is optimized for 64-bit CPUs using 64-byte cache + * The bitmap scan operation is optimized for 64-bit CPUs using 64/128 byte cache * lines. The bitmap is hierarchically organized using two arrays (array1 and * array2), with each bit in array1 being associated with a full cache line - * (512 bits) of bitmap bits, which are stored in array2: the bit in array1 is + * (512/1024 bits) of bitmap bits, which are stored in array2: the bit in array1 is * set only when there is at least one bit set within its associated array2 * bits, otherwise the bit in array1 is cleared. The read and write operations * for array1 and array2 are always done in slabs of 64 bits. @@ -81,11 +81,17 @@ extern "C" { /* Cache line (CL) */ #define RTE_BITMAP_CL_BIT_SIZE (RTE_CACHE_LINE_SIZE * 8) + +#if RTE_CACHE_LINE_SIZE == 64 #define RTE_BITMAP_CL_BIT_SIZE_LOG2 9 +#elif RTE_CACHE_LINE_SIZE == 128 +#define RTE_BITMAP_CL_BIT_SIZE_LOG2 10 +#endif + #define RTE_BITMAP_CL_BIT_MASK (RTE_BITMAP_CL_BIT_SIZE - 1) #define RTE_BITMAP_CL_SLAB_SIZE (RTE_BITMAP_CL_BIT_SIZE / RTE_BITMAP_SLAB_BIT_SIZE) -#define RTE_BITMAP_CL_SLAB_SIZE_LOG2 3 +#define RTE_BITMAP_CL_SLAB_SIZE_LOG2 (RTE_BITMAP_CL_BIT_SIZE_LOG2 - RTE_BITMAP_SLAB_BIT_SIZE_LOG2) #define RTE_BITMAP_CL_SLAB_MASK (RTE_BITMAP_CL_SLAB_SIZE - 1) /** Bitmap data structure */ -- 2.1.0