From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 4229895D1 for ; Tue, 2 Feb 2016 07:57:16 +0100 (CET) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP; 01 Feb 2016 22:57:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.22,383,1449561600"; d="scan'208";a="40747940" Received: from shvmail01.sh.intel.com ([10.239.29.42]) by fmsmga004.fm.intel.com with ESMTP; 01 Feb 2016 22:57:14 -0800 Received: from shecgisg004.sh.intel.com (shecgisg004.sh.intel.com [10.239.29.89]) by shvmail01.sh.intel.com with ESMTP id u126vCot007482; Tue, 2 Feb 2016 14:57:12 +0800 Received: from shecgisg004.sh.intel.com (localhost [127.0.0.1]) by shecgisg004.sh.intel.com (8.13.6/8.13.6/SuSE Linux 0.8) with ESMTP id u126v8iv011826; Tue, 2 Feb 2016 14:57:10 +0800 Received: (from wenzhuol@localhost) by shecgisg004.sh.intel.com (8.13.6/8.13.6/Submit) id u126v8er011822; Tue, 2 Feb 2016 14:57:08 +0800 From: Wenzhuo Lu To: dev@dpdk.org Date: Tue, 2 Feb 2016 14:56:59 +0800 Message-Id: <1454396225-11784-2-git-send-email-wenzhuo.lu@intel.com> X-Mailer: git-send-email 1.7.4.1 In-Reply-To: <1454396225-11784-1-git-send-email-wenzhuo.lu@intel.com> References: <1454051035-25757-1-git-send-email-wenzhuo.lu@intel.com> <1454396225-11784-1-git-send-email-wenzhuo.lu@intel.com> Subject: [dpdk-dev] [PATCH v2 1/7] ixgbe: select pool by MAC when using double VLAN X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 02 Feb 2016 06:57:16 -0000 On X550, as required by datasheet, E-tag packets are not expected when double VLAN are used. So modify the register PFVTCTL after enabling double VLAN to select pool by MAC but not MAC or E-tag. Signed-off-by: Wenzhuo Lu --- drivers/net/ixgbe/ixgbe_ethdev.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index 4c4c6df..83df0c0 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -138,6 +138,8 @@ #define IXGBE_CYCLECOUNTER_MASK 0xffffffffffffffffULL +#define IXGBE_VT_CTL_POOLING_MODE_MASK 0x00030000 + static int eth_ixgbe_dev_init(struct rte_eth_dev *eth_dev); static int eth_ixgbe_dev_uninit(struct rte_eth_dev *eth_dev); static int ixgbe_dev_configure(struct rte_eth_dev *dev); @@ -1725,6 +1727,14 @@ ixgbe_vlan_hw_extend_enable(struct rte_eth_dev *dev) ctrl |= IXGBE_EXTENDED_VLAN; IXGBE_WRITE_REG(hw, IXGBE_CTRL_EXT, ctrl); + /* Clear pooling mode of PFVTCTL. It's required by X550. */ + if (hw->mac.type == ixgbe_mac_X550 || + hw->mac.type == ixgbe_mac_X550EM_x) { + ctrl = IXGBE_READ_REG(hw, IXGBE_VT_CTL); + ctrl &= ~IXGBE_VT_CTL_POOLING_MODE_MASK; + IXGBE_WRITE_REG(hw, IXGBE_VT_CTL, ctrl); + } + /* * VET EXT field in the EXVET register = 0x8100 by default * So no need to change. Same to VT field of DMATXCTL register -- 1.9.3