From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wm0-f51.google.com (mail-wm0-f51.google.com [74.125.82.51]) by dpdk.org (Postfix) with ESMTP id 1362DC4DA for ; Fri, 19 Feb 2016 12:01:05 +0100 (CET) Received: by mail-wm0-f51.google.com with SMTP id g62so63623234wme.0 for ; Fri, 19 Feb 2016 03:01:05 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=6wind-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=rNkA2A1CaQPi/F8GFr7XnuypuU4/cLv8X585TkTNv4k=; b=jRDSx4t62Kt1B8DBFmalOm+G6lf+5tIk5KWBej6UB893SxUZIf+0Nh4qZb8XRMi2EI UIl3jHrV/cviDvqvSzhdFY+6kzlS0DiaVJWCTsZeOFYUkvobWUDuQy/smBoDV4e3QFCp vMHky9lGIJ1Tro66ej3RSS3+sT83Qv3kuAMCnhr717AHE6RGr+mFy/nwKIk+SqqFXIMg gGza6tJ0sfJKmpZIq/t7Elujs7q5f3pEeFYLmarqOGti6Qi9Qcn5GjjFX/bTBUqgwaU0 8q7dy5p/Q4jM80OZlPcI/ut0gWObFu0k14IRkcPNOzl24nEZmfk44PBhm+rbABA/2GV8 24tA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=rNkA2A1CaQPi/F8GFr7XnuypuU4/cLv8X585TkTNv4k=; b=RimYmMbi2mzLED3Cphh6avVmDfrVXZDlKKiyPtjtukYoBPt6dAz+sY3pYMxA+Da0hW C414dAwbKIAKnxoX/Emp/Vq42W/6aBeYZxDhZkT5AZH6/E5cLMNZt+Bce/IM9vzfT34Z bsAj30ZqluKB3sI47r92M/GOx/iv+acx7EbnlJ8XNAQ9/eoATYqAwhHFpfQg55N8mHMO mk84CaIHFgnx0OOKRPUaLNSGOUSxleMQ/wzA8DgwsrBQ99wHth3oJRu3dJNc8jLSgI/y 9lWfzwQ1HibkCydxSLQ8NOUOi98lI3XtmdQkc8mlK/ZPDv6WTQtP9Mcrsh0miDO3Qyvv 5YVA== X-Gm-Message-State: AG10YOQaNeEm22HaipY03fcGp9+XuSCRLTTVIQTgI/czqHoj55NTycar9QiJOLlcrB2Fk3BE X-Received: by 10.194.123.35 with SMTP id lx3mr12266796wjb.132.1455879664918; Fri, 19 Feb 2016 03:01:04 -0800 (PST) Received: from pala.dev.6wind.com (guy78-3-82-239-227-177.fbx.proxad.net. [82.239.227.177]) by smtp.gmail.com with ESMTPSA id m6sm3406998wje.21.2016.02.19.03.01.03 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 19 Feb 2016 03:01:04 -0800 (PST) From: Didier Pallard To: dev@dpdk.org Date: Fri, 19 Feb 2016 12:00:31 +0100 Message-Id: <1455879631-18420-3-git-send-email-didier.pallard@6wind.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1455879631-18420-1-git-send-email-didier.pallard@6wind.com> References: <1455010467-4991-1-git-send-email-didier.pallard@6wind.com> <1455879631-18420-1-git-send-email-didier.pallard@6wind.com> Subject: [dpdk-dev] [PATCH v3 2/2] hash: fix CRC32c computation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 19 Feb 2016 11:01:05 -0000 Fix crc32c hash functions to return a valid crc32c value for data lengthes not multiple of 4 bytes. ARM code is not tested. Signed-off-by: Didier Pallard Acked-by: David Marchand --- doc/guides/rel_notes/release_16_04.rst | 5 ++ lib/librte_hash/rte_crc_arm64.h | 64 +++++++++++++++++ lib/librte_hash/rte_hash_crc.h | 125 ++++++++++++++++++++++++++------- 3 files changed, 167 insertions(+), 27 deletions(-) diff --git a/doc/guides/rel_notes/release_16_04.rst b/doc/guides/rel_notes/release_16_04.rst index eb1b3b2..45b35dd 100644 --- a/doc/guides/rel_notes/release_16_04.rst +++ b/doc/guides/rel_notes/release_16_04.rst @@ -68,6 +68,11 @@ Drivers Libraries ~~~~~~~~~ +* **hash: Fixed CRC32c hash computation for non multiple of 4 bytes sizes.** + + Fix crc32c hash functions to return a valid crc32c value for data lengthes + not multiple of 4 bytes. + Examples ~~~~~~~~ diff --git a/lib/librte_hash/rte_crc_arm64.h b/lib/librte_hash/rte_crc_arm64.h index 02e26bc..7dd6334 100644 --- a/lib/librte_hash/rte_crc_arm64.h +++ b/lib/librte_hash/rte_crc_arm64.h @@ -50,6 +50,28 @@ extern "C" { #include static inline uint32_t +crc32c_arm64_u8(uint8_t data, uint32_t init_val) +{ + asm(".arch armv8-a+crc"); + __asm__ volatile( + "crc32cb %w[crc], %w[crc], %w[value]" + : [crc] "+r" (init_val) + : [value] "r" (data)); + return init_val; +} + +static inline uint32_t +crc32c_arm64_u16(uint16_t data, uint32_t init_val) +{ + asm(".arch armv8-a+crc"); + __asm__ volatile( + "crc32ch %w[crc], %w[crc], %w[value]" + : [crc] "+r" (init_val) + : [value] "r" (data)); + return init_val; +} + +static inline uint32_t crc32c_arm64_u32(uint32_t data, uint32_t init_val) { asm(".arch armv8-a+crc"); @@ -103,6 +125,48 @@ rte_hash_crc_init_alg(void) } /** + * Use single crc32 instruction to perform a hash on a 1 byte value. + * Fall back to software crc32 implementation in case arm64 crc intrinsics is + * not supported + * + * @param data + * Data to perform hash on. + * @param init_val + * Value to initialise hash generator. + * @return + * 32bit calculated hash value. + */ +static inline uint32_t +rte_hash_crc_1byte(uint8_t data, uint32_t init_val) +{ + if (likely(crc32_alg & CRC32_ARM64)) + return crc32c_arm64_u8(data, init_val); + + return crc32c_1byte(data, init_val); +} + +/** + * Use single crc32 instruction to perform a hash on a 2 bytes value. + * Fall back to software crc32 implementation in case arm64 crc intrinsics is + * not supported + * + * @param data + * Data to perform hash on. + * @param init_val + * Value to initialise hash generator. + * @return + * 32bit calculated hash value. + */ +static inline uint32_t +rte_hash_crc_2byte(uint16_t data, uint32_t init_val) +{ + if (likely(crc32_alg & CRC32_ARM64)) + return crc32c_arm64_u16(data, init_val); + + return crc32c_2bytes(data, init_val); +} + +/** * Use single crc32 instruction to perform a hash on a 4 byte value. * Fall back to software crc32 implementation in case arm64 crc intrinsics is * not supported diff --git a/lib/librte_hash/rte_hash_crc.h b/lib/librte_hash/rte_hash_crc.h index 78a34b7..63e74aa 100644 --- a/lib/librte_hash/rte_hash_crc.h +++ b/lib/librte_hash/rte_hash_crc.h @@ -328,6 +328,28 @@ static const uint32_t crc32c_tables[8][256] = {{ crc32c_tables[(n)-1][((crc) >> 8) & 0xFF]) static inline uint32_t +crc32c_1byte(uint8_t data, uint32_t init_val) +{ + uint32_t crc; + crc = init_val; + crc ^= data; + + return crc32c_tables[0][crc & 0xff] ^ (crc >> 8); +} + +static inline uint32_t +crc32c_2bytes(uint16_t data, uint32_t init_val) +{ + uint32_t crc; + crc = init_val; + crc ^= data; + + crc = CRC32_UPD(crc, 1) ^ (crc >> 16); + + return crc; +} + +static inline uint32_t crc32c_1word(uint32_t data, uint32_t init_val) { uint32_t crc, term1, term2; @@ -367,6 +389,26 @@ crc32c_2words(uint64_t data, uint32_t init_val) #if defined(RTE_ARCH_I686) || defined(RTE_ARCH_X86_64) static inline uint32_t +crc32c_sse42_u8(uint8_t data, uint32_t init_val) +{ + __asm__ volatile( + "crc32b %[data], %[init_val];" + : [init_val] "+r" (init_val) + : [data] "rm" (data)); + return init_val; +} + +static inline uint32_t +crc32c_sse42_u16(uint16_t data, uint32_t init_val) +{ + __asm__ volatile( + "crc32w %[data], %[init_val];" + : [init_val] "+r" (init_val) + : [data] "rm" (data)); + return init_val; +} + +static inline uint32_t crc32c_sse42_u32(uint32_t data, uint32_t init_val) { __asm__ volatile( @@ -453,6 +495,52 @@ rte_hash_crc_init_alg(void) } /** + * Use single crc32 instruction to perform a hash on a byte value. + * Fall back to software crc32 implementation in case SSE4.2 is + * not supported + * + * @param data + * Data to perform hash on. + * @param init_val + * Value to initialise hash generator. + * @return + * 32bit calculated hash value. + */ +static inline uint32_t +rte_hash_crc_1byte(uint8_t data, uint32_t init_val) +{ +#if defined RTE_ARCH_I686 || defined RTE_ARCH_X86_64 + if (likely(crc32_alg & CRC32_SSE42)) + return crc32c_sse42_u8(data, init_val); +#endif + + return crc32c_1byte(data, init_val); +} + +/** + * Use single crc32 instruction to perform a hash on a 2 bytes value. + * Fall back to software crc32 implementation in case SSE4.2 is + * not supported + * + * @param data + * Data to perform hash on. + * @param init_val + * Value to initialise hash generator. + * @return + * 32bit calculated hash value. + */ +static inline uint32_t +rte_hash_crc_2byte(uint16_t data, uint32_t init_val) +{ +#if defined RTE_ARCH_I686 || defined RTE_ARCH_X86_64 + if (likely(crc32_alg & CRC32_SSE42)) + return crc32c_sse42_u16(data, init_val); +#endif + + return crc32c_2bytes(data, init_val); +} + +/** * Use single crc32 instruction to perform a hash on a 4 byte value. * Fall back to software crc32 implementation in case SSE4.2 is * not supported @@ -521,7 +609,6 @@ static inline uint32_t rte_hash_crc(const void *data, uint32_t data_len, uint32_t init_val) { unsigned i; - uint64_t temp = 0; uintptr_t pd = (uintptr_t) data; for (i = 0; i < data_len / 8; i++) { @@ -529,35 +616,19 @@ rte_hash_crc(const void *data, uint32_t data_len, uint32_t init_val) pd += 8; } - switch (7 - (data_len & 0x07)) { - case 0: - temp |= (uint64_t) *((const uint8_t *)pd + 6) << 48; - /* Fallthrough */ - case 1: - temp |= (uint64_t) *((const uint8_t *)pd + 5) << 40; - /* Fallthrough */ - case 2: - temp |= (uint64_t) *((const uint8_t *)pd + 4) << 32; - temp |= *(const uint32_t *)pd; - init_val = rte_hash_crc_8byte(temp, init_val); - break; - case 3: + if (data_len & 0x4) { init_val = rte_hash_crc_4byte(*(const uint32_t *)pd, init_val); - break; - case 4: - temp |= *((const uint8_t *)pd + 2) << 16; - /* Fallthrough */ - case 5: - temp |= *((const uint8_t *)pd + 1) << 8; - /* Fallthrough */ - case 6: - temp |= *(const uint8_t *)pd; - init_val = rte_hash_crc_4byte(temp, init_val); - /* Fallthrough */ - default: - break; + pd += 4; + } + + if (data_len & 0x2) { + init_val = rte_hash_crc_2byte(*(const uint16_t *)pd, init_val); + pd += 2; } + if (data_len & 0x1) + init_val = rte_hash_crc_1byte(*(const uint8_t *)pd, init_val); + return init_val; } -- 2.1.4