From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: <3chas3@gmail.com> Received: from mail-qk0-f194.google.com (mail-qk0-f194.google.com [209.85.220.194]) by dpdk.org (Postfix) with ESMTP id BFE622A07 for ; Sat, 11 Jun 2016 00:19:00 +0200 (CEST) Received: by mail-qk0-f194.google.com with SMTP id l185so6348136qkc.2 for ; Fri, 10 Jun 2016 15:19:00 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=mKhum2/bXg1sfdZQk81/bmoEr2Q+MutGPWbpTdnhN4I=; b=aGkjs/FTCXRdIynypnjeubcUJQNuQCKfZz+4u/4ss5nRHwyd22vpQT0fOhVB7PpfLs h8n72/YIn6gzehmp4C9iWqhD1WdAgQ5RtY6ySiQOnWcoGp9O4GxLucybVDfD3OzpJWDt fBNDCD6D2q2ufaiIZwxQ73ZPP9V90IOXkE0rtpohZJyQLDrrWmSEmtV83GLo31LQnswO lKOOI4hHsYoa8hWyrFfKsLsLGZc4jR4/ddgpN/rlArNPKyQfYWIS3Lb7lPSWBJfVrBa9 s8c4B2jdf8Ffsa7oz/3P/MP7nUHurlIp4TxX6vWSbA2DTW7MQVpNSLkk1hGM2C7A8v4h NSrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=mKhum2/bXg1sfdZQk81/bmoEr2Q+MutGPWbpTdnhN4I=; b=FYDsEEs3WJE7WKBrIMI+EUih0DCPbjh/bl8zsapALF/+7nzdfTDv4p2UBfMN/si4OD al7PRr+GLJqAV2yqVrqpXWQxcWdK1MJrdd+AxxlW+ZAYC0I+ntoKAwYc/RM36CitEYP5 H83idyjSVAjM5GADXbVizBrHAWEsHExzAIp6mmhDFll4zCU4e08fflAdxJOOxe8wU1Xp SLAnfu8MmRkfMlqPdfxT9lVcDPW4nfane23cqhkIWvswmPgwsnuOG/RF1vdsMVnEk1AH t9J8M7y/Za24yr7XSY4gi5cMuOGHNpWW17gFTFf5pvURYG9PhB4+t3mp5iaf3An2AGDS I/TQ== X-Gm-Message-State: ALyK8tLDPZwX/ZTLYwL19c/djqJxHmzYUsbjbHpwXV9wOPKNkB5Jnik2XzNjQPysZhMiLg== X-Received: by 10.55.87.197 with SMTP id l188mr4137043qkb.13.1465597140275; Fri, 10 Jun 2016 15:19:00 -0700 (PDT) Received: from monolith.home (pool-173-79-169-182.washdc.fios.verizon.net. [173.79.169.182]) by smtp.gmail.com with ESMTPSA id s2sm3668271qkc.8.2016.06.10.15.18.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 10 Jun 2016 15:18:59 -0700 (PDT) From: Chas Williams <3chas3@gmail.com> To: dev@dpdk.org Cc: harish.patil@qlogic.com, "Charles (Chas) Williams" Date: Fri, 10 Jun 2016 18:18:52 -0400 Message-Id: <1465597132-11674-1-git-send-email-3chas3@gmail.com> X-Mailer: git-send-email 2.5.5 Subject: [dpdk-dev] [PATCH] bnx2x: Correctly determine MSIX vector count X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Jun 2016 22:19:01 -0000 From: "Charles (Chas) Williams" If MSIX is available, the vector count given by the table size is one less than the actual count. This count also limits the receive and transmit queue resources the VF can support. Fixes: 540a211084a7 ("bnx2x: driver core") Signed-off-by: Chas Williams --- drivers/net/bnx2x/bnx2x.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/net/bnx2x/bnx2x.c b/drivers/net/bnx2x/bnx2x.c index 6edb2f9..4be732f 100644 --- a/drivers/net/bnx2x/bnx2x.c +++ b/drivers/net/bnx2x/bnx2x.c @@ -9570,8 +9570,10 @@ static int bnx2x_pci_get_caps(struct bnx2x_softc *sc) static void bnx2x_init_rte(struct bnx2x_softc *sc) { if (IS_VF(sc)) { - sc->max_tx_queues = BNX2X_VF_MAX_QUEUES_PER_VF; - sc->max_rx_queues = BNX2X_VF_MAX_QUEUES_PER_VF; + sc->max_tx_queues = min(BNX2X_VF_MAX_QUEUES_PER_VF, + sc->igu_sb_cnt); + sc->max_rx_queues = min(BNX2X_VF_MAX_QUEUES_PER_VF, + sc->igu_sb_cnt); } else { sc->max_tx_queues = 128; sc->max_rx_queues = 128; @@ -9713,7 +9715,7 @@ int bnx2x_attach(struct bnx2x_softc *sc) pci_read(sc, (sc->devinfo.pcie_msix_cap_reg + PCIR_MSIX_CTRL), &val, 2); - sc->igu_sb_cnt = (val & PCIM_MSIXCTRL_TABLE_SIZE); + sc->igu_sb_cnt = (val & PCIM_MSIXCTRL_TABLE_SIZE) + 1; } else { sc->igu_sb_cnt = 1; } -- 2.5.5