From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id 5FD3B4A63 for ; Mon, 15 Aug 2016 17:02:48 +0200 (CEST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga104.fm.intel.com with ESMTP; 15 Aug 2016 08:02:15 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.28,525,1464678000"; d="scan'208";a="865695598" Received: from irvmail001.ir.intel.com ([163.33.26.43]) by orsmga003.jf.intel.com with ESMTP; 15 Aug 2016 08:02:14 -0700 Received: from sivswdev02.ir.intel.com (sivswdev02.ir.intel.com [10.237.217.46]) by irvmail001.ir.intel.com (8.14.3/8.13.6/MailSET/Hub) with ESMTP id u7FF2BOo023125; Mon, 15 Aug 2016 16:02:12 +0100 Received: from sivswdev02.ir.intel.com (localhost [127.0.0.1]) by sivswdev02.ir.intel.com with ESMTP id u7FF2BLF016493; Mon, 15 Aug 2016 16:02:11 +0100 Received: (from reshmapa@localhost) by sivswdev02.ir.intel.com with id u7FF2BA0016489; Mon, 15 Aug 2016 16:02:11 +0100 From: Reshma Pattan To: dev@dpdk.org Cc: Reshma Pattan Date: Mon, 15 Aug 2016 16:02:08 +0100 Message-Id: <1471273328-16390-1-git-send-email-reshma.pattan@intel.com> X-Mailer: git-send-email 1.7.4.1 Subject: [dpdk-dev] [PATCH] mk: gcc -march support for intel processors code names X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 15 Aug 2016 15:02:49 -0000 The GCC 4.9 -march option supports the intel code names for processors, for example -march=silvermont, -march=broadwell. The RTE_MACHINE config flag can be used to pass code name to the compiler as -march flag. Also old gcc versions compatibility code for the intel platform is removed from mk/toolchain/gcc/rte.toolchain-compat.mk Release notes is updated. Signed-off-by: Reshma Pattan --- doc/guides/rel_notes/release_16_11.rst | 5 ++++ mk/target/generic/rte.vars.mk | 4 +++ mk/toolchain/gcc/rte.toolchain-compat.mk | 47 ++------------------------------ 3 files changed, 11 insertions(+), 45 deletions(-) diff --git a/doc/guides/rel_notes/release_16_11.rst b/doc/guides/rel_notes/release_16_11.rst index 0b9022d..9f58133 100644 --- a/doc/guides/rel_notes/release_16_11.rst +++ b/doc/guides/rel_notes/release_16_11.rst @@ -36,6 +36,11 @@ New Features This section is a comment. Make sure to start the actual text at the margin. +* **Added support for new gcc -march option.** + + The GCC 4.9 ``-march`` option supports the Intel processor code names. + The config option ``RTE_MACHINE`` can be used to pass code names to the compiler as ``-march`` flag. + Resolved Issues --------------- diff --git a/mk/target/generic/rte.vars.mk b/mk/target/generic/rte.vars.mk index 75a616a..b31e426 100644 --- a/mk/target/generic/rte.vars.mk +++ b/mk/target/generic/rte.vars.mk @@ -50,7 +50,11 @@ # - can define CPU_ASFLAGS variable (overriden by cmdline value) that # overrides the one defined in arch. # +ifneq ($(wildcard $(RTE_SDK)/mk/machine/$(RTE_MACHINE)/rte.vars.mk),) include $(RTE_SDK)/mk/machine/$(RTE_MACHINE)/rte.vars.mk +else +MACHINE_CFLAGS := -march=$(RTE_MACHINE) +endif # # arch: diff --git a/mk/toolchain/gcc/rte.toolchain-compat.mk b/mk/toolchain/gcc/rte.toolchain-compat.mk index 6eed20c..7f23721 100644 --- a/mk/toolchain/gcc/rte.toolchain-compat.mk +++ b/mk/toolchain/gcc/rte.toolchain-compat.mk @@ -42,51 +42,8 @@ GCC_MAJOR = $(shell echo __GNUC__ | $(CC) -E -x c - | tail -n 1) GCC_MINOR = $(shell echo __GNUC_MINOR__ | $(CC) -E -x c - | tail -n 1) GCC_VERSION = $(GCC_MAJOR)$(GCC_MINOR) -# if GCC is older than 4.x -ifeq ($(shell test $(GCC_VERSION) -lt 40 && echo 1), 1) - MACHINE_CFLAGS = -$(warning You are using GCC < 4.x. This is neither supported, nor tested.) - - -else -# GCC graceful degradation -# GCC 4.2.x - added support for generic target -# GCC 4.3.x - added support for core2, ssse3, sse4.1, sse4.2 -# GCC 4.4.x - added support for avx, aes, pclmul -# GCC 4.5.x - added support for atom -# GCC 4.6.x - added support for corei7, corei7-avx -# GCC 4.7.x - added support for fsgsbase, rdrnd, f16c, core-avx-i, core-avx2 # GCC 4.9.x - added support for armv8-a+crc # - ifeq ($(shell test $(GCC_VERSION) -le 49 && echo 1), 1) - MACHINE_CFLAGS := $(patsubst -march=armv8-a+crc,-march=armv8-a+crc -D__ARM_FEATURE_CRC32=1,$(MACHINE_CFLAGS)) - endif - ifeq ($(shell test $(GCC_VERSION) -le 47 && echo 1), 1) - MACHINE_CFLAGS := $(patsubst -march=core-avx-i,-march=corei7-avx,$(MACHINE_CFLAGS)) - MACHINE_CFLAGS := $(patsubst -march=core-avx2,-march=core-avx2,$(MACHINE_CFLAGS)) - endif - ifeq ($(shell test $(GCC_VERSION) -lt 46 && echo 1), 1) - MACHINE_CFLAGS := $(patsubst -march=corei7-avx,-march=core2 -maes -mpclmul -mavx,$(MACHINE_CFLAGS)) - MACHINE_CFLAGS := $(patsubst -march=corei7,-march=core2 -maes -mpclmul,$(MACHINE_CFLAGS)) - endif - ifeq ($(shell test $(GCC_VERSION) -lt 45 && echo 1), 1) - MACHINE_CFLAGS := $(patsubst -march=atom,-march=core2 -mssse3,$(MACHINE_CFLAGS)) - endif - ifeq ($(shell test $(GCC_VERSION) -lt 44 && echo 1), 1) - MACHINE_CFLAGS := $(filter-out -mavx -mpclmul -maes,$(MACHINE_CFLAGS)) - ifneq ($(findstring SSE4_2, $(CPUFLAGS)),) - MACHINE_CFLAGS += -msse4.2 - endif - ifneq ($(findstring SSE4_1, $(CPUFLAGS)),) - MACHINE_CFLAGS += -msse4.1 - endif - endif - ifeq ($(shell test $(GCC_VERSION) -lt 43 && echo 1), 1) - MACHINE_CFLAGS := $(filter-out -msse% -mssse%,$(MACHINE_CFLAGS)) - MACHINE_CFLAGS := $(patsubst -march=core2,-march=generic,$(MACHINE_CFLAGS)) - MACHINE_CFLAGS += -msse3 - endif - ifeq ($(shell test $(GCC_VERSION) -lt 42 && echo 1), 1) - MACHINE_CFLAGS := $(filter-out -march% -mtune% -msse%,$(MACHINE_CFLAGS)) - endif +ifeq ($(shell test $(GCC_VERSION) -le 49 && echo 1), 1) +MACHINE_CFLAGS := $(patsubst -march=armv8-a+crc,-march=armv8-a+crc -D__ARM_FEATURE_CRC32=1,$(MACHINE_CFLAGS)) endif -- 2.7.4