From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id C92C72A6C for ; Mon, 19 Sep 2016 18:37:04 +0200 (CEST) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP; 19 Sep 2016 09:37:03 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.30,362,1470726000"; d="scan'208";a="881531280" Received: from sie-lab-214-241.ir.intel.com (HELO silpixa00382162.ir.intel.com) ([10.237.214.241]) by orsmga003.jf.intel.com with ESMTP; 19 Sep 2016 09:37:02 -0700 From: Deepak Kumar Jain To: dev@dpdk.org Cc: pablo.de.lara.guarch@intel.com, Deepak Kumar JAIN Date: Mon, 19 Sep 2016 17:37:01 +0100 Message-Id: <1474303021-137643-1-git-send-email-deepak.k.jain@intel.com> X-Mailer: git-send-email 2.5.5 In-Reply-To: <1473846993-29139-1-git-send-email-deepak.k.jain@intel.com> References: <1473846993-29139-1-git-send-email-deepak.k.jain@intel.com> Subject: [dpdk-dev] [PATCH v3] crypto/qat: add Intel(R) QuickAssist C3xxx device X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 19 Sep 2016 16:37:05 -0000 From: Deepak Kumar JAIN Signed-off-by: Deepak Kumar Jain Acked-by: Fiona Trahe --- Changes in v3: Updated qat.rst by removing the limitation. Changes in v2: Added new feature information in release_16_11.rst file. doc/guides/cryptodevs/qat.rst | 76 ++++++++++++++++++++++++++++++---- doc/guides/rel_notes/release_16_11.rst | 3 ++ drivers/crypto/qat/rte_qat_cryptodev.c | 3 ++ 3 files changed, 75 insertions(+), 7 deletions(-) diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst index 50bfc95..61bbdef 100644 --- a/doc/guides/cryptodevs/qat.rst +++ b/doc/guides/cryptodevs/qat.rst @@ -31,8 +31,8 @@ Intel(R) QuickAssist (QAT) Crypto Poll Mode Driver ================================================== The QAT PMD provides poll mode crypto driver support for **Intel QuickAssist -Technology DH895xxC** and **Intel QuickAssist Technology C62x** -hardware accelerator. +Technology DH895xxC** , **Intel QuickAssist Technology C62x** and +**Intel QuickAssist Technology C3xxx** hardware accelerator. Features @@ -77,7 +77,6 @@ Limitations * Snow3g(UIA2) supported only if hash length, hash offset fields are byte-aligned. * No BSD support as BSD QAT kernel driver not available. - Installation ------------ @@ -99,14 +98,16 @@ If you are running on kernel 4.4 or greater, see instructions for `Installation using kernel.org driver`_ below. If you are on a kernel earlier than 4.4, see `Installation using 01.org QAT driver`_. -For **Intel QuickAssist Technology C62x** device, kernel 4.5 or greater is -needed. See instructions for `Installation using kernel.org driver`_ below. +For **Intel QuickAssist Technology C62x** and **Intel QuickAssist Technology C3xxx** +device, kernel 4.5 or greater is needed. +See instructions for `Installation using kernel.org driver`_ below. Installation using 01.org QAT driver ------------------------------------ -NOTE: There is no driver available for **Intel QuickAssist Technology C62x** on 01.org. +NOTE: There is no driver available for **Intel QuickAssist Technology C62x** and +**Intel QuickAssist Technology C3xxx** devices on 01.org. Download the latest QuickAssist Technology Driver from `01.org `_ @@ -185,6 +186,7 @@ Installation using kernel.org driver ------------------------------------ For **Intel QuickAssist Technology DH895xxC**: + Assuming you are running on at least a 4.4 kernel, you can use the stock kernel.org QAT driver to start the QAT hardware. @@ -243,7 +245,6 @@ cd to your linux source root directory and start the qat kernel modules: **Note**:The following warning in /var/log/messages can be ignored: ``IOMMU should be enabled for SR-IOV to work correctly`` - For **Intel QuickAssist Technology C62x**: Assuming you are running on at least a 4.5 kernel, you can use the stock kernel.org QAT driver to start the QAT hardware. @@ -288,6 +289,47 @@ the bdf of the 48 VF devices are available per ``C62x`` device. To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_. +For **Intel QuickAssist Technology C3xxx**: +Assuming you are running on at least a 4.5 kernel, you can use the stock kernel.org QAT +driver to start the QAT hardware. + +The steps below assume you are: + +* Running DPDK on a platform with one ``C3xxx`` device. +* On a kernel at least version 4.5. + +In BIOS ensure that SRIOV is enabled and VT-d is disabled. + +Ensure the QAT driver is loaded on your system, by executing:: + + lsmod | grep qat + +You should see the following output:: + + qat_c3xxx 16384 0 + intel_qat 122880 1 qat_c3xxx + +Next, you need to expose the Virtual Functions (VFs) using the sysfs file system. + +First find the bdf of the physical function (PF) of the C3xxx device + + lspci -d:19e2 + +You should see output similar to:: + + 01:00.0 Co-processor: Intel Corporation Device 19e2 + +For c3xxx device there is 1 PFs. +Using the sysfs, enable the 16 VFs:: + + echo 16 > /sys/bus/pci/drivers/c3xxx/0000\:01\:00.0/sriov_numvfs + +If you get an error, it's likely you're using a QAT kernel driver earlier than kernel 4.5. + +To verify that the VFs are available for use - use ``lspci -d:19e3`` to confirm +the bdf of the 16 VF devices are available per ``C3xxx`` device. +To complete the installation - follow instructions in `Binding the available VFs to the DPDK UIO driver`_. + Binding the available VFs to the DPDK UIO driver ------------------------------------------------ @@ -333,3 +375,23 @@ if yours are different adjust the unbind command below:: echo "8086 37c9" > /sys/bus/pci/drivers/igb_uio/new_id You can use ``lspci -vvd:37c9`` to confirm that all devices are now in use by igb_uio kernel driver. + +For **Intel(R) QuickAssist Technology C3xxx** device: +The unbind command below assumes ``bdfs`` of ``01:01.00-01:02.07``, +if yours are different adjust the unbind command below:: + + cd $RTE_SDK + modprobe uio + insmod ./build/kmod/igb_uio.ko + + for device in $(seq 1 2); do \ + for fn in $(seq 0 7); do \ + echo -n 0000:01:0${device}.${fn} > \ + /sys/bus/pci/devices/0000\:01\:0${device}.${fn}/driver/unbind; \ + + done; \ + done + + echo "8086 19e3" > /sys/bus/pci/drivers/igb_uio/new_id + +You can use ``lspci -vvd:19e3`` to confirm that all devices are now in use by igb_uio kernel driver. diff --git a/doc/guides/rel_notes/release_16_11.rst b/doc/guides/rel_notes/release_16_11.rst index 5db495e..4bc67e0 100644 --- a/doc/guides/rel_notes/release_16_11.rst +++ b/doc/guides/rel_notes/release_16_11.rst @@ -36,6 +36,9 @@ New Features This section is a comment. Make sure to start the actual text at the margin. +* ** Added support of C3xxx Device in QAT PMD.** + Support for Device c3xxx has been enabled in QAT PMD. + * ** Added support of C62XX Device in QAT PMD.** Support for Device c62xx has been enabled in QAT PMD. diff --git a/drivers/crypto/qat/rte_qat_cryptodev.c b/drivers/crypto/qat/rte_qat_cryptodev.c index e606eb5..eb929b5 100644 --- a/drivers/crypto/qat/rte_qat_cryptodev.c +++ b/drivers/crypto/qat/rte_qat_cryptodev.c @@ -74,6 +74,9 @@ static struct rte_pci_id pci_id_qat_map[] = { { RTE_PCI_DEVICE(0x8086, 0x37c9), }, + { + RTE_PCI_DEVICE(0x8086, 0x19e3), + }, {.device_id = 0}, }; -- 2.4.11