From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mailout2.w1.samsung.com (mailout2.w1.samsung.com [210.118.77.12]) by dpdk.org (Postfix) with ESMTP id 9599C7F2D for ; Wed, 19 Oct 2016 16:07:38 +0200 (CEST) Received: from eucas1p2.samsung.com (unknown [182.198.249.207]) by mailout2.w1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTP id <0OFA00AHSSKOZJ90@mailout2.w1.samsung.com> for dev@dpdk.org; Wed, 19 Oct 2016 15:07:36 +0100 (BST) Received: from eusmges3.samsung.com (unknown [203.254.199.242]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20161019140736eucas1p2fe196ccf14887bdb72939234801f3435~_9Asi8M1r1981019810eucas1p2a; Wed, 19 Oct 2016 14:07:36 +0000 (GMT) Received: from eucas1p2.samsung.com ( [182.198.249.207]) by eusmges3.samsung.com (EUCPMTA) with SMTP id 87.7A.11330.82E77085; Wed, 19 Oct 2016 15:07:36 +0100 (BST) Received: from eusmgms1.samsung.com (unknown [182.198.249.179]) by eucas1p2.samsung.com (KnoxPortal) with ESMTP id 20161019140735eucas1p267bb4aa03547e70e5f13d78e2ffedcc4~_9Ar_vrJE1983419834eucas1p2D; Wed, 19 Oct 2016 14:07:35 +0000 (GMT) X-AuditID: cbfec7f2-f79556d000002c42-43-58077e280f7c Received: from eusync2.samsung.com ( [203.254.199.212]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id 0B.53.07726.71E77085; Wed, 19 Oct 2016 15:07:19 +0100 (BST) Received: from imaximets.rnd.samsung.ru ([106.109.129.180]) by eusync2.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0OFA00CONSK71Q80@eusync2.samsung.com>; Wed, 19 Oct 2016 15:07:35 +0100 (BST) From: Ilya Maximets To: dev@dpdk.org, Helin Zhang , Konstantin Ananyev , Jingjing Wu Cc: Dyasly Sergey , Heetae Ahn , Bruce Richardson , Ilya Maximets Date: Wed, 19 Oct 2016 17:07:17 +0300 Message-id: <1476886037-4586-3-git-send-email-i.maximets@samsung.com> X-Mailer: git-send-email 2.7.4 In-reply-to: <1476886037-4586-1-git-send-email-i.maximets@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrMIsWRmVeSWpSXmKPExsWy7djP87oadewRBjP28lncWGVv8e7TdiaL aZ9vs1tMubad0eJK+092i5kLPjNavP+ziMVi8mwpBw6PXwuWsnos3vOSyaNvyyrGAOYoLpuU 1JzMstQifbsErowNnWtZCyZKVfQunc7WwLhGtIuRk0NCwETiz9/9LBC2mMSFe+vZuhi5OIQE ljJKLJxxEcr5zChx/f0dVpiOqYt7oBLLGCWurrsA5TQzSby4tokJpIpNQEfi1OojjCAJEYF+ RonZCw4zgzjMAqsYJXYcWckOUiUsECjx8OI2RhCbRUBVYuu0ZWwgNq+Aq8SNO0vYIfbJSdw8 1wnUzMHBKeAmsepeJsgcCYHnbBI/VmxnB4lLCMhKbDrADGG6SPyabA/RKSzx6vgWqCkyEp0d B5kg7GqJiVvb2CHGtAD9OfEH1Gv2EqduXgUrYhbgk5i0bTrUTF6JjjYhiBIPiU/3T7NChB0l Tk4Thvh9JqPEnqc/GCcwyixgZFjFKJJaWpybnlpsrFecmFtcmpeul5yfu4kRGLWn/x3/tIPx 6wmrQ4wCHIxKPLwcVewRQqyJZcWVuYcYJTiYlUR4OSuAQrwpiZVVqUX58UWlOanFhxilOViU xHn3LLgSLiSQnliSmp2aWpBaBJNl4uCUamBM33/rf9nClyIy3UYW6WVCzGt4/j2Ysr6c/970 uUuKDj0pDnJs/FR1wtZT3tB1V2BZoqRCktsRky3fu+comOUwbE48bX9v26rfF31+ubg7/DrK E7zF1fFbb9sdeYUn7I9fcsS//H9DMTTwkbCE1Bfb2yZvY/Z1C/50uz0xtP7IvV4h4a0hIaJK LMUZiYZazEXFiQA1NC2M1gIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrCLMWRmVeSWpSXmKPExsVy+t/xK7ridewRBu8fcljcWGVv8e7TdiaL aZ9vs1tMubad0eJK+092i5kLPjNavP+ziMVi8mwpBw6PXwuWsnos3vOSyaNvyyrGAOYoN5uM 1MSU1CKF1Lzk/JTMvHRbpdAQN10LJYW8xNxUW6UIXd+QICWFssScUiDPyAANODgHuAcr6dsl uGVs6FzLWjBRqqJ36XS2BsY1ol2MnBwSAiYSUxf3sEHYYhIX7q0Hsrk4hASWMEpsmt/CBOG0 MknMXvOCGaSKTUBH4tTqI4wgCRGBiYwS028sZwdxmAXWMEocafrMClIlLOAv8eBwE1gHi4Cq xNZpy8B28Aq4Sty4s4QdYp+cxM1znUA1HBycAm4Sq+5lgoSFgEo62texTmDkXcDIsIpRJLW0 ODc9t9hQrzgxt7g0L10vOT93EyMwhLcd+7l5B+OljcGHGAU4GJV4eDmq2COEWBPLiitzDzFK cDArifByVgCFeFMSK6tSi/Lji0pzUosPMZoC3TSRWUo0OR8YX3kl8YYmhuaWhkbGFhbmRkZK 4rwlH66ECwmkJ5akZqemFqQWwfQxcXBKNTBapHseE1HW6n/qJN9oskPiwhbxlea7v0rOd3Az 977N5+HkcCJZq1dsi1n15g+uyqdNZ3qHRKycx/Kl5VCwUtUEsep3wtdjTSKyOGw2lp3nZWG4 HWtnK9x1/bLOJDtW+bIW87OZ3EEb9ZpC8wq6lk9RiAlcF3gkZeWMsi5L8Tn2EUe01xhtVWIp zkg01GIuKk4EAKl/Mn53AgAA X-MTR: 20000000000000000@CPGS X-CMS-MailID: 20161019140735eucas1p267bb4aa03547e70e5f13d78e2ffedcc4 X-Msg-Generator: CA X-Sender-IP: 182.198.249.179 X-Local-Sender: =?UTF-8?B?SWx5YSBNYXhpbWV0cxtTUlItVmlydHVhbGl6YXRpb24gTGFi?= =?UTF-8?B?G+yCvOyEseyghOyekBtFbmdpbmVlcg==?= X-Global-Sender: =?UTF-8?B?SWx5YSBNYXhpbWV0cxtTUlItVmlydHVhbGl6YXRpb24gTGFi?= =?UTF-8?B?G1NhbXN1bmcgRWxlY3Ryb25pY3MbRW5naW5lZXI=?= X-Sender-Code: =?UTF-8?B?QzEwG0NJU0hRG0MxMEdEMDFHRDAxMDE1NA==?= CMS-TYPE: 201P X-HopCount: 7 X-CMS-RootMailID: 20161019140735eucas1p267bb4aa03547e70e5f13d78e2ffedcc4 X-RootMTR: 20161019140735eucas1p267bb4aa03547e70e5f13d78e2ffedcc4 References: <1476886037-4586-1-git-send-email-i.maximets@samsung.com> Subject: [dpdk-dev] [PATCH RFC 2/2] net/ixgbe: allow bulk alloc for the max size desc ring X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 19 Oct 2016 14:07:38 -0000 The only reason why bulk alloc disabled for the rings with more than (IXGBE_MAX_RING_DESC - RTE_PMD_IXGBE_RX_MAX_BURST) descriptors is the possible out-of-bound access to the dma memory. But it's the artificial limit and can be easily avoided by allocating of RTE_PMD_IXGBE_RX_MAX_BURST more descriptors in memory. This will not interfere the HW and, as soon as all rings' memory zeroized, Rx functions will work correctly. This change allows to use vectorized Rx functions with 4096 descriptors in Rx ring which is important to achieve zero packet drop rate in high-load installations. Signed-off-by: Ilya Maximets --- drivers/net/ixgbe/ixgbe_rxtx.c | 17 +---------------- drivers/net/ixgbe/ixgbe_rxtx.h | 2 +- 2 files changed, 2 insertions(+), 17 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c index 2ce8234..07c04c3 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx.c +++ b/drivers/net/ixgbe/ixgbe_rxtx.c @@ -2585,7 +2585,6 @@ check_rx_burst_bulk_alloc_preconditions(struct ixgbe_rx_queue *rxq) * rxq->rx_free_thresh >= RTE_PMD_IXGBE_RX_MAX_BURST * rxq->rx_free_thresh < rxq->nb_rx_desc * (rxq->nb_rx_desc % rxq->rx_free_thresh) == 0 - * rxq->nb_rx_desc<(IXGBE_MAX_RING_DESC-RTE_PMD_IXGBE_RX_MAX_BURST) * Scattered packets are not supported. This should be checked * outside of this function. */ @@ -2607,15 +2606,6 @@ check_rx_burst_bulk_alloc_preconditions(struct ixgbe_rx_queue *rxq) "rxq->rx_free_thresh=%d", rxq->nb_rx_desc, rxq->rx_free_thresh); ret = -EINVAL; - } else if (!(rxq->nb_rx_desc < - (IXGBE_MAX_RING_DESC - RTE_PMD_IXGBE_RX_MAX_BURST))) { - PMD_INIT_LOG(DEBUG, "Rx Burst Bulk Alloc Preconditions: " - "rxq->nb_rx_desc=%d, " - "IXGBE_MAX_RING_DESC=%d, " - "RTE_PMD_IXGBE_RX_MAX_BURST=%d", - rxq->nb_rx_desc, IXGBE_MAX_RING_DESC, - RTE_PMD_IXGBE_RX_MAX_BURST); - ret = -EINVAL; } return ret; @@ -2632,12 +2622,7 @@ ixgbe_reset_rx_queue(struct ixgbe_adapter *adapter, struct ixgbe_rx_queue *rxq) /* * By default, the Rx queue setup function allocates enough memory for * IXGBE_MAX_RING_DESC. The Rx Burst bulk allocation function requires - * extra memory at the end of the descriptor ring to be zero'd out. A - * pre-condition for using the Rx burst bulk alloc function is that the - * number of descriptors is less than or equal to - * (IXGBE_MAX_RING_DESC - RTE_PMD_IXGBE_RX_MAX_BURST). Check all the - * constraints here to see if we need to zero out memory after the end - * of the H/W descriptor ring. + * extra memory at the end of the descriptor ring to be zero'd out. */ if (adapter->rx_bulk_alloc_allowed) /* zero out extra memory */ diff --git a/drivers/net/ixgbe/ixgbe_rxtx.h b/drivers/net/ixgbe/ixgbe_rxtx.h index 2608b36..1abc6f2 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx.h +++ b/drivers/net/ixgbe/ixgbe_rxtx.h @@ -67,7 +67,7 @@ #define RTE_IXGBE_MAX_RX_BURST RTE_IXGBE_RXQ_REARM_THRESH #endif -#define RX_RING_SZ ((IXGBE_MAX_RING_DESC + RTE_IXGBE_DESCS_PER_LOOP - 1) * \ +#define RX_RING_SZ ((IXGBE_MAX_RING_DESC + RTE_PMD_IXGBE_RX_MAX_BURST) * \ sizeof(union ixgbe_adv_rx_desc)) #ifdef RTE_PMD_PACKET_PREFETCH -- 2.7.4