From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id F2BAE37B8 for ; Sun, 4 Dec 2016 07:35:13 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga104.fm.intel.com with ESMTP; 03 Dec 2016 22:35:12 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,740,1477983600"; d="scan'208";a="908483839" Received: from dpdk4.bj.intel.com ([172.16.182.178]) by orsmga003.jf.intel.com with ESMTP; 03 Dec 2016 22:35:09 -0800 From: Wei Dai To: helin.zhang@intel.com, konstantin.ananyev@intel.com Cc: dev@dpdk.org, Wei Dai Date: Sun, 4 Dec 2016 14:31:12 +0800 Message-Id: <1480833100-48545-1-git-send-email-wei.dai@intel.com> X-Mailer: git-send-email 2.7.4 Subject: [dpdk-dev] [PATCH 01/29] net/ixgbe/base: fix check for PHY reset X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 04 Dec 2016 06:35:14 -0000 The previously generic PHY reset check is not sufficient for the PHY type = ixgbe_phy_x550em_ext_t. This patch fixes it. Fixes: af75078fece3 ("first public release") Signed-off-by: Wei Dai --- drivers/net/ixgbe/base/ixgbe_phy.c | 29 ++++++++++++++++++++++++----- 1 file changed, 24 insertions(+), 5 deletions(-) diff --git a/drivers/net/ixgbe/base/ixgbe_phy.c b/drivers/net/ixgbe/base/ixgbe_phy.c index 43c55d7..1d9fb3e 100644 --- a/drivers/net/ixgbe/base/ixgbe_phy.c +++ b/drivers/net/ixgbe/base/ixgbe_phy.c @@ -528,11 +528,30 @@ s32 ixgbe_reset_phy_generic(struct ixgbe_hw *hw) */ for (i = 0; i < 30; i++) { msec_delay(100); - hw->phy.ops.read_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL, - IXGBE_MDIO_PHY_XS_DEV_TYPE, &ctrl); - if (!(ctrl & IXGBE_MDIO_PHY_XS_RESET)) { - usec_delay(2); - break; + if (hw->phy.type == ixgbe_phy_x550em_ext_t) { + status = hw->phy.ops.read_reg(hw, + IXGBE_MDIO_TX_VENDOR_ALARMS_3, + IXGBE_MDIO_PMA_PMD_DEV_TYPE, + &ctrl); + if (status != IXGBE_SUCCESS) + return status; + + if (ctrl & IXGBE_MDIO_TX_VENDOR_ALARMS_3_RST_MASK) { + usec_delay(2); + break; + } + } else { + status = hw->phy.ops.read_reg(hw, + IXGBE_MDIO_PHY_XS_CONTROL, + IXGBE_MDIO_PHY_XS_DEV_TYPE, + &ctrl); + if (status != IXGBE_SUCCESS) + return status; + + if (!(ctrl & IXGBE_MDIO_PHY_XS_RESET)) { + usec_delay(2); + break; + } } } -- 2.7.4