From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id A7E505678 for ; Sun, 4 Dec 2016 07:35:38 +0100 (CET) Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga101.fm.intel.com with ESMTP; 03 Dec 2016 22:35:38 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,740,1477983600"; d="scan'208";a="908483915" Received: from dpdk4.bj.intel.com ([172.16.182.178]) by orsmga003.jf.intel.com with ESMTP; 03 Dec 2016 22:35:36 -0800 From: Wei Dai To: helin.zhang@intel.com, konstantin.ananyev@intel.com Cc: dev@dpdk.org, Wei Dai Date: Sun, 4 Dec 2016 14:31:23 +0800 Message-Id: <1480833100-48545-12-git-send-email-wei.dai@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1480833100-48545-1-git-send-email-wei.dai@intel.com> References: <1480833100-48545-1-git-send-email-wei.dai@intel.com> Subject: [dpdk-dev] [PATCH 12/29] net/ixgbe/base: fix SGMII link setup for M88 PHYs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 04 Dec 2016 06:35:39 -0000 This patch fixes ixgbe_setup_sgmii_m88 to set lane speed to autoneg instead of 1G to prevent problems with link between PHYs Fixes: d4b4c6845487 ("net/ixgbe/base: add X550em_a FW ALEF support") Signed-off-by: Wei Dai --- drivers/net/ixgbe/base/ixgbe_x550.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ixgbe/base/ixgbe_x550.c b/drivers/net/ixgbe/base/ixgbe_x550.c index d5dffdf..5cf9e40 100644 --- a/drivers/net/ixgbe/base/ixgbe_x550.c +++ b/drivers/net/ixgbe/base/ixgbe_x550.c @@ -1778,7 +1778,7 @@ STATIC s32 ixgbe_setup_sgmii_m88(struct ixgbe_hw *hw, ixgbe_link_speed speed, return rc; flx_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_MASK; - flx_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_1G; + flx_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SPEED_AN; flx_val &= ~IXGBE_KRM_PMD_FLX_MASK_ST20_AN_EN; flx_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_SGMII_EN; flx_val |= IXGBE_KRM_PMD_FLX_MASK_ST20_AN37_EN; -- 2.7.4