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From: Jerin Jacob <jerin.jacob@caviumnetworks.com>
To: <dev@dpdk.org>
CC: <konstantin.ananyev@intel.com>, <thomas.monjalon@6wind.com>,
<bruce.richardson@intel.com>, <jianbo.liu@linaro.org>,
<viktorin@rehivetech.com>, <santosh.shukla@caviumnetworks.com>, Jerin Jacob
<jerin.jacob@caviumnetworks.com>, Chao Zhu <chaozhu@linux.vnet.ibm.com>
Date: Tue, 27 Dec 2016 15:19:10 +0530
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Subject: [dpdk-dev] [PATCH v2 04/29] eal/ppc64: define I/O device memory
barriers for ppc64
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The patch does not provide any functional change for ppc_64.
I/O barriers are mapped to existing smp barriers.
CC: Chao Zhu <chaozhu@linux.vnet.ibm.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
---
lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
index fb4fccb..150810c 100644
--- a/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
+++ b/lib/librte_eal/common/include/arch/ppc_64/rte_atomic.h
@@ -87,6 +87,12 @@ extern "C" {
#define rte_smp_rmb() rte_rmb()
+#define rte_io_mb() rte_mb()
+
+#define rte_io_wmb() rte_wmb()
+
+#define rte_io_rmb() rte_rmb()
+
/*------------------------- 16 bit atomic operations -------------------------*/
/* To be compatible with Power7, use GCC built-in functions for 16 bit
* operations */
--
2.5.5