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Wed, 18 Jan 2017 01:23:06 +0000 From: Jerin Jacob <jerin.jacob@caviumnetworks.com> To: <dev@dpdk.org> CC: <konstantin.ananyev@intel.com>, <thomas.monjalon@6wind.com>, <bruce.richardson@intel.com>, <jianbo.liu@linaro.org>, <viktorin@rehivetech.com>, <santosh.shukla@caviumnetworks.com>, John Griffin <john.griffin@intel.com>, Fiona Trahe <fiona.trahe@intel.com>, Deepak Kumar Jain <deepak.k.jain@intel.com>, Jerin Jacob <jerin.jacob@caviumnetworks.com> Date: Wed, 18 Jan 2017 06:51:28 +0530 Message-ID: <1484702502-25451-16-git-send-email-jerin.jacob@caviumnetworks.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1484702502-25451-1-git-send-email-jerin.jacob@caviumnetworks.com> References: <1484637244-7548-1-git-send-email-jerin.jacob@caviumnetworks.com> <1484702502-25451-1-git-send-email-jerin.jacob@caviumnetworks.com> MIME-Version: 1.0 Content-Type: text/plain X-Originating-IP: [111.93.218.67] X-ClientProxiedBy: MA1PR01CA0115.INDPRD01.PROD.OUTLOOK.COM (10.174.56.159) To BY1PR0701MB1721.namprd07.prod.outlook.com (10.162.111.140) X-MS-Office365-Filtering-Correlation-Id: 99f9744f-381f-489f-47ab-08d43f409063 X-Microsoft-Antispam: UriScan:; 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CC: John Griffin <john.griffin@intel.com> CC: Fiona Trahe <fiona.trahe@intel.com> CC: Deepak Kumar Jain <deepak.k.jain@intel.com> Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com> Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> --- drivers/crypto/qat/qat_adf/adf_transport_access_macros.h | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h b/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h index 47f1c91..d218f85 100644 --- a/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h +++ b/drivers/crypto/qat/qat_adf/adf_transport_access_macros.h @@ -47,14 +47,15 @@ #ifndef ADF_TRANSPORT_ACCESS_MACROS_H #define ADF_TRANSPORT_ACCESS_MACROS_H +#include <rte_io.h> + /* CSR write macro */ -#define ADF_CSR_WR(csrAddr, csrOffset, val) \ - (void)((*((volatile uint32_t *)(((uint8_t *)csrAddr) + csrOffset)) \ - = (val))) +#define ADF_CSR_WR(csrAddr, csrOffset, val) \ + rte_write32(val, (((uint8_t *)csrAddr) + csrOffset)) /* CSR read macro */ -#define ADF_CSR_RD(csrAddr, csrOffset) \ - (*((volatile uint32_t *)(((uint8_t *)csrAddr) + csrOffset))) +#define ADF_CSR_RD(csrAddr, csrOffset) \ + rte_read32((((uint8_t *)csrAddr) + csrOffset)) #define ADF_BANK_INT_SRC_SEL_MASK_0 0x4444444CUL #define ADF_BANK_INT_SRC_SEL_MASK_X 0x44444444UL -- 2.5.5