From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id A16ADD592 for ; Sat, 4 Feb 2017 04:38:18 +0100 (CET) Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga102.jf.intel.com with ESMTP; 03 Feb 2017 19:38:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.33,332,1477983600"; d="scan'208";a="816904983" Received: from dpdk2.sh.intel.com ([10.239.128.246]) by FMSMGA003.fm.intel.com with ESMTP; 03 Feb 2017 19:38:16 -0800 From: Jingjing Wu To: dev@dpdk.org Cc: jingjing.wu@intel.com, helin.zhang@intel.com Date: Sat, 4 Feb 2017 11:36:12 +0800 Message-Id: <1486179375-133509-3-git-send-email-jingjing.wu@intel.com> X-Mailer: git-send-email 2.4.11 In-Reply-To: <1486179375-133509-1-git-send-email-jingjing.wu@intel.com> References: <1485258650-86193-1-git-send-email-jingjing.wu@intel.com> <1486179375-133509-1-git-send-email-jingjing.wu@intel.com> Subject: [dpdk-dev] [PATCH v2 2/5] net/i40e: fix bitmask of supported Tx flags X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 04 Feb 2017 03:38:19 -0000 Some Tx offload flags are missed in bitmask of all supported packet Tx flags by i40e. This patch fixes it. CC: helin.zhang@intel.com Fixes: 3f33e643e5c6 ("net/i40e: add Tx preparation") Signed-off-by: Jingjing Wu --- drivers/net/i40e/i40e_rxtx.c | 36 ++++++++++++++++++++++++++++-------- 1 file changed, 28 insertions(+), 8 deletions(-) diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index 608685f..4dd45f3 100644 --- a/drivers/net/i40e/i40e_rxtx.c +++ b/drivers/net/i40e/i40e_rxtx.c @@ -80,15 +80,35 @@ PKT_TX_L4_MASK | \ PKT_TX_TCP_SEG | \ PKT_TX_OUTER_IP_CKSUM) +#ifdef RTE_LIBRTE_IEEE1588 +#define I40E_TX_OFFLOAD_MASK ( \ + PKT_TX_IP_CKSUM | \ + PKT_TX_IPV4 | \ + PKT_TX_IPV6 | \ + PKT_TX_L4_MASK | \ + PKT_TX_OUTER_IP_CKSUM | \ + PKT_TX_OUTER_IPV4 | \ + PKT_TX_OUTER_IPV6 | \ + PKT_TX_IEEE1588_TMST | \ + PKT_TX_TCP_SEG | \ + PKT_TX_QINQ_PKT | \ + PKT_TX_VLAN_PKT | \ + PKT_TX_TUNNEL_MASK) +#else +#define I40E_TX_OFFLOAD_MASK ( \ + PKT_TX_IP_CKSUM | \ + PKT_TX_IPV4 | \ + PKT_TX_IPV6 | \ + PKT_TX_L4_MASK | \ + PKT_TX_OUTER_IP_CKSUM | \ + PKT_TX_OUTER_IPV4 | \ + PKT_TX_OUTER_IPV6 | \ + PKT_TX_TCP_SEG | \ + PKT_TX_QINQ_PKT | \ + PKT_TX_VLAN_PKT | \ + PKT_TX_TUNNEL_MASK) -#define I40E_TX_OFFLOAD_MASK ( \ - PKT_TX_IP_CKSUM | \ - PKT_TX_L4_MASK | \ - PKT_TX_OUTER_IP_CKSUM | \ - PKT_TX_TCP_SEG | \ - PKT_TX_QINQ_PKT | \ - PKT_TX_VLAN_PKT) - +#endif #define I40E_TX_OFFLOAD_NOTSUP_MASK \ (PKT_TX_OFFLOAD_MASK ^ I40E_TX_OFFLOAD_MASK) -- 2.4.11