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From: Chris Metcalf <cmetcalf@mellanox.com>
To: Thomas Monjalon <thomas.monjalon@6wind.com>,
 Vincent JARDIN <vincent.jardin@6wind.com>,
 Bruce Richardson <bruce.richardson@intel.com>,
 Jerin Jacob <jerin.jacob@caviumnetworks.com>,
 Liming Sun <lsun@mellanox.com>, Olga Shern <olgas@mellanox.com>,
 Yael Shenhav <yaeli@mellanox.com>, dev@dpdk.org
Cc: Chris Metcalf <cmetcalf@mellanox.com>
Date: Fri, 17 Feb 2017 20:52:27 -0500
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Subject: [dpdk-dev] [PATCH 2/4] tile: remove requirement for
	<arch/mpipe_{xaui, gbe}_def.h headers
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These headers are not part of the set that are upstreamed as part
of glibc or the kernel, and we only need a few defines from each.
The hardware is frozen so these values are not going to change
in any case.

Signed-off-by: Chris Metcalf <cmetcalf@mellanox.com>
---
 drivers/net/mpipe/mpipe_tilegx.c | 15 ++++++++++++---
 1 file changed, 12 insertions(+), 3 deletions(-)

diff --git a/drivers/net/mpipe/mpipe_tilegx.c b/drivers/net/mpipe/mpipe_tilegx.c
index 7bbd168bcb41..adba3306adbc 100644
--- a/drivers/net/mpipe/mpipe_tilegx.c
+++ b/drivers/net/mpipe/mpipe_tilegx.c
@@ -39,11 +39,20 @@
 #include <rte_malloc.h>
 #include <rte_cycles.h>
 
-#include <arch/mpipe_xaui_def.h>
-#include <arch/mpipe_gbe_def.h>
-
 #include <gxio/mpipe.h>
 
+/* mPIPE GBE hardware register definitions. */
+#define MPIPE_GBE_NETWORK_CONFIGURATION 0x8008
+#define MPIPE_GBE_NETWORK_CONFIGURATION__COPY_ALL_SHIFT 4
+#define MPIPE_GBE_NETWORK_CONFIGURATION__MULTI_HASH_ENA_SHIFT 6
+#define MPIPE_GBE_NETWORK_CONFIGURATION__UNI_HASH_ENA_SHIFT 7
+
+/* mPIPE XAUI hardware register definitions. */
+#define MPIPE_XAUI_RECEIVE_CONFIGURATION 0x8020
+#define MPIPE_XAUI_RECEIVE_CONFIGURATION__COPY_ALL_SHIFT 0
+#define MPIPE_XAUI_RECEIVE_CONFIGURATION__ENA_HASH_MULTI_SHIFT 2
+#define MPIPE_XAUI_RECEIVE_CONFIGURATION__ENA_HASH_UNI_SHIFT 3
+
 #ifdef RTE_LIBRTE_MPIPE_PMD_DEBUG
 #define PMD_DEBUG_RX(...)	RTE_LOG(DEBUG, PMD, __VA_ARGS__)
 #define PMD_DEBUG_TX(...)	RTE_LOG(DEBUG, PMD, __VA_ARGS__)
-- 
2.7.2