From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id 86824CF90 for ; Fri, 24 Mar 2017 17:53:20 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=intel.com; i=@intel.com; q=dns/txt; s=intel; t=1490374400; x=1521910400; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=Q1pYT4XQS7CzR3BivyL9IoODj+MlXlpc3pvTVtMWqrI=; b=OICYdNQRHIY/Z4QYiFFEWwbx8PzNDmQR9CwPVkVSLwNXpzvNcaYD+YlZ jsBzCkFzISbIThkdepzDPOzrLPubYw==; Received: from orsmga004.jf.intel.com ([10.7.209.38]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Mar 2017 09:53:20 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.36,215,1486454400"; d="scan'208";a="70349092" Received: from silpixa00398672.ir.intel.com ([10.237.223.128]) by orsmga004.jf.intel.com with ESMTP; 24 Mar 2017 09:53:19 -0700 From: Harry van Haaren To: dev@dpdk.org Cc: jerin.jacob@caviumnetworks.com, Bruce Richardson Date: Fri, 24 Mar 2017 16:53:00 +0000 Message-Id: <1490374395-149320-6-git-send-email-harry.van.haaren@intel.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1490374395-149320-1-git-send-email-harry.van.haaren@intel.com> References: <489175012-101439-1-git-send-email-harry.van.haaren@intel.com> <1490374395-149320-1-git-send-email-harry.van.haaren@intel.com> Subject: [dpdk-dev] [PATCH v5 05/20] event/sw: add fns to return default port/queue config X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 24 Mar 2017 16:53:20 -0000 From: Bruce Richardson Signed-off-by: Bruce Richardson --- drivers/event/sw/sw_evdev.c | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/event/sw/sw_evdev.c b/drivers/event/sw/sw_evdev.c index 28a2326..d1fa3a7 100644 --- a/drivers/event/sw/sw_evdev.c +++ b/drivers/event/sw/sw_evdev.c @@ -44,6 +44,35 @@ #define SCHED_QUANTA_ARG "sched_quanta" #define CREDIT_QUANTA_ARG "credit_quanta" +static void +sw_queue_def_conf(struct rte_eventdev *dev, uint8_t queue_id, + struct rte_event_queue_conf *conf) +{ + RTE_SET_USED(dev); + RTE_SET_USED(queue_id); + + static const struct rte_event_queue_conf default_conf = { + .nb_atomic_flows = 4096, + .nb_atomic_order_sequences = 1, + .event_queue_cfg = RTE_EVENT_QUEUE_CFG_ATOMIC_ONLY, + .priority = RTE_EVENT_DEV_PRIORITY_NORMAL, + }; + + *conf = default_conf; +} + +static void +sw_port_def_conf(struct rte_eventdev *dev, uint8_t port_id, + struct rte_event_port_conf *port_conf) +{ + RTE_SET_USED(dev); + RTE_SET_USED(port_id); + + port_conf->new_event_threshold = 1024; + port_conf->dequeue_depth = 16; + port_conf->enqueue_depth = 16; +} + static int sw_dev_configure(const struct rte_eventdev *dev) { @@ -116,6 +145,9 @@ sw_probe(const char *name, const char *params) static const struct rte_eventdev_ops evdev_sw_ops = { .dev_configure = sw_dev_configure, .dev_infos_get = sw_info_get, + + .queue_def_conf = sw_queue_def_conf, + .port_def_conf = sw_port_def_conf, }; static const char *const args[] = { -- 2.7.4