From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by inbox.dpdk.org (Postfix) with ESMTP id 320BB45500; Wed, 26 Jun 2024 13:57:11 +0200 (CEST) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 9258D43334; Wed, 26 Jun 2024 13:55:17 +0200 (CEST) Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by mails.dpdk.org (Postfix) with ESMTP id 8864D42E95 for ; Wed, 26 Jun 2024 13:43:36 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1719402216; x=1750938216; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=N47L2o0wlxkA/OnMP/RqNnRZc96y7dfwphc8J3goROc=; b=Ixr9AZ4A4ren8pHdl+o9pAI/Vm2yFCdpGPcsB+/mSAiRHuyMsh0SFKvV qLkneNGuVN6mHRAtAe93TZqflhjN8OjdmJvpOQERf9AKuQZFMEaJGTG9E p+2mGBLrLzwgNP6MXbC0NgRrAmRGE2vJdvX35WL6dhB8uCEKqKMwrWbPH lLlb0ej+qkBM8yjoIQ63jM8n40v7GUll2eFCbLTXvgW/cdkiI+sWRdc/C PH2maYrUw/uKbMmv5y3860qGap47S5mPLyh9sB4w11hnSSo+HuaYY3aVf 0BS1LphLZBuHxWSnw4wQCPXqMcXSVdi4lu25lYNZIsxPCZKtzpwoPeSAJ w==; X-CSE-ConnectionGUID: pDGZ1YaHSFWw0F2KDOgaHw== X-CSE-MsgGUID: w7SfUbdHTtqO05OoIUpi0Q== X-IronPort-AV: E=McAfee;i="6700,10204,11114"; a="38979334" X-IronPort-AV: E=Sophos;i="6.08,266,1712646000"; d="scan'208";a="38979334" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jun 2024 04:43:35 -0700 X-CSE-ConnectionGUID: R2Eg7OP8TYSXlpx6WillEw== X-CSE-MsgGUID: DBB8/rH8SZCASHDcJYXSxA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.08,266,1712646000"; d="scan'208";a="43873556" Received: from unknown (HELO silpixa00401119.ir.intel.com) ([10.55.129.167]) by orviesa010.jf.intel.com with ESMTP; 26 Jun 2024 04:43:34 -0700 From: Anatoly Burakov To: dev@dpdk.org Cc: Eric Joyner , ian.stokes@intel.com, bruce.richardson@intel.com Subject: [PATCH v4 021/103] net/ice/base: fix GCS descriptor field offsets Date: Wed, 26 Jun 2024 12:41:09 +0100 Message-ID: <14c620e2377f0f103895b9f53d5136ec0c0fad39.1719401847.git.anatoly.burakov@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: References: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org From: Eric Joyner Update the offsets, and remove the ICE_TX_GCS_DESC_ENA define since a non-0 value used for the ICE_TX_GCS_DESC_TYPE field will enable GCS offload; there is no dedicated bit to enable it anymore. Signed-off-by: Eric Joyner Signed-off-by: Ian Stokes --- drivers/net/ice/base/ice_lan_tx_rx.h | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h index d816df0ff6..39673e36f7 100644 --- a/drivers/net/ice/base/ice_lan_tx_rx.h +++ b/drivers/net/ice/base/ice_lan_tx_rx.h @@ -1074,10 +1074,9 @@ struct ice_tx_ctx_desc { __le64 qw1; }; -#define ICE_TX_GSC_DESC_START 0 /* 7 BITS */ -#define ICE_TX_GSC_DESC_OFFSET 7 /* 4 BITS */ -#define ICE_TX_GSC_DESC_TYPE 11 /* 2 BITS */ -#define ICE_TX_GSC_DESC_ENA 13 /* 1 BIT */ +#define ICE_TX_GCS_DESC_START 0 /* 8 BITS */ +#define ICE_TX_GCS_DESC_OFFSET 8 /* 4 BITS */ +#define ICE_TX_GCS_DESC_TYPE 12 /* 3 BITS */ #define ICE_TXD_CTX_QW1_DTYPE_S 0 #define ICE_TXD_CTX_QW1_DTYPE_M (0xFUL << ICE_TXD_CTX_QW1_DTYPE_S) -- 2.43.0