* [dpdk-dev] [PATCH v2 01/30] bus/fslmc: qbman replace word copy with memcpy
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
@ 2017-09-08 8:44 ` Hemant Agrawal
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 02/30] bus/fslmc: remove the export for qbman version function Hemant Agrawal
` (29 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:44 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Haiying Wang <Haiying.Wang@nxp.com>
The word_copy is not as efficient as expected, so remove it from
this driver.
Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/include/compat.h | 42 --------------------------------
drivers/bus/fslmc/qbman/qbman_portal.c | 12 ++++-----
drivers/bus/fslmc/qbman/qbman_sys.h | 9 -------
3 files changed, 5 insertions(+), 58 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/include/compat.h b/drivers/bus/fslmc/qbman/include/compat.h
index 529f1ea..7b69fd1 100644
--- a/drivers/bus/fslmc/qbman/include/compat.h
+++ b/drivers/bus/fslmc/qbman/include/compat.h
@@ -229,48 +229,6 @@ typedef uint32_t phandle;
#define __raw_readl(p) (*(const volatile unsigned int *)(p))
#define __raw_writel(v, p) {*(volatile unsigned int *)(p) = (v); }
-/* memcpy() stuff - when you know alignments in advance */
-#ifdef CONFIG_TRY_BETTER_MEMCPY
-static inline void copy_words(void *dest, const void *src, size_t sz)
-{
- u32 *__dest = dest;
- const u32 *__src = src;
- size_t __sz = sz >> 2;
-
- QBMAN_BUG_ON((unsigned long)dest & 0x3);
- QBMAN_BUG_ON((unsigned long)src & 0x3);
- QBMAN_BUG_ON(sz & 0x3);
- while (__sz--)
- *(__dest++) = *(__src++);
-}
-
-static inline void copy_shorts(void *dest, const void *src, size_t sz)
-{
- u16 *__dest = dest;
- const u16 *__src = src;
- size_t __sz = sz >> 1;
-
- QBMAN_BUG_ON((unsigned long)dest & 0x1);
- QBMAN_BUG_ON((unsigned long)src & 0x1);
- QBMAN_BUG_ON(sz & 0x1);
- while (__sz--)
- *(__dest++) = *(__src++);
-}
-
-static inline void copy_bytes(void *dest, const void *src, size_t sz)
-{
- u8 *__dest = dest;
- const u8 *__src = src;
-
- while (sz--)
- *(__dest++) = *(__src++);
-}
-#else
-#define copy_words memcpy
-#define copy_shorts memcpy
-#define copy_bytes memcpy
-#endif
-
/* Completion stuff */
#define DECLARE_COMPLETION(n) int n = 0
#define complete(n) { *n = 1; }
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c
index dd62e9a..f360760 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -480,8 +480,8 @@ static int qbman_swp_enqueue_array_mode(struct qbman_swp *s,
return -EBUSY;
p = qbman_cena_write_start_wo_shadow(&s->sys,
QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
- word_copy(&p[1], &cl[1], 7);
- word_copy(&p[8], fd, sizeof(*fd) >> 2);
+ memcpy(&p[1], &cl[1], 28);
+ memcpy(&p[8], fd, sizeof(*fd));
/* Set the verb byte, have to substitute in the valid-bit */
lwsync();
p[0] = cl[0] | EQAR_VB(eqar);
@@ -512,8 +512,8 @@ static int qbman_swp_enqueue_ring_mode(struct qbman_swp *s,
p = qbman_cena_write_start_wo_shadow(&s->sys,
QBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));
- word_copy(&p[1], &cl[1], 7);
- word_copy(&p[8], fd, sizeof(*fd) >> 2);
+ memcpy(&p[1], &cl[1], 28);
+ memcpy(&p[8], fd, sizeof(*fd));
lwsync();
/* Set the verb byte, have to substitute in the valid-bit */
p[0] = cl[0] | s->eqcr.pi_vb;
@@ -549,9 +549,7 @@ int qbman_swp_fill_ring(struct qbman_swp *s,
}
p = qbman_cena_write_start_wo_shadow(&s->sys,
QBMAN_CENA_SWP_EQCR((s->eqcr.pi/* +burst_index */) & 7));
- /* word_copy(&p[1], &cl[1], 7); */
memcpy(&p[1], &cl[1], 7 * 4);
- /* word_copy(&p[8], fd, sizeof(*fd) >> 2); */
memcpy(&p[8], fd, sizeof(struct qbman_fd));
/* lwsync(); */
@@ -799,7 +797,7 @@ int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
*/
qb_attr_code_encode(&code_pull_token, cl, s->desc.idx + 1);
p = qbman_cena_write_start_wo_shadow(&s->sys, QBMAN_CENA_SWP_VDQCR);
- word_copy(&p[1], &cl[1], 3);
+ memcpy(&p[1], &cl[1], 12);
/* Set the verb byte, have to substitute in the valid-bit */
lwsync();
p[0] = cl[0] | s->vdq.valid_bit;
diff --git a/drivers/bus/fslmc/qbman/qbman_sys.h b/drivers/bus/fslmc/qbman/qbman_sys.h
index 5dbcaa5..9ea55de 100644
--- a/drivers/bus/fslmc/qbman/qbman_sys.h
+++ b/drivers/bus/fslmc/qbman/qbman_sys.h
@@ -47,15 +47,6 @@
#undef QBMAN_CINH_TRACE
#undef QBMAN_CENA_TRACE
-static inline void word_copy(void *d, const void *s, unsigned int cnt)
-{
- uint32_t *dd = d;
- const uint32_t *ss = s;
-
- while (cnt--)
- *(dd++) = *(ss++);
-}
-
/* Currently, the CENA support code expects each 32-bit word to be written in
* host order, and these are converted to hardware (little-endian) order on
* command submission. However, 64-bit quantities are must be written (and read)
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 02/30] bus/fslmc: remove the export for qbman version function
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 01/30] bus/fslmc: qbman replace word copy with memcpy Hemant Agrawal
@ 2017-09-08 8:44 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 03/30] bus/fslmc: add qbman API to do enqueue with multiple frames Hemant Agrawal
` (28 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:44 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
This func is not required to be used outside of the qbman driver.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/include/fsl_qbman_base.h | 4 ----
drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 2 --
drivers/bus/fslmc/qbman/qbman_portal.c | 7 -------
drivers/bus/fslmc/qbman/qbman_portal.h | 1 +
drivers/bus/fslmc/qbman/qbman_private.h | 4 ++++
5 files changed, 5 insertions(+), 13 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h
index ee4b772..1415960 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h
@@ -38,10 +38,6 @@ typedef uint64_t dma_addr_t;
*
*/
-#define QMAN_REV_4000 0x04000000
-#define QMAN_REV_4100 0x04010000
-#define QMAN_REV_4101 0x04010001
-
/**
* struct qbman_block_desc - qbman block descriptor structure
* @ccsr_reg_bar: CCSR register map.
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
index 9e9047e..23c3d13 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
@@ -1132,6 +1132,4 @@ int qbman_swp_send_multiple(struct qbman_swp *s,
int qbman_check_command_complete(struct qbman_swp *s,
const struct qbman_result *dq);
-
-int qbman_get_version(void);
#endif /* !_FSL_QBMAN_PORTAL_H */
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c
index f360760..97df703 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -105,8 +105,6 @@ struct qb_attr_code code_sdqcr_dqsrc = QB_CODE(0, 0, 16);
#define MAX_QBMAN_PORTALS 35
static struct qbman_swp *portal_idx_map[MAX_QBMAN_PORTALS];
-uint32_t qman_version;
-
/*********************************/
/* Portal constructor/destructor */
/*********************************/
@@ -1579,8 +1577,3 @@ int qbman_swp_send_multiple(struct qbman_swp *s,
return sent;
}
-
-int qbman_get_version(void)
-{
- return qman_version;
-}
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.h b/drivers/bus/fslmc/qbman/qbman_portal.h
index 7aa1d4f..8018048 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/qbman_portal.h
@@ -29,6 +29,7 @@
#include "qbman_private.h"
#include <fsl_qbman_portal.h>
+uint32_t qman_version;
/* All QBMan command and result structures use this "valid bit" encoding */
#define QB_VALID_BIT ((uint32_t)0x80)
diff --git a/drivers/bus/fslmc/qbman/qbman_private.h b/drivers/bus/fslmc/qbman/qbman_private.h
index 292ec6a..b98c330 100644
--- a/drivers/bus/fslmc/qbman/qbman_private.h
+++ b/drivers/bus/fslmc/qbman/qbman_private.h
@@ -171,4 +171,8 @@ static inline void hexdump(const void *ptr, size_t sz)
__hexdump(start, end, p, sz, c);
}
+#define QMAN_REV_4000 0x04000000
+#define QMAN_REV_4100 0x04010000
+#define QMAN_REV_4101 0x04010001
+
#include "qbman_sys.h"
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 03/30] bus/fslmc: add qbman API to do enqueue with multiple frames
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 01/30] bus/fslmc: qbman replace word copy with memcpy Hemant Agrawal
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 02/30] bus/fslmc: remove the export for qbman version function Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 04/30] bus/fslmc: support up to 32 frames in one volatile dequeue Hemant Agrawal
` (27 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Haiying Wang <Haiying.Wang@nxp.com>
Clean it up and update the prototype.
Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
Signed-off-by: Hemant Agrawal <Hemant.Agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 32 ++--
drivers/bus/fslmc/qbman/qbman_portal.c | 200 +++++++--------------
drivers/bus/fslmc/rte_bus_fslmc_version.map | 3 +-
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 2 +-
drivers/event/dpaa2/dpaa2_eventdev.c | 2 +-
drivers/net/dpaa2/dpaa2_rxtx.c | 2 +-
6 files changed, 83 insertions(+), 158 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
index 23c3d13..fe1cc94 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
@@ -914,19 +914,33 @@ void qbman_eq_desc_set_dca(struct qbman_eq_desc *d, int enable,
int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
const struct qbman_fd *fd);
/**
- * qbman_swp_enqueue_multiple_eqdesc() - Enqueue multiple frames with separte
- * enqueue descriptors.
+ * qbman_swp_enqueue_multiple() - Enqueue multiple frames with same
+ eq descriptor
* @s: the software portal used for enqueue.
- * @d: the enqueue descriptors
+ * @d: the enqueue descriptor.
* @fd: the frame descriptor to be enqueued.
* @num_frames: the number of the frames to be enqueued.
*
* Return the number of enqueued frames, -EBUSY if the EQCR is not ready.
*/
-int qbman_swp_enqueue_multiple_eqdesc(struct qbman_swp *s,
+int qbman_swp_enqueue_multiple(struct qbman_swp *s,
const struct qbman_eq_desc *d,
const struct qbman_fd *fd,
int num_frames);
+/**
+ * qbman_swp_enqueue_multiple_desc() - Enqueue multiple frames with
+ * individual eq descriptor.
+ * @s: the software portal used for enqueue.
+ * @d: the enqueue descriptor.
+ * @fd: the frame descriptor to be enqueued.
+ * @num_frames: the number of the frames to be enqueued.
+ *
+ * Return the number of enqueued frames, -EBUSY if the EQCR is not ready.
+ */
+int qbman_swp_enqueue_multiple_desc(struct qbman_swp *s,
+ const struct qbman_eq_desc *d,
+ const struct qbman_fd *fd,
+ int num_frames);
/* TODO:
* qbman_swp_enqueue_thresh() - Set threshold for EQRI interrupt.
@@ -1119,16 +1133,6 @@ int qbman_swp_CDAN_disable(struct qbman_swp *s, uint16_t channelid);
*/
int qbman_swp_CDAN_set_context_enable(struct qbman_swp *s, uint16_t channelid,
uint64_t ctx);
-int qbman_swp_fill_ring(struct qbman_swp *s,
- const struct qbman_eq_desc *d,
- const struct qbman_fd *fd,
- uint8_t burst_index);
-int qbman_swp_flush_ring(struct qbman_swp *s);
-void qbman_sync(void);
-int qbman_swp_send_multiple(struct qbman_swp *s,
- const struct qbman_eq_desc *d,
- const struct qbman_fd *fd,
- int frames_to_send);
int qbman_check_command_complete(struct qbman_swp *s,
const struct qbman_result *dq);
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c
index 97df703..f212829 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -525,15 +525,26 @@ static int qbman_swp_enqueue_ring_mode(struct qbman_swp *s,
return 0;
}
-int qbman_swp_fill_ring(struct qbman_swp *s,
- const struct qbman_eq_desc *d,
- const struct qbman_fd *fd,
- __attribute__((unused)) uint8_t burst_index)
+int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
+ const struct qbman_fd *fd)
+{
+ if (s->sys.eqcr_mode == qman_eqcr_vb_array)
+ return qbman_swp_enqueue_array_mode(s, d, fd);
+ else /* Use ring mode by default */
+ return qbman_swp_enqueue_ring_mode(s, d, fd);
+}
+
+int qbman_swp_enqueue_multiple(struct qbman_swp *s,
+ const struct qbman_eq_desc *d,
+ const struct qbman_fd *fd,
+ int num_frames)
{
uint32_t *p;
const uint32_t *cl = qb_cl(d);
- uint32_t eqcr_ci;
+ uint32_t eqcr_ci, eqcr_pi;
uint8_t diff;
+ int i, num_enqueued = 0;
+ uint64_t addr_cena;
if (!s->eqcr.available) {
eqcr_ci = s->eqcr.ci;
@@ -543,62 +554,58 @@ int qbman_swp_fill_ring(struct qbman_swp *s,
eqcr_ci, s->eqcr.ci);
s->eqcr.available += diff;
if (!diff)
- return -EBUSY;
+ return 0;
}
- p = qbman_cena_write_start_wo_shadow(&s->sys,
- QBMAN_CENA_SWP_EQCR((s->eqcr.pi/* +burst_index */) & 7));
- memcpy(&p[1], &cl[1], 7 * 4);
- memcpy(&p[8], fd, sizeof(struct qbman_fd));
-
- /* lwsync(); */
- p[0] = cl[0] | s->eqcr.pi_vb;
-
- s->eqcr.pi++;
- s->eqcr.pi &= 0xF;
- s->eqcr.available--;
- if (!(s->eqcr.pi & 7))
- s->eqcr.pi_vb ^= QB_VALID_BIT;
-
- return 0;
-}
-int qbman_swp_flush_ring(struct qbman_swp *s)
-{
- void *ptr = s->sys.addr_cena;
+ eqcr_pi = s->eqcr.pi;
+ num_enqueued = (s->eqcr.available < num_frames) ?
+ s->eqcr.available : num_frames;
+ s->eqcr.available -= num_enqueued;
+ /* Fill in the EQCR ring */
+ for (i = 0; i < num_enqueued; i++) {
+ p = qbman_cena_write_start_wo_shadow(&s->sys,
+ QBMAN_CENA_SWP_EQCR(eqcr_pi & 7));
+ memcpy(&p[1], &cl[1], 28);
+ memcpy(&p[8], &fd[i], sizeof(*fd));
+ eqcr_pi++;
+ eqcr_pi &= 0xF;
+ }
- dcbf((uint64_t)ptr);
- dcbf((uint64_t)ptr + 0x40);
- dcbf((uint64_t)ptr + 0x80);
- dcbf((uint64_t)ptr + 0xc0);
- dcbf((uint64_t)ptr + 0x100);
- dcbf((uint64_t)ptr + 0x140);
- dcbf((uint64_t)ptr + 0x180);
- dcbf((uint64_t)ptr + 0x1c0);
+ lwsync();
- return 0;
-}
+ /* Set the verb byte, have to substitute in the valid-bit */
+ eqcr_pi = s->eqcr.pi;
+ for (i = 0; i < num_enqueued; i++) {
+ p = qbman_cena_write_start_wo_shadow(&s->sys,
+ QBMAN_CENA_SWP_EQCR(eqcr_pi & 7));
+ p[0] = cl[0] | s->eqcr.pi_vb;
+ eqcr_pi++;
+ eqcr_pi &= 0xF;
+ if (!(eqcr_pi & 7))
+ s->eqcr.pi_vb ^= QB_VALID_BIT;
+ }
-void qbman_sync(void)
-{
- lwsync();
-}
+ /* Flush all the cacheline without load/store in between */
+ eqcr_pi = s->eqcr.pi;
+ addr_cena = (uint64_t)s->sys.addr_cena;
+ for (i = 0; i < num_enqueued; i++) {
+ dcbf((uint64_t *)(addr_cena +
+ QBMAN_CENA_SWP_EQCR(eqcr_pi & 7)));
+ eqcr_pi++;
+ eqcr_pi &= 0xF;
+ }
+ s->eqcr.pi = eqcr_pi;
-int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
- const struct qbman_fd *fd)
-{
- if (s->sys.eqcr_mode == qman_eqcr_vb_array)
- return qbman_swp_enqueue_array_mode(s, d, fd);
- else /* Use ring mode by default */
- return qbman_swp_enqueue_ring_mode(s, d, fd);
+ return num_enqueued;
}
-int qbman_swp_enqueue_multiple_eqdesc(struct qbman_swp *s,
- const struct qbman_eq_desc *d,
- const struct qbman_fd *fd,
- int num_frames)
+int qbman_swp_enqueue_multiple_desc(struct qbman_swp *s,
+ const struct qbman_eq_desc *d,
+ const struct qbman_fd *fd,
+ int num_frames)
{
uint32_t *p;
- const uint32_t *cl = qb_cl(d);
+ const uint32_t *cl;
uint32_t eqcr_ci, eqcr_pi;
uint8_t diff;
int i, num_enqueued = 0;
@@ -623,29 +630,26 @@ int qbman_swp_enqueue_multiple_eqdesc(struct qbman_swp *s,
for (i = 0; i < num_enqueued; i++) {
p = qbman_cena_write_start_wo_shadow(&s->sys,
QBMAN_CENA_SWP_EQCR(eqcr_pi & 7));
+ cl = qb_cl(&d[i]);
memcpy(&p[1], &cl[1], 28);
memcpy(&p[8], &fd[i], sizeof(*fd));
eqcr_pi++;
eqcr_pi &= 0xF;
- /*Pointing to the next enqueue descriptor*/
- cl += (sizeof(struct qbman_eq_desc) / sizeof(uint32_t));
}
lwsync();
/* Set the verb byte, have to substitute in the valid-bit */
eqcr_pi = s->eqcr.pi;
- cl = qb_cl(d);
for (i = 0; i < num_enqueued; i++) {
p = qbman_cena_write_start_wo_shadow(&s->sys,
QBMAN_CENA_SWP_EQCR(eqcr_pi & 7));
+ cl = qb_cl(&d[i]);
p[0] = cl[0] | s->eqcr.pi_vb;
eqcr_pi++;
eqcr_pi &= 0xF;
if (!(eqcr_pi & 7))
s->eqcr.pi_vb ^= QB_VALID_BIT;
- /*Pointing to the next enqueue descriptor*/
- cl += (sizeof(struct qbman_eq_desc) / sizeof(uint32_t));
}
/* Flush all the cacheline without load/store in between */
@@ -1493,87 +1497,3 @@ struct qbman_result *qbman_get_dqrr_from_idx(struct qbman_swp *s, uint8_t idx)
dq = qbman_cena_read(&s->sys, QBMAN_CENA_SWP_DQRR(idx));
return dq;
}
-
-int qbman_swp_send_multiple(struct qbman_swp *s,
- const struct qbman_eq_desc *d,
- const struct qbman_fd *fd,
- int frames_to_send)
-{
- uint32_t *p;
- const uint32_t *cl = qb_cl(d);
- uint32_t eqcr_ci;
- uint8_t diff;
- int sent = 0;
- int i;
- int initial_pi = s->eqcr.pi;
- uint64_t start_pointer;
-
- if (!s->eqcr.available) {
- eqcr_ci = s->eqcr.ci;
- s->eqcr.ci = qbman_cena_read_reg(&s->sys,
- QBMAN_CENA_SWP_EQCR_CI) & 0xF;
- diff = qm_cyc_diff(QBMAN_EQCR_SIZE,
- eqcr_ci, s->eqcr.ci);
- if (!diff)
- goto done;
- s->eqcr.available += diff;
- }
-
- /* we are trying to send frames_to_send,
- * if we have enough space in the ring
- */
- while (s->eqcr.available && frames_to_send--) {
- p = qbman_cena_write_start_wo_shadow_fast(&s->sys,
- QBMAN_CENA_SWP_EQCR((initial_pi) & 7));
- /* Write command (except of first byte) and FD */
- memcpy(&p[1], &cl[1], 7 * 4);
- memcpy(&p[8], &fd[sent], sizeof(struct qbman_fd));
-
- initial_pi++;
- initial_pi &= 0xF;
- s->eqcr.available--;
- sent++;
- }
-
-done:
- initial_pi = s->eqcr.pi;
- lwsync();
-
- /* in order for flushes to complete faster:
- * we use a following trick: we record all lines in 32 bit word
- */
-
- initial_pi = s->eqcr.pi;
- for (i = 0; i < sent; i++) {
- p = qbman_cena_write_start_wo_shadow_fast(&s->sys,
- QBMAN_CENA_SWP_EQCR((initial_pi) & 7));
-
- p[0] = cl[0] | s->eqcr.pi_vb;
- initial_pi++;
- initial_pi &= 0xF;
-
- if (!(initial_pi & 7))
- s->eqcr.pi_vb ^= QB_VALID_BIT;
- }
-
- initial_pi = s->eqcr.pi;
-
- /* We need to flush all the lines but without
- * load/store operations between them.
- * We assign start_pointer before we start loop so that
- * in loop we do not read it from memory
- */
- start_pointer = (uint64_t)s->sys.addr_cena;
- for (i = 0; i < sent; i++) {
- p = (uint32_t *)(start_pointer
- + QBMAN_CENA_SWP_EQCR(initial_pi & 7));
- dcbf((uint64_t)p);
- initial_pi++;
- initial_pi &= 0xF;
- }
-
- /* Update producer index for the next call */
- s->eqcr.pi = initial_pi;
-
- return sent;
-}
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index 6ac256d..13fb46a 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -69,7 +69,8 @@ DPDK_17.08 {
qbman_result_SCN_state_in_mem;
qbman_swp_dqrr_consume;
qbman_swp_dqrr_next;
- qbman_swp_enqueue_multiple_eqdesc;
+ qbman_swp_enqueue_multiple;
+ qbman_swp_enqueue_multiple_desc;
qbman_swp_interrupt_clear_status;
qbman_swp_push_set;
rte_dpaa2_alloc_dpci_dev;
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 95c3951..094cf30 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -634,7 +634,7 @@ dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
}
loop = 0;
while (loop < frames_to_send) {
- loop += qbman_swp_send_multiple(swp, &eqdesc,
+ loop += qbman_swp_enqueue_multiple(swp, &eqdesc,
&fd_arr[loop],
frames_to_send - loop);
}
diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c b/drivers/event/dpaa2/dpaa2_eventdev.c
index cf2d274..81286a8 100644
--- a/drivers/event/dpaa2/dpaa2_eventdev.c
+++ b/drivers/event/dpaa2/dpaa2_eventdev.c
@@ -144,7 +144,7 @@ dpaa2_eventdev_enqueue_burst(void *port, const struct rte_event ev[],
}
loop = 0;
while (loop < frames_to_send) {
- loop += qbman_swp_enqueue_multiple_eqdesc(swp,
+ loop += qbman_swp_enqueue_multiple_desc(swp,
&eqdesc[loop], &fd_arr[loop],
frames_to_send - loop);
}
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 3c057a3..4342c73 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -622,7 +622,7 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
}
loop = 0;
while (loop < frames_to_send) {
- loop += qbman_swp_send_multiple(swp, &eqdesc,
+ loop += qbman_swp_enqueue_multiple(swp, &eqdesc,
&fd_arr[loop], frames_to_send - loop);
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 04/30] bus/fslmc: support up to 32 frames in one volatile dequeue
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (2 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 03/30] bus/fslmc: add qbman API to do enqueue with multiple frames Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 05/30] bus/fslmc: enhance the QBMAN CENA mode Hemant Agrawal
` (26 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Haiying Wang <Haiying.Wang@nxp.com>
QMan5.0 supports up to 32 frames in one volatile dequeue
command. For the older Qman versions which only support
up to 16 frames, the highest bit in NUMF will be ignored.
Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/qbman_portal.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c
index f212829..7fc78cd 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -704,7 +704,7 @@ static struct qb_attr_code code_pull_dct = QB_CODE(0, 0, 2);
static struct qb_attr_code code_pull_dt = QB_CODE(0, 2, 2);
static struct qb_attr_code code_pull_rls = QB_CODE(0, 4, 1);
static struct qb_attr_code code_pull_stash = QB_CODE(0, 5, 1);
-static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 4);
+static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 5);
static struct qb_attr_code code_pull_token = QB_CODE(0, 16, 8);
static struct qb_attr_code code_pull_dqsource = QB_CODE(1, 0, 24);
static struct qb_attr_code code_pull_rsp_lo = QB_CODE(2, 0, 32);
@@ -743,7 +743,6 @@ void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, uint8_t numframes)
{
uint32_t *cl = qb_cl(d);
- QBMAN_BUG_ON(!numframes || (numframes > 16));
qb_attr_code_encode(&code_pull_numframes, cl,
(uint32_t)(numframes - 1));
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 05/30] bus/fslmc: enhance the QBMAN CENA mode
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (3 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 04/30] bus/fslmc: support up to 32 frames in one volatile dequeue Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-15 12:26 ` Ferruh Yigit
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 06/30] bus/fslmc: qbman remove unused funcs and align names Hemant Agrawal
` (25 subsequent siblings)
30 siblings, 1 reply; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Haiying Wang <Haiying.Wang@nxp.com>
Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/qbman_sys.h | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/qbman_sys.h b/drivers/bus/fslmc/qbman/qbman_sys.h
index 9ea55de..47da595 100644
--- a/drivers/bus/fslmc/qbman/qbman_sys.h
+++ b/drivers/bus/fslmc/qbman/qbman_sys.h
@@ -217,7 +217,6 @@ static inline void qbman_cena_write_complete_wo_shadow(struct qbman_swp_sys *s,
#ifdef QBMAN_CENA_TRACE
pr_info("qbman_cena_write_complete(%p:%d:0x%03x)\n",
s->addr_cena, s->idx, offset);
- hexdump(cmd, 64);
#endif
dcbf(s->addr_cena + offset);
}
@@ -251,11 +250,7 @@ static inline void *qbman_cena_read_wo_shadow(struct qbman_swp_sys *s,
{
#ifdef QBMAN_CENA_TRACE
pr_info("qbman_cena_read(%p:%d:0x%03x) %p\n",
- s->addr_cena, s->idx, offset, shadow);
-#endif
-
-#ifdef QBMAN_CENA_TRACE
- hexdump(shadow, 64);
+ s->addr_cena, s->idx, offset);
#endif
return s->addr_cena + offset;
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [dpdk-dev] [PATCH v2 05/30] bus/fslmc: enhance the QBMAN CENA mode
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 05/30] bus/fslmc: enhance the QBMAN CENA mode Hemant Agrawal
@ 2017-09-15 12:26 ` Ferruh Yigit
2017-09-15 12:32 ` Hemant Agrawal
0 siblings, 1 reply; 97+ messages in thread
From: Ferruh Yigit @ 2017-09-15 12:26 UTC (permalink / raw)
To: Hemant Agrawal, dev; +Cc: shreyansh.jain
On 9/8/2017 9:45 AM, Hemant Agrawal wrote:
> From: Haiying Wang <Haiying.Wang@nxp.com>
>
> Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> ---
> drivers/bus/fslmc/qbman/qbman_sys.h | 7 +------
> 1 file changed, 1 insertion(+), 6 deletions(-)
>
> diff --git a/drivers/bus/fslmc/qbman/qbman_sys.h b/drivers/bus/fslmc/qbman/qbman_sys.h
> index 9ea55de..47da595 100644
> --- a/drivers/bus/fslmc/qbman/qbman_sys.h
> +++ b/drivers/bus/fslmc/qbman/qbman_sys.h
> @@ -217,7 +217,6 @@ static inline void qbman_cena_write_complete_wo_shadow(struct qbman_swp_sys *s,
> #ifdef QBMAN_CENA_TRACE
> pr_info("qbman_cena_write_complete(%p:%d:0x%03x)\n",
> s->addr_cena, s->idx, offset);
> - hexdump(cmd, 64);
> #endif
> dcbf(s->addr_cena + offset);
> }
> @@ -251,11 +250,7 @@ static inline void *qbman_cena_read_wo_shadow(struct qbman_swp_sys *s,
> {
> #ifdef QBMAN_CENA_TRACE
> pr_info("qbman_cena_read(%p:%d:0x%03x) %p\n",
> - s->addr_cena, s->idx, offset, shadow);
> -#endif
> -
> -#ifdef QBMAN_CENA_TRACE
> - hexdump(shadow, 64);
> + s->addr_cena, s->idx, offset);
Isn't this missing one parameter, previous "shadow" one?
> #endif
> return s->addr_cena + offset;
> }
>
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [dpdk-dev] [PATCH v2 05/30] bus/fslmc: enhance the QBMAN CENA mode
2017-09-15 12:26 ` Ferruh Yigit
@ 2017-09-15 12:32 ` Hemant Agrawal
0 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-15 12:32 UTC (permalink / raw)
To: Ferruh Yigit, dev; +Cc: shreyansh.jain
On 9/15/2017 5:56 PM, Ferruh Yigit wrote:
> On 9/8/2017 9:45 AM, Hemant Agrawal wrote:
>> From: Haiying Wang <Haiying.Wang@nxp.com>
>>
>> Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
>> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
>> ---
>> drivers/bus/fslmc/qbman/qbman_sys.h | 7 +------
>> 1 file changed, 1 insertion(+), 6 deletions(-)
>>
>> diff --git a/drivers/bus/fslmc/qbman/qbman_sys.h b/drivers/bus/fslmc/qbman/qbman_sys.h
>> index 9ea55de..47da595 100644
>> --- a/drivers/bus/fslmc/qbman/qbman_sys.h
>> +++ b/drivers/bus/fslmc/qbman/qbman_sys.h
>> @@ -217,7 +217,6 @@ static inline void qbman_cena_write_complete_wo_shadow(struct qbman_swp_sys *s,
>> #ifdef QBMAN_CENA_TRACE
>> pr_info("qbman_cena_write_complete(%p:%d:0x%03x)\n",
>> s->addr_cena, s->idx, offset);
>> - hexdump(cmd, 64);
>> #endif
>> dcbf(s->addr_cena + offset);
>> }
>> @@ -251,11 +250,7 @@ static inline void *qbman_cena_read_wo_shadow(struct qbman_swp_sys *s,
>> {
>> #ifdef QBMAN_CENA_TRACE
>> pr_info("qbman_cena_read(%p:%d:0x%03x) %p\n",
>> - s->addr_cena, s->idx, offset, shadow);
>> -#endif
>> -
>> -#ifdef QBMAN_CENA_TRACE
>> - hexdump(shadow, 64);
>> + s->addr_cena, s->idx, offset);
>
> Isn't this missing one parameter, previous "shadow" one?
>
shadow is not existing any more. We should remove the last %p from pr_info.
>> #endif
>> return s->addr_cena + offset;
>> }
>>
>
>
^ permalink raw reply [flat|nested] 97+ messages in thread
* [dpdk-dev] [PATCH v2 06/30] bus/fslmc: qbman remove unused funcs and align names
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (4 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 05/30] bus/fslmc: enhance the QBMAN CENA mode Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 07/30] bus/fslmc: cleanup compat file Hemant Agrawal
` (24 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
name alignment for check command and result functions
putting them as separate functions instead of changing the original
functions.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 146 ++--
drivers/bus/fslmc/qbman/qbman_portal.c | 731 ++++++++++-----------
drivers/bus/fslmc/qbman/qbman_portal.h | 6 +-
drivers/bus/fslmc/qbman/qbman_private.h | 2 +-
drivers/bus/fslmc/qbman/qbman_sys.h | 12 -
drivers/bus/fslmc/rte_bus_fslmc_version.map | 3 +-
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 4 +-
drivers/net/dpaa2/dpaa2_rxtx.c | 10 +-
8 files changed, 449 insertions(+), 465 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
index fe1cc94..24a6d4b 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
@@ -194,11 +194,38 @@ void qbman_swp_interrupt_set_inhibit(struct qbman_swp *p, int inhibit);
/**
* struct qbman_result - structure for qbman dequeue response and/or
* notification.
- * @dont_manipulate_directly: the 16 32bit data to represent the whole
+ * @donot_manipulate_directly: the 16 32bit data to represent the whole
* possible qbman dequeue result.
*/
struct qbman_result {
- uint32_t dont_manipulate_directly[16];
+ union {
+ struct common {
+ uint8_t verb;
+ uint8_t reserved[63];
+ } common;
+ struct dq {
+ uint8_t verb;
+ uint8_t stat;
+ __le16 seqnum;
+ __le16 oprid;
+ uint8_t reserved;
+ uint8_t tok;
+ __le32 fqid;
+ uint32_t reserved2;
+ __le32 fq_byte_cnt;
+ __le32 fq_frm_cnt;
+ __le64 fqd_ctx;
+ uint8_t fd[32];
+ } dq;
+ struct scn {
+ uint8_t verb;
+ uint8_t stat;
+ uint8_t state;
+ uint8_t reserved;
+ __le32 rid_tok;
+ __le64 ctx;
+ } scn;
+ };
};
/* TODO:
@@ -254,11 +281,21 @@ void qbman_swp_push_set(struct qbman_swp *s, uint8_t channel_idx, int enable);
/**
* struct qbman_pull_desc - the structure for pull dequeue descriptor
- * @dont_manipulate_directly: the 6 32bit data to represent the whole
- * possible settings for pull dequeue descriptor.
*/
struct qbman_pull_desc {
- uint32_t dont_manipulate_directly[6];
+ union {
+ uint32_t donot_manipulate_directly[16];
+ struct pull {
+ uint8_t verb;
+ uint8_t numf;
+ uint8_t tok;
+ uint8_t reserved;
+ uint32_t dq_src;
+ uint64_t rsp_addr;
+ uint64_t rsp_addr_virt;
+ uint8_t padding[40];
+ } pull;
+ };
};
enum qbman_pull_type_e {
@@ -415,7 +452,20 @@ struct qbman_result *qbman_get_dqrr_from_idx(struct qbman_swp *s, uint8_t idx);
* dequeue result.
*/
int qbman_result_has_new_result(struct qbman_swp *s,
- const struct qbman_result *dq);
+ struct qbman_result *dq);
+
+/**
+ * qbman_check_command_complete() - Check if the previous issued dq commnd
+ * is completed and results are available in memory.
+ * @s: the software portal object.
+ * @dq: the dequeue result read from the memory.
+ *
+ * Return 1 for getting a valid dequeue result, or 0 for not getting a valid
+ * dequeue result.
+ */
+int qbman_check_command_complete(struct qbman_result *dq);
+
+int qbman_check_new_result(struct qbman_result *dq);
/* -------------------------------------------------------- */
/* Parsing dequeue entries (DQRR and user-provided storage) */
@@ -537,7 +587,7 @@ int qbman_result_is_FQPN(const struct qbman_result *dq);
*
* Return the state field.
*/
-uint32_t qbman_result_DQ_flags(const struct qbman_result *dq);
+uint8_t qbman_result_DQ_flags(const struct qbman_result *dq);
/**
* qbman_result_DQ_is_pull() - Check whether the dq response is from a pull
@@ -648,24 +698,6 @@ uint32_t qbman_result_SCN_rid(const struct qbman_result *scn);
*/
uint64_t qbman_result_SCN_ctx(const struct qbman_result *scn);
-/**
- * qbman_result_SCN_state_in_mem() - Get the state in notification written
- * in memory
- * @scn: the state change notification.
- *
- * Return the state.
- */
-uint8_t qbman_result_SCN_state_in_mem(const struct qbman_result *scn);
-
-/**
- * qbman_result_SCN_rid_in_mem() - Get the resource id in notification written
- * in memory.
- * @scn: the state change notification.
- *
- * Return the resource id.
- */
-uint32_t qbman_result_SCN_rid_in_mem(const struct qbman_result *scn);
-
/* Type-specific "resource IDs". Mainly for illustration purposes, though it
* also gives the appropriate type widths.
*/
@@ -746,22 +778,36 @@ uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn);
/* Enqueues */
/************/
-/**
- * struct qbman_eq_desc - structure of enqueue descriptor
- * @dont_manipulate_directly: the 8 32bit data to represent the whole
- * possible qbman enqueue setting in enqueue descriptor.
- */
+/* struct qbman_eq_desc - structure of enqueue descriptor */
struct qbman_eq_desc {
- uint32_t dont_manipulate_directly[8];
+ union {
+ uint32_t donot_manipulate_directly[8];
+ struct eq {
+ uint8_t verb;
+ uint8_t dca;
+ uint16_t seqnum;
+ uint16_t orpid;
+ uint16_t reserved1;
+ uint32_t tgtid;
+ uint32_t tag;
+ uint16_t qdbin;
+ uint8_t qpri;
+ uint8_t reserved[3];
+ uint8_t wae;
+ uint8_t rspid;
+ uint64_t rsp_addr;
+ uint8_t fd[32];
+ } eq;
+ };
};
/**
* struct qbman_eq_response - structure of enqueue response
- * @dont_manipulate_directly: the 16 32bit data to represent the whole
+ * @donot_manipulate_directly: the 16 32bit data to represent the whole
* enqueue response.
*/
struct qbman_eq_response {
- uint32_t dont_manipulate_directly[16];
+ uint32_t donot_manipulate_directly[16];
};
/**
@@ -801,7 +847,7 @@ void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success);
* sequeue number.
*/
void qbman_eq_desc_set_orp(struct qbman_eq_desc *d, int respond_success,
- uint32_t opr_id, uint32_t seqnum, int incomplete);
+ uint16_t opr_id, uint16_t seqnum, int incomplete);
/**
* qbman_eq_desc_set_orp_hole() - fill a hole in the order-restoration sequence
@@ -810,8 +856,8 @@ void qbman_eq_desc_set_orp(struct qbman_eq_desc *d, int respond_success,
* @opr_id: the order point record id.
* @seqnum: the order restoration sequence number.
*/
-void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint32_t opr_id,
- uint32_t seqnum);
+void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint16_t opr_id,
+ uint16_t seqnum);
/**
* qbman_eq_desc_set_orp_nesn() - advance NESN (Next Expected Sequence Number)
@@ -820,8 +866,8 @@ void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint32_t opr_id,
* @opr_id: the order point record id.
* @seqnum: the order restoration sequence number.
*/
-void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint32_t opr_id,
- uint32_t seqnum);
+void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint16_t opr_id,
+ uint16_t seqnum);
/**
* qbman_eq_desc_set_response() - Set the enqueue response info.
* @d: the enqueue descriptor
@@ -873,7 +919,7 @@ void qbman_eq_desc_set_fq(struct qbman_eq_desc *d, uint32_t fqid);
* @qd_prio: the queuing destination priority.
*/
void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,
- uint32_t qd_bin, uint32_t qd_prio);
+ uint16_t qd_bin, uint8_t qd_prio);
/**
* qbman_eq_desc_set_eqdi() - enable/disable EQDI interrupt
@@ -898,7 +944,7 @@ void qbman_eq_desc_set_eqdi(struct qbman_eq_desc *d, int enable);
* being rescheduled.)
*/
void qbman_eq_desc_set_dca(struct qbman_eq_desc *d, int enable,
- uint32_t dqrr_idx, int park);
+ uint8_t dqrr_idx, int park);
/**
* qbman_swp_enqueue() - Issue an enqueue command.
@@ -957,11 +1003,20 @@ int qbman_swp_enqueue_thresh(struct qbman_swp *s, unsigned int thresh);
/*******************/
/**
* struct qbman_release_desc - The structure for buffer release descriptor
- * @dont_manipulate_directly: the 32bit data to represent the whole
+ * @donot_manipulate_directly: the 32bit data to represent the whole
* possible settings of qbman release descriptor.
*/
struct qbman_release_desc {
- uint32_t dont_manipulate_directly[1];
+ union {
+ uint32_t donot_manipulate_directly[16];
+ struct br {
+ uint8_t verb;
+ uint8_t reserved;
+ uint16_t bpid;
+ uint32_t reserved2;
+ uint64_t buf[7];
+ } br;
+ };
};
/**
@@ -975,7 +1030,7 @@ void qbman_release_desc_clear(struct qbman_release_desc *d);
* qbman_release_desc_set_bpid() - Set the ID of the buffer pool to release to
* @d: the qbman release descriptor.
*/
-void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid);
+void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint16_t bpid);
/**
* qbman_release_desc_set_rcdi() - Determines whether or not the portal's RCDI
@@ -1018,7 +1073,7 @@ int qbman_swp_release_thresh(struct qbman_swp *s, unsigned int thresh);
* Return 0 for success, or negative error code if the acquire command
* fails.
*/
-int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,
+int qbman_swp_acquire(struct qbman_swp *s, uint16_t bpid, uint64_t *buffers,
unsigned int num_buffers);
/*****************/
@@ -1133,7 +1188,4 @@ int qbman_swp_CDAN_disable(struct qbman_swp *s, uint16_t channelid);
*/
int qbman_swp_CDAN_set_context_enable(struct qbman_swp *s, uint16_t channelid,
uint64_t ctx);
-
-int qbman_check_command_complete(struct qbman_swp *s,
- const struct qbman_result *dq);
#endif /* !_FSL_QBMAN_PORTAL_H */
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c
index 7fc78cd..072dfe8 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -69,21 +69,23 @@
/* Pre-defined attribute codes */
/*******************************/
-struct qb_attr_code code_generic_verb = QB_CODE(0, 0, 7);
-struct qb_attr_code code_generic_rslt = QB_CODE(0, 8, 8);
+#define QMAN_RESPONSE_VERB_MASK 0x7f
/*************************/
/* SDQCR attribute codes */
/*************************/
+#define QB_SDQCR_FC_SHIFT 29
+#define QB_SDQCR_FC_MASK 0x1
+#define QB_SDQCR_DCT_SHIFT 24
+#define QB_SDQCR_DCT_MASK 0x3
+#define QB_SDQCR_TOK_SHIFT 16
+#define QB_SDQCR_TOK_MASK 0xff
+#define QB_SDQCR_SRC_SHIFT 0
+#define QB_SDQCR_SRC_MASK 0xffff
+
+/* opaque token for static dequeues */
+#define QMAN_SDQCR_TOKEN 0xbb
-/* we put these here because at least some of them are required by
- * qbman_swp_init()
- */
-struct qb_attr_code code_sdqcr_dct = QB_CODE(0, 24, 2);
-struct qb_attr_code code_sdqcr_fc = QB_CODE(0, 29, 1);
-struct qb_attr_code code_sdqcr_tok = QB_CODE(0, 16, 8);
-static struct qb_attr_code code_eq_dca_idx;
-#define CODE_SDQCR_DQSRC(n) QB_CODE(0, n, 1)
enum qbman_sdqcr_dct {
qbman_sdqcr_dct_null = 0,
qbman_sdqcr_dct_prio_ics,
@@ -96,13 +98,11 @@ enum qbman_sdqcr_fc {
qbman_sdqcr_fc_up_to_3 = 1
};
-struct qb_attr_code code_sdqcr_dqsrc = QB_CODE(0, 0, 16);
-
/* We need to keep track of which SWP triggered a pull command
* so keep an array of portal IDs and use the token field to
* be able to find the proper portal
*/
-#define MAX_QBMAN_PORTALS 35
+#define MAX_QBMAN_PORTALS 64
static struct qbman_swp *portal_idx_map[MAX_QBMAN_PORTALS];
/*********************************/
@@ -136,9 +136,10 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
#endif
p->mc.valid_bit = QB_VALID_BIT;
p->sdq = 0;
- qb_attr_code_encode(&code_sdqcr_dct, &p->sdq, qbman_sdqcr_dct_prio_ics);
- qb_attr_code_encode(&code_sdqcr_fc, &p->sdq, qbman_sdqcr_fc_up_to_3);
- qb_attr_code_encode(&code_sdqcr_tok, &p->sdq, 0xbb);
+ p->sdq |= qbman_sdqcr_dct_prio_ics << QB_SDQCR_DCT_SHIFT;
+ p->sdq |= qbman_sdqcr_fc_up_to_3 << QB_SDQCR_FC_SHIFT;
+ p->sdq |= QMAN_SDQCR_TOKEN << QB_SDQCR_TOK_SHIFT;
+
atomic_set(&p->vdq.busy, 1);
p->vdq.valid_bit = QB_VALID_BIT;
p->dqrr.next_idx = 0;
@@ -147,13 +148,9 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
if ((qman_version & 0xFFFF0000) < QMAN_REV_4100) {
p->dqrr.dqrr_size = 4;
p->dqrr.reset_bug = 1;
- /* Set size of DQRR to 4, encoded in 2 bits */
- code_eq_dca_idx = (struct qb_attr_code)QB_CODE(0, 8, 2);
} else {
p->dqrr.dqrr_size = 8;
p->dqrr.reset_bug = 0;
- /* Set size of DQRR to 8, encoded in 3 bits */
- code_eq_dca_idx = (struct qb_attr_code)QB_CODE(0, 8, 3);
}
ret = qbman_swp_sys_init(&p->sys, d, p->dqrr.dqrr_size);
@@ -165,7 +162,7 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
/* SDQCR needs to be initialized to 0 when no channels are
* being dequeued from or else the QMan HW will indicate an
* error. The values that were calculated above will be
- * applied when dequeues from a specific channel are enabled
+ * applied when dequeues from a specific channel are enabled.
*/
qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_SDQCR, 0);
eqcr_pi = qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_EQCR_PI);
@@ -280,9 +277,9 @@ void *qbman_swp_mc_start(struct qbman_swp *p)
return ret;
}
-void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb)
+void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint8_t cmd_verb)
{
- uint32_t *v = cmd;
+ uint8_t *v = cmd;
#ifdef QBMAN_CHECKING
QBMAN_BUG_ON(!(p->mc.check != swp_mc_can_submit));
#endif
@@ -323,35 +320,22 @@ void *qbman_swp_mc_result(struct qbman_swp *p)
/* Enqueue */
/***********/
-/* These should be const, eventually */
-static struct qb_attr_code code_eq_cmd = QB_CODE(0, 0, 2);
-static struct qb_attr_code code_eq_eqdi = QB_CODE(0, 3, 1);
-static struct qb_attr_code code_eq_dca_en = QB_CODE(0, 15, 1);
-static struct qb_attr_code code_eq_dca_pk = QB_CODE(0, 14, 1);
-/* Can't set code_eq_dca_idx width. Need qman version. Read at runtime */
-static struct qb_attr_code code_eq_orp_en = QB_CODE(0, 2, 1);
-static struct qb_attr_code code_eq_orp_is_nesn = QB_CODE(0, 31, 1);
-static struct qb_attr_code code_eq_orp_nlis = QB_CODE(0, 30, 1);
-static struct qb_attr_code code_eq_orp_seqnum = QB_CODE(0, 16, 14);
-static struct qb_attr_code code_eq_opr_id = QB_CODE(1, 0, 16);
-static struct qb_attr_code code_eq_tgt_id = QB_CODE(2, 0, 24);
-/* static struct qb_attr_code code_eq_tag = QB_CODE(3, 0, 32); */
-static struct qb_attr_code code_eq_qd_en = QB_CODE(0, 4, 1);
-static struct qb_attr_code code_eq_qd_bin = QB_CODE(4, 0, 16);
-static struct qb_attr_code code_eq_qd_pri = QB_CODE(4, 16, 4);
-static struct qb_attr_code code_eq_rsp_stash = QB_CODE(5, 16, 1);
-static struct qb_attr_code code_eq_rsp_id = QB_CODE(5, 24, 8);
-static struct qb_attr_code code_eq_rsp_lo = QB_CODE(6, 0, 32);
-
-enum qbman_eq_cmd_e {
- /* No enqueue, primarily for plugging ORP gaps for dropped frames */
- qbman_eq_cmd_empty,
- /* DMA an enqueue response once complete */
- qbman_eq_cmd_respond,
- /* DMA an enqueue response only if the enqueue fails */
- qbman_eq_cmd_respond_reject
+#define QB_ENQUEUE_CMD_OPTIONS_SHIFT 0
+enum qb_enqueue_commands {
+ enqueue_empty = 0,
+ enqueue_response_always = 1,
+ enqueue_rejects_to_fq = 2
};
+#define QB_ENQUEUE_CMD_EC_OPTION_MASK 0x3
+#define QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT 2
+#define QB_ENQUEUE_CMD_IRQ_ON_DISPATCH_SHIFT 3
+#define QB_ENQUEUE_CMD_TARGET_TYPE_SHIFT 4
+#define QB_ENQUEUE_CMD_DCA_PK_SHIFT 6
+#define QB_ENQUEUE_CMD_DCA_EN_SHIFT 7
+#define QB_ENQUEUE_CMD_NLIS_SHIFT 14
+#define QB_ENQUEUE_CMD_IS_NESN_SHIFT 15
+
void qbman_eq_desc_clear(struct qbman_eq_desc *d)
{
memset(d, 0, sizeof(*d));
@@ -359,115 +343,110 @@ void qbman_eq_desc_clear(struct qbman_eq_desc *d)
void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_orp_en, cl, 0);
- qb_attr_code_encode(&code_eq_cmd, cl,
- respond_success ? qbman_eq_cmd_respond :
- qbman_eq_cmd_respond_reject);
+ d->eq.verb &= ~(1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT);
+ if (respond_success)
+ d->eq.verb |= enqueue_response_always;
+ else
+ d->eq.verb |= enqueue_rejects_to_fq;
}
void qbman_eq_desc_set_orp(struct qbman_eq_desc *d, int respond_success,
- uint32_t opr_id, uint32_t seqnum, int incomplete)
+ uint16_t opr_id, uint16_t seqnum, int incomplete)
{
- uint32_t *cl = qb_cl(d);
+ d->eq.verb |= 1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT;
+ if (respond_success)
+ d->eq.verb |= enqueue_response_always;
+ else
+ d->eq.verb |= enqueue_rejects_to_fq;
- qb_attr_code_encode(&code_eq_orp_en, cl, 1);
- qb_attr_code_encode(&code_eq_cmd, cl,
- respond_success ? qbman_eq_cmd_respond :
- qbman_eq_cmd_respond_reject);
- qb_attr_code_encode(&code_eq_opr_id, cl, opr_id);
- qb_attr_code_encode(&code_eq_orp_seqnum, cl, seqnum);
- qb_attr_code_encode(&code_eq_orp_nlis, cl, !!incomplete);
+ d->eq.orpid = opr_id;
+ d->eq.seqnum = seqnum;
+ if (incomplete)
+ d->eq.seqnum |= 1 << QB_ENQUEUE_CMD_NLIS_SHIFT;
+ else
+ d->eq.seqnum &= ~(1 << QB_ENQUEUE_CMD_NLIS_SHIFT);
}
-void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint32_t opr_id,
- uint32_t seqnum)
+void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint16_t opr_id,
+ uint16_t seqnum)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_orp_en, cl, 1);
- qb_attr_code_encode(&code_eq_cmd, cl, qbman_eq_cmd_empty);
- qb_attr_code_encode(&code_eq_opr_id, cl, opr_id);
- qb_attr_code_encode(&code_eq_orp_seqnum, cl, seqnum);
- qb_attr_code_encode(&code_eq_orp_nlis, cl, 0);
- qb_attr_code_encode(&code_eq_orp_is_nesn, cl, 0);
+ d->eq.verb |= 1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT;
+ d->eq.verb &= ~QB_ENQUEUE_CMD_EC_OPTION_MASK;
+ d->eq.orpid = opr_id;
+ d->eq.seqnum = seqnum;
+ d->eq.seqnum &= ~(1 << QB_ENQUEUE_CMD_NLIS_SHIFT);
+ d->eq.seqnum &= ~(1 << QB_ENQUEUE_CMD_IS_NESN_SHIFT);
}
-void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint32_t opr_id,
- uint32_t seqnum)
+void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint16_t opr_id,
+ uint16_t seqnum)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_orp_en, cl, 1);
- qb_attr_code_encode(&code_eq_cmd, cl, qbman_eq_cmd_empty);
- qb_attr_code_encode(&code_eq_opr_id, cl, opr_id);
- qb_attr_code_encode(&code_eq_orp_seqnum, cl, seqnum);
- qb_attr_code_encode(&code_eq_orp_nlis, cl, 0);
- qb_attr_code_encode(&code_eq_orp_is_nesn, cl, 1);
+ d->eq.verb |= 1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT;
+ d->eq.verb &= ~QB_ENQUEUE_CMD_EC_OPTION_MASK;
+ d->eq.orpid = opr_id;
+ d->eq.seqnum = seqnum;
+ d->eq.seqnum &= ~(1 << QB_ENQUEUE_CMD_NLIS_SHIFT);
+ d->eq.seqnum |= 1 << QB_ENQUEUE_CMD_IS_NESN_SHIFT;
}
void qbman_eq_desc_set_response(struct qbman_eq_desc *d,
dma_addr_t storage_phys,
int stash)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode_64(&code_eq_rsp_lo, (uint64_t *)cl, storage_phys);
- qb_attr_code_encode(&code_eq_rsp_stash, cl, !!stash);
+ d->eq.rsp_addr = storage_phys;
+ d->eq.wae = stash;
}
void qbman_eq_desc_set_token(struct qbman_eq_desc *d, uint8_t token)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_rsp_id, cl, (uint32_t)token);
+ d->eq.rspid = token;
}
void qbman_eq_desc_set_fq(struct qbman_eq_desc *d, uint32_t fqid)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_qd_en, cl, 0);
- qb_attr_code_encode(&code_eq_tgt_id, cl, fqid);
+ d->eq.verb &= ~(1 << QB_ENQUEUE_CMD_TARGET_TYPE_SHIFT);
+ d->eq.tgtid = fqid;
}
void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,
- uint32_t qd_bin, uint32_t qd_prio)
+ uint16_t qd_bin, uint8_t qd_prio)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_qd_en, cl, 1);
- qb_attr_code_encode(&code_eq_tgt_id, cl, qdid);
- qb_attr_code_encode(&code_eq_qd_bin, cl, qd_bin);
- qb_attr_code_encode(&code_eq_qd_pri, cl, qd_prio);
+ d->eq.verb |= 1 << QB_ENQUEUE_CMD_TARGET_TYPE_SHIFT;
+ d->eq.tgtid = qdid;
+ d->eq.qdbin = qd_bin;
+ d->eq.qpri = qd_prio;
}
void qbman_eq_desc_set_eqdi(struct qbman_eq_desc *d, int enable)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_eqdi, cl, !!enable);
+ if (enable)
+ d->eq.verb |= 1 << QB_ENQUEUE_CMD_IRQ_ON_DISPATCH_SHIFT;
+ else
+ d->eq.verb &= ~(1 << QB_ENQUEUE_CMD_IRQ_ON_DISPATCH_SHIFT);
}
void qbman_eq_desc_set_dca(struct qbman_eq_desc *d, int enable,
- uint32_t dqrr_idx, int park)
+ uint8_t dqrr_idx, int park)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_dca_en, cl, !!enable);
if (enable) {
- qb_attr_code_encode(&code_eq_dca_pk, cl, !!park);
- qb_attr_code_encode(&code_eq_dca_idx, cl, dqrr_idx);
+ d->eq.dca = dqrr_idx;
+ if (park)
+ d->eq.dca |= 1 << QB_ENQUEUE_CMD_DCA_PK_SHIFT;
+ else
+ d->eq.dca &= ~(1 << QB_ENQUEUE_CMD_DCA_PK_SHIFT);
+ d->eq.dca |= 1 << QB_ENQUEUE_CMD_DCA_EN_SHIFT;
+ } else {
+ d->eq.dca &= ~(1 << QB_ENQUEUE_CMD_DCA_EN_SHIFT);
}
}
#define EQAR_IDX(eqar) ((eqar) & 0x7)
#define EQAR_VB(eqar) ((eqar) & 0x80)
#define EQAR_SUCCESS(eqar) ((eqar) & 0x100)
+
static int qbman_swp_enqueue_array_mode(struct qbman_swp *s,
const struct qbman_eq_desc *d,
- const struct qbman_fd *fd)
+ const struct qbman_fd *fd)
{
uint32_t *p;
const uint32_t *cl = qb_cl(d);
@@ -477,20 +456,20 @@ static int qbman_swp_enqueue_array_mode(struct qbman_swp *s,
if (!EQAR_SUCCESS(eqar))
return -EBUSY;
p = qbman_cena_write_start_wo_shadow(&s->sys,
- QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
+ QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
memcpy(&p[1], &cl[1], 28);
memcpy(&p[8], fd, sizeof(*fd));
/* Set the verb byte, have to substitute in the valid-bit */
lwsync();
p[0] = cl[0] | EQAR_VB(eqar);
qbman_cena_write_complete_wo_shadow(&s->sys,
- QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
+ QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
return 0;
}
static int qbman_swp_enqueue_ring_mode(struct qbman_swp *s,
const struct qbman_eq_desc *d,
- const struct qbman_fd *fd)
+ const struct qbman_fd *fd)
{
uint32_t *p;
const uint32_t *cl = qb_cl(d);
@@ -509,19 +488,21 @@ static int qbman_swp_enqueue_ring_mode(struct qbman_swp *s,
}
p = qbman_cena_write_start_wo_shadow(&s->sys,
- QBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));
+ QBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));
memcpy(&p[1], &cl[1], 28);
memcpy(&p[8], fd, sizeof(*fd));
lwsync();
+
/* Set the verb byte, have to substitute in the valid-bit */
p[0] = cl[0] | s->eqcr.pi_vb;
qbman_cena_write_complete_wo_shadow(&s->sys,
- QBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));
+ QBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));
s->eqcr.pi++;
s->eqcr.pi &= 0xF;
s->eqcr.available--;
if (!(s->eqcr.pi & 7))
s->eqcr.pi_vb ^= QB_VALID_BIT;
+
return 0;
}
@@ -672,23 +653,26 @@ int qbman_swp_enqueue_multiple_desc(struct qbman_swp *s,
void qbman_swp_push_get(struct qbman_swp *s, uint8_t channel_idx, int *enabled)
{
- struct qb_attr_code code = CODE_SDQCR_DQSRC(channel_idx);
+ uint16_t src = (s->sdq >> QB_SDQCR_SRC_SHIFT) & QB_SDQCR_SRC_MASK;
QBMAN_BUG_ON(channel_idx > 15);
- *enabled = (int)qb_attr_code_decode(&code, &s->sdq);
+ *enabled = src | (1 << channel_idx);
}
void qbman_swp_push_set(struct qbman_swp *s, uint8_t channel_idx, int enable)
{
uint16_t dqsrc;
- struct qb_attr_code code = CODE_SDQCR_DQSRC(channel_idx);
QBMAN_BUG_ON(channel_idx > 15);
- qb_attr_code_encode(&code, &s->sdq, !!enable);
+ if (enable)
+ s->sdq |= 1 << channel_idx;
+ else
+ s->sdq &= ~(1 << channel_idx);
+
/* Read make the complete src map. If no channels are enabled
* the SDQCR must be 0 or else QMan will assert errors
*/
- dqsrc = (uint16_t)qb_attr_code_decode(&code_sdqcr_dqsrc, &s->sdq);
+ dqsrc = (s->sdq >> QB_SDQCR_SRC_SHIFT) & QB_SDQCR_SRC_MASK;
if (dqsrc != 0)
qbman_cinh_write(&s->sys, QBMAN_CINH_SWP_SDQCR, s->sdq);
else
@@ -700,14 +684,10 @@ void qbman_swp_push_set(struct qbman_swp *s, uint8_t channel_idx, int enable)
/***************************/
/* These should be const, eventually */
-static struct qb_attr_code code_pull_dct = QB_CODE(0, 0, 2);
-static struct qb_attr_code code_pull_dt = QB_CODE(0, 2, 2);
-static struct qb_attr_code code_pull_rls = QB_CODE(0, 4, 1);
-static struct qb_attr_code code_pull_stash = QB_CODE(0, 5, 1);
-static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 5);
-static struct qb_attr_code code_pull_token = QB_CODE(0, 16, 8);
-static struct qb_attr_code code_pull_dqsource = QB_CODE(1, 0, 24);
-static struct qb_attr_code code_pull_rsp_lo = QB_CODE(2, 0, 32);
+#define QB_VDQCR_VERB_DCT_SHIFT 0
+#define QB_VDQCR_VERB_DT_SHIFT 2
+#define QB_VDQCR_VERB_RLS_SHIFT 4
+#define QB_VDQCR_VERB_WAE_SHIFT 5
enum qb_pull_dt_e {
qb_pull_dt_channel,
@@ -725,62 +705,52 @@ void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
dma_addr_t storage_phys,
int stash)
{
- uint32_t *cl = qb_cl(d);
- /* Squiggle the pointer 'storage' into the extra 2 words of the
- * descriptor (which aren't copied to the hw command)
- */
- *(void **)&cl[4] = storage;
+ d->pull.rsp_addr_virt = (uint64_t)storage;
+
if (!storage) {
- qb_attr_code_encode(&code_pull_rls, cl, 0);
+ d->pull.verb &= ~(1 << QB_VDQCR_VERB_RLS_SHIFT);
return;
}
- qb_attr_code_encode(&code_pull_rls, cl, 1);
- qb_attr_code_encode(&code_pull_stash, cl, !!stash);
- qb_attr_code_encode_64(&code_pull_rsp_lo, (uint64_t *)cl, storage_phys);
+ d->pull.verb |= 1 << QB_VDQCR_VERB_RLS_SHIFT;
+ if (stash)
+ d->pull.verb |= 1 << QB_VDQCR_VERB_WAE_SHIFT;
+ else
+ d->pull.verb &= ~(1 << QB_VDQCR_VERB_WAE_SHIFT);
+
+ d->pull.rsp_addr = storage_phys;
}
void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, uint8_t numframes)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_pull_numframes, cl,
- (uint32_t)(numframes - 1));
+ d->pull.numf = numframes - 1;
}
void qbman_pull_desc_set_token(struct qbman_pull_desc *d, uint8_t token)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_pull_token, cl, token);
+ d->pull.tok = token;
}
void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, uint32_t fqid)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_pull_dct, cl, 1);
- qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_framequeue);
- qb_attr_code_encode(&code_pull_dqsource, cl, fqid);
+ d->pull.verb |= 1 << QB_VDQCR_VERB_DCT_SHIFT;
+ d->pull.verb |= qb_pull_dt_framequeue << QB_VDQCR_VERB_DT_SHIFT;
+ d->pull.dq_src = fqid;
}
void qbman_pull_desc_set_wq(struct qbman_pull_desc *d, uint32_t wqid,
enum qbman_pull_type_e dct)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_pull_dct, cl, dct);
- qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_workqueue);
- qb_attr_code_encode(&code_pull_dqsource, cl, wqid);
+ d->pull.verb |= dct << QB_VDQCR_VERB_DCT_SHIFT;
+ d->pull.verb |= qb_pull_dt_workqueue << QB_VDQCR_VERB_DT_SHIFT;
+ d->pull.dq_src = wqid;
}
void qbman_pull_desc_set_channel(struct qbman_pull_desc *d, uint32_t chid,
enum qbman_pull_type_e dct)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_pull_dct, cl, dct);
- qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_channel);
- qb_attr_code_encode(&code_pull_dqsource, cl, chid);
+ d->pull.verb |= dct << QB_VDQCR_VERB_DCT_SHIFT;
+ d->pull.verb |= qb_pull_dt_channel << QB_VDQCR_VERB_DT_SHIFT;
+ d->pull.dq_src = chid;
}
int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
@@ -792,18 +762,18 @@ int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
atomic_inc(&s->vdq.busy);
return -EBUSY;
}
- s->vdq.storage = *(void **)&cl[4];
- /* We use portal index +1 as token so that 0 still indicates
- * that the result isn't valid yet.
- */
- qb_attr_code_encode(&code_pull_token, cl, s->desc.idx + 1);
+
+ d->pull.tok = s->sys.idx + 1;
+ s->vdq.storage = (void *)d->pull.rsp_addr_virt;
p = qbman_cena_write_start_wo_shadow(&s->sys, QBMAN_CENA_SWP_VDQCR);
memcpy(&p[1], &cl[1], 12);
+
/* Set the verb byte, have to substitute in the valid-bit */
lwsync();
p[0] = cl[0] | s->vdq.valid_bit;
s->vdq.valid_bit ^= QB_VALID_BIT;
qbman_cena_write_complete_wo_shadow(&s->sys, QBMAN_CENA_SWP_VDQCR);
+
return 0;
}
@@ -811,16 +781,7 @@ int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
/* Polling DQRR */
/****************/
-static struct qb_attr_code code_dqrr_verb = QB_CODE(0, 0, 8);
-static struct qb_attr_code code_dqrr_response = QB_CODE(0, 0, 7);
-static struct qb_attr_code code_dqrr_stat = QB_CODE(0, 8, 8);
-static struct qb_attr_code code_dqrr_seqnum = QB_CODE(0, 16, 14);
-static struct qb_attr_code code_dqrr_odpid = QB_CODE(1, 0, 16);
-/* static struct qb_attr_code code_dqrr_tok = QB_CODE(1, 24, 8); */
-static struct qb_attr_code code_dqrr_fqid = QB_CODE(2, 0, 24);
-static struct qb_attr_code code_dqrr_byte_count = QB_CODE(4, 0, 32);
-static struct qb_attr_code code_dqrr_frame_count = QB_CODE(5, 0, 24);
-static struct qb_attr_code code_dqrr_ctx_lo = QB_CODE(6, 0, 32);
+#define QMAN_DQRR_PI_MASK 0xf
#define QBMAN_RESULT_DQ 0x60
#define QBMAN_RESULT_FQRN 0x21
@@ -833,8 +794,6 @@ static struct qb_attr_code code_dqrr_ctx_lo = QB_CODE(6, 0, 32);
#define QBMAN_RESULT_BPSCN 0x29
#define QBMAN_RESULT_CSCN_WQ 0x2a
-static struct qb_attr_code code_dqpi_pi = QB_CODE(0, 0, 4);
-
/* NULL return if there are no unconsumed DQRR entries. Returns a DQRR entry
* only once, so repeated calls can return a sequence of DQRR entries, without
* requiring they be consumed immediately or in any particular order.
@@ -844,8 +803,7 @@ const struct qbman_result *qbman_swp_dqrr_next(struct qbman_swp *s)
uint32_t verb;
uint32_t response_verb;
uint32_t flags;
- const struct qbman_result *dq;
- const uint32_t *p;
+ const struct qbman_result *p;
/* Before using valid-bit to detect if something is there, we have to
* handle the case of the DQRR reset bug...
@@ -858,11 +816,13 @@ const struct qbman_result *qbman_swp_dqrr_next(struct qbman_swp *s)
* will be much less efficient than all subsequent trips around
* it...
*/
- uint32_t dqpi = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_DQPI);
- uint32_t pi = qb_attr_code_decode(&code_dqpi_pi, &dqpi);
+ uint8_t pi = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_DQPI) &
+ QMAN_DQRR_PI_MASK;
+
/* there are new entries if pi != next_idx */
if (pi == s->dqrr.next_idx)
return NULL;
+
/* if next_idx is/was the last ring index, and 'pi' is
* different, we can disable the workaround as all the ring
* entries have now been DMA'd to so valid-bit checking is
@@ -877,12 +837,12 @@ const struct qbman_result *qbman_swp_dqrr_next(struct qbman_swp *s)
s->dqrr.reset_bug = 0;
}
qbman_cena_invalidate_prefetch(&s->sys,
- QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
+ QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
}
- dq = qbman_cena_read_wo_shadow(&s->sys,
- QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
- p = qb_cl(dq);
- verb = qb_attr_code_decode(&code_dqrr_verb, p);
+ p = qbman_cena_read_wo_shadow(&s->sys,
+ QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
+ verb = p->dq.verb;
+
/* If the valid-bit isn't of the expected polarity, nothing there. Note,
* in the DQRR reset bug workaround, we shouldn't need to skip these
* check, because we've already determined that a new entry is available
@@ -902,16 +862,16 @@ const struct qbman_result *qbman_swp_dqrr_next(struct qbman_swp *s)
s->dqrr.valid_bit ^= QB_VALID_BIT;
}
/* If this is the final response to a volatile dequeue command
- * indicate that the vdq is no longer busy.
+ * indicate that the vdq is no longer busy
*/
- flags = qbman_result_DQ_flags(dq);
- response_verb = qb_attr_code_decode(&code_dqrr_response, &verb);
+ flags = p->dq.stat;
+ response_verb = verb & QMAN_RESPONSE_VERB_MASK;
if ((response_verb == QBMAN_RESULT_DQ) &&
(flags & QBMAN_DQ_STAT_VOLATILE) &&
(flags & QBMAN_DQ_STAT_EXPIRED))
atomic_inc(&s->vdq.busy);
- return dq;
+ return p;
}
/* Consume DQRR entries previously returned from qbman_swp_dqrr_next(). */
@@ -924,80 +884,69 @@ void qbman_swp_dqrr_consume(struct qbman_swp *s,
/*********************************/
/* Polling user-provided storage */
/*********************************/
-
-int qbman_result_has_new_result(__attribute__((unused)) struct qbman_swp *s,
- const struct qbman_result *dq)
+int qbman_result_has_new_result(struct qbman_swp *s,
+ struct qbman_result *dq)
{
- /* To avoid converting the little-endian DQ entry to host-endian prior
- * to us knowing whether there is a valid entry or not (and run the
- * risk of corrupting the incoming hardware LE write), we detect in
- * hardware endianness rather than host. This means we need a different
- * "code" depending on whether we are BE or LE in software, which is
- * where DQRR_TOK_OFFSET comes in...
+ if (dq->dq.tok == 0)
+ return 0;
+
+ /*
+ * Set token to be 0 so we will detect change back to 1
+ * next time the looping is traversed. Const is cast away here
+ * as we want users to treat the dequeue responses as read only.
*/
- static struct qb_attr_code code_dqrr_tok_detect =
- QB_CODE(0, DQRR_TOK_OFFSET, 8);
- /* The user trying to poll for a result treats "dq" as const. It is
- * however the same address that was provided to us non-const in the
- * first place, for directing hardware DMA to. So we can cast away the
- * const because it is mutable from our perspective.
+ ((struct qbman_result *)dq)->dq.tok = 0;
+
+ /*
+ * VDQCR "no longer busy" hook - not quite the same as DQRR, because the
+ * fact "VDQCR" shows busy doesn't mean that we hold the result that
+ * makes it available. Eg. we may be looking at our 10th dequeue result,
+ * having released VDQCR after the 1st result and it is now busy due to
+ * some other command!
*/
- uint32_t *p = (uint32_t *)(unsigned long)qb_cl(dq);
- uint32_t token;
+ if (s->vdq.storage == dq) {
+ s->vdq.storage = NULL;
+ atomic_inc(&s->vdq.busy);
+ }
+
+ return 1;
+}
- token = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]);
- if (token == 0)
+int qbman_check_new_result(struct qbman_result *dq)
+{
+ if (dq->dq.tok == 0)
return 0;
- /* Entry is valid - overwrite token back to 0 so
- * a) If this memory is reused tokesn will be 0
- * b) If someone calls "has_new_result()" again on this entry it
- * will not appear to be new
- */
- qb_attr_code_encode(&code_dqrr_tok_detect, &p[1], 0);
- /* Only now do we convert from hardware to host endianness. Also, as we
- * are returning success, the user has promised not to call us again, so
- * there's no risk of us converting the endianness twice...
+ /*
+ * Set token to be 0 so we will detect change back to 1
+ * next time the looping is traversed. Const is cast away here
+ * as we want users to treat the dequeue responses as read only.
*/
- make_le32_n(p, 16);
+ ((struct qbman_result *)dq)->dq.tok = 0;
+
return 1;
}
-int qbman_check_command_complete(struct qbman_swp *s,
- const struct qbman_result *dq)
+int qbman_check_command_complete(struct qbman_result *dq)
{
- /* To avoid converting the little-endian DQ entry to host-endian prior
- * to us knowing whether there is a valid entry or not (and run the
- * risk of corrupting the incoming hardware LE write), we detect in
- * hardware endianness rather than host. This means we need a different
- * "code" depending on whether we are BE or LE in software, which is
- * where DQRR_TOK_OFFSET comes in...
- */
- static struct qb_attr_code code_dqrr_tok_detect =
- QB_CODE(0, DQRR_TOK_OFFSET, 8);
- /* The user trying to poll for a result treats "dq" as const. It is
- * however the same address that was provided to us non-const in the
- * first place, for directing hardware DMA to. So we can cast away the
- * const because it is mutable from our perspective.
- */
- uint32_t *p = (uint32_t *)(unsigned long)qb_cl(dq);
- uint32_t token;
+ struct qbman_swp *s;
- token = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]);
- if (token == 0)
+ if (dq->dq.tok == 0)
return 0;
- /* TODO: Remove qbman_swp from parameters and make it a local
- * once we've tested the reserve portal map change
- */
- s = portal_idx_map[token - 1];
- /* When token is set it indicates that VDQ command has been fetched
- * by qbman and is working on it. It is safe for software to issue
- * another VDQ command, so incrementing the busy variable.
+
+ s = portal_idx_map[dq->dq.tok - 1];
+ /*
+ * VDQCR "no longer busy" hook - not quite the same as DQRR, because the
+ * fact "VDQCR" shows busy doesn't mean that we hold the result that
+ * makes it available. Eg. we may be looking at our 10th dequeue result,
+ * having released VDQCR after the 1st result and it is now busy due to
+ * some other command!
*/
if (s->vdq.storage == dq) {
s->vdq.storage = NULL;
atomic_inc(&s->vdq.busy);
}
+
return 1;
}
@@ -1005,23 +954,10 @@ int qbman_check_command_complete(struct qbman_swp *s,
/* Categorising qbman results */
/********************************/
-static struct qb_attr_code code_result_in_mem =
- QB_CODE(0, QBMAN_RESULT_VERB_OFFSET_IN_MEM, 7);
-
static inline int __qbman_result_is_x(const struct qbman_result *dq,
- uint32_t x)
-{
- const uint32_t *p = qb_cl(dq);
- uint32_t response_verb = qb_attr_code_decode(&code_dqrr_response, p);
-
- return (response_verb == x);
-}
-
-static inline int __qbman_result_is_x_in_mem(const struct qbman_result *dq,
- uint32_t x)
+ uint8_t x)
{
- const uint32_t *p = qb_cl(dq);
- uint32_t response_verb = qb_attr_code_decode(&code_result_in_mem, p);
+ uint8_t response_verb = dq->dq.verb & QMAN_RESPONSE_VERB_MASK;
return (response_verb == x);
}
@@ -1043,28 +979,28 @@ int qbman_result_is_CDAN(const struct qbman_result *dq)
int qbman_result_is_CSCN(const struct qbman_result *dq)
{
- return __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_CSCN_MEM) ||
+ return __qbman_result_is_x(dq, QBMAN_RESULT_CSCN_MEM) ||
__qbman_result_is_x(dq, QBMAN_RESULT_CSCN_WQ);
}
int qbman_result_is_BPSCN(const struct qbman_result *dq)
{
- return __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_BPSCN);
+ return __qbman_result_is_x(dq, QBMAN_RESULT_BPSCN);
}
int qbman_result_is_CGCU(const struct qbman_result *dq)
{
- return __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_CGCU);
+ return __qbman_result_is_x(dq, QBMAN_RESULT_CGCU);
}
int qbman_result_is_FQRN(const struct qbman_result *dq)
{
- return __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_FQRN);
+ return __qbman_result_is_x(dq, QBMAN_RESULT_FQRN);
}
int qbman_result_is_FQRNI(const struct qbman_result *dq)
{
- return __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_FQRNI);
+ return __qbman_result_is_x(dq, QBMAN_RESULT_FQRNI);
}
int qbman_result_is_FQPN(const struct qbman_result *dq)
@@ -1078,109 +1014,62 @@ int qbman_result_is_FQPN(const struct qbman_result *dq)
/* These APIs assume qbman_result_is_DQ() is TRUE */
-uint32_t qbman_result_DQ_flags(const struct qbman_result *dq)
+uint8_t qbman_result_DQ_flags(const struct qbman_result *dq)
{
- const uint32_t *p = qb_cl(dq);
-
- return qb_attr_code_decode(&code_dqrr_stat, p);
+ return dq->dq.stat;
}
uint16_t qbman_result_DQ_seqnum(const struct qbman_result *dq)
{
- const uint32_t *p = qb_cl(dq);
-
- return (uint16_t)qb_attr_code_decode(&code_dqrr_seqnum, p);
+ return dq->dq.seqnum;
}
uint16_t qbman_result_DQ_odpid(const struct qbman_result *dq)
{
- const uint32_t *p = qb_cl(dq);
-
- return (uint16_t)qb_attr_code_decode(&code_dqrr_odpid, p);
+ return dq->dq.oprid;
}
uint32_t qbman_result_DQ_fqid(const struct qbman_result *dq)
{
- const uint32_t *p = qb_cl(dq);
-
- return qb_attr_code_decode(&code_dqrr_fqid, p);
+ return dq->dq.fqid;
}
uint32_t qbman_result_DQ_byte_count(const struct qbman_result *dq)
{
- const uint32_t *p = qb_cl(dq);
-
- return qb_attr_code_decode(&code_dqrr_byte_count, p);
+ return dq->dq.fq_byte_cnt;
}
uint32_t qbman_result_DQ_frame_count(const struct qbman_result *dq)
{
- const uint32_t *p = qb_cl(dq);
-
- return qb_attr_code_decode(&code_dqrr_frame_count, p);
+ return dq->dq.fq_frm_cnt;
}
uint64_t qbman_result_DQ_fqd_ctx(const struct qbman_result *dq)
{
- const uint64_t *p = (const uint64_t *)qb_cl(dq);
-
- return qb_attr_code_decode_64(&code_dqrr_ctx_lo, p);
+ return dq->dq.fqd_ctx;
}
const struct qbman_fd *qbman_result_DQ_fd(const struct qbman_result *dq)
{
- const uint32_t *p = qb_cl(dq);
-
- return (const struct qbman_fd *)&p[8];
+ return (const struct qbman_fd *)&dq->dq.fd[0];
}
/**************************************/
/* Parsing state-change notifications */
/**************************************/
-
-static struct qb_attr_code code_scn_state = QB_CODE(0, 16, 8);
-static struct qb_attr_code code_scn_rid = QB_CODE(1, 0, 24);
-static struct qb_attr_code code_scn_state_in_mem =
- QB_CODE(0, SCN_STATE_OFFSET_IN_MEM, 8);
-static struct qb_attr_code code_scn_rid_in_mem =
- QB_CODE(1, SCN_RID_OFFSET_IN_MEM, 24);
-static struct qb_attr_code code_scn_ctx_lo = QB_CODE(2, 0, 32);
-
uint8_t qbman_result_SCN_state(const struct qbman_result *scn)
{
- const uint32_t *p = qb_cl(scn);
-
- return (uint8_t)qb_attr_code_decode(&code_scn_state, p);
+ return scn->scn.state;
}
uint32_t qbman_result_SCN_rid(const struct qbman_result *scn)
{
- const uint32_t *p = qb_cl(scn);
-
- return qb_attr_code_decode(&code_scn_rid, p);
+ return scn->scn.rid_tok;
}
uint64_t qbman_result_SCN_ctx(const struct qbman_result *scn)
{
- const uint64_t *p = (const uint64_t *)qb_cl(scn);
-
- return qb_attr_code_decode_64(&code_scn_ctx_lo, p);
-}
-
-uint8_t qbman_result_SCN_state_in_mem(const struct qbman_result *scn)
-{
- const uint32_t *p = qb_cl(scn);
-
- return (uint8_t)qb_attr_code_decode(&code_scn_state_in_mem, p);
-}
-
-uint32_t qbman_result_SCN_rid_in_mem(const struct qbman_result *scn)
-{
- const uint32_t *p = qb_cl(scn);
- uint32_t result_rid;
-
- result_rid = qb_attr_code_decode(&code_scn_rid_in_mem, p);
- return make_le24(result_rid);
+ return scn->scn.ctx;
}
/*****************/
@@ -1188,22 +1077,22 @@ uint32_t qbman_result_SCN_rid_in_mem(const struct qbman_result *scn)
/*****************/
uint16_t qbman_result_bpscn_bpid(const struct qbman_result *scn)
{
- return (uint16_t)qbman_result_SCN_rid_in_mem(scn) & 0x3FFF;
+ return (uint16_t)qbman_result_SCN_rid(scn) & 0x3FFF;
}
int qbman_result_bpscn_has_free_bufs(const struct qbman_result *scn)
{
- return !(int)(qbman_result_SCN_state_in_mem(scn) & 0x1);
+ return !(int)(qbman_result_SCN_state(scn) & 0x1);
}
int qbman_result_bpscn_is_depleted(const struct qbman_result *scn)
{
- return (int)(qbman_result_SCN_state_in_mem(scn) & 0x2);
+ return (int)(qbman_result_SCN_state(scn) & 0x2);
}
int qbman_result_bpscn_is_surplus(const struct qbman_result *scn)
{
- return (int)(qbman_result_SCN_state_in_mem(scn) & 0x4);
+ return (int)(qbman_result_SCN_state(scn) & 0x4);
}
uint64_t qbman_result_bpscn_ctx(const struct qbman_result *scn)
@@ -1214,6 +1103,7 @@ uint64_t qbman_result_bpscn_ctx(const struct qbman_result *scn)
ctx = qbman_result_SCN_ctx(scn);
ctx_hi = upper32(ctx);
ctx_lo = lower32(ctx);
+
return ((uint64_t)make_le32(ctx_hi) << 32 |
(uint64_t)make_le32(ctx_lo));
}
@@ -1223,7 +1113,7 @@ uint64_t qbman_result_bpscn_ctx(const struct qbman_result *scn)
/*****************/
uint16_t qbman_result_cgcu_cgid(const struct qbman_result *scn)
{
- return (uint16_t)qbman_result_SCN_rid_in_mem(scn) & 0xFFFF;
+ return (uint16_t)qbman_result_SCN_rid(scn) & 0xFFFF;
}
uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn)
@@ -1234,6 +1124,7 @@ uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn)
ctx = qbman_result_SCN_ctx(scn);
ctx_hi = upper32(ctx);
ctx_lo = lower32(ctx);
+
return ((uint64_t)(make_le32(ctx_hi) & 0xFF) << 32) |
(uint64_t)make_le32(ctx_lo);
}
@@ -1241,34 +1132,26 @@ uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn)
/******************/
/* Buffer release */
/******************/
-
-/* These should be const, eventually */
-/* static struct qb_attr_code code_release_num = QB_CODE(0, 0, 3); */
-static struct qb_attr_code code_release_set_me = QB_CODE(0, 5, 1);
-static struct qb_attr_code code_release_rcdi = QB_CODE(0, 6, 1);
-static struct qb_attr_code code_release_bpid = QB_CODE(0, 16, 16);
+#define QB_BR_RC_VALID_SHIFT 5
+#define QB_BR_RCDI_SHIFT 6
void qbman_release_desc_clear(struct qbman_release_desc *d)
{
- uint32_t *cl;
-
memset(d, 0, sizeof(*d));
- cl = qb_cl(d);
- qb_attr_code_encode(&code_release_set_me, cl, 1);
+ d->br.verb = 1 << QB_BR_RC_VALID_SHIFT;
}
-void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid)
+void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint16_t bpid)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_release_bpid, cl, bpid);
+ d->br.bpid = bpid;
}
void qbman_release_desc_set_rcdi(struct qbman_release_desc *d, int enable)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_release_rcdi, cl, !!enable);
+ if (enable)
+ d->br.verb |= 1 << QB_BR_RCDI_SHIFT;
+ else
+ d->br.verb &= ~(1 << QB_BR_RCDI_SHIFT);
}
#define RAR_IDX(rar) ((rar) & 0x7)
@@ -1285,12 +1168,16 @@ int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,
pr_debug("RAR=%08x\n", rar);
if (!RAR_SUCCESS(rar))
return -EBUSY;
+
QBMAN_BUG_ON(!num_buffers || (num_buffers > 7));
+
/* Start the release command */
p = qbman_cena_write_start_wo_shadow(&s->sys,
QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
+
/* Copy the caller's buffer pointers to the command */
u64_to_le32_copy(&p[2], buffers, num_buffers);
+
/* Set the verb byte, have to substitute in the valid-bit and the number
* of buffers.
*/
@@ -1298,25 +1185,38 @@ int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,
p[0] = cl[0] | RAR_VB(rar) | num_buffers;
qbman_cena_write_complete_wo_shadow(&s->sys,
QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
+
return 0;
}
/*******************/
/* Buffer acquires */
/*******************/
+struct qbman_acquire_desc {
+ uint8_t verb;
+ uint8_t reserved;
+ uint16_t bpid;
+ uint8_t num;
+ uint8_t reserved2[59];
+};
-/* These should be const, eventually */
-static struct qb_attr_code code_acquire_bpid = QB_CODE(0, 16, 16);
-static struct qb_attr_code code_acquire_num = QB_CODE(1, 0, 3);
-static struct qb_attr_code code_acquire_r_num = QB_CODE(1, 0, 3);
+struct qbman_acquire_rslt {
+ uint8_t verb;
+ uint8_t rslt;
+ uint16_t reserved;
+ uint8_t num;
+ uint8_t reserved2[3];
+ uint64_t buf[7];
+};
-int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,
+int qbman_swp_acquire(struct qbman_swp *s, uint16_t bpid, uint64_t *buffers,
unsigned int num_buffers)
{
- uint32_t *p;
- uint32_t rslt, num;
+ struct qbman_acquire_desc *p;
+ struct qbman_acquire_rslt *r;
- QBMAN_BUG_ON(!num_buffers || (num_buffers > 7));
+ if (!num_buffers || (num_buffers > 7))
+ return -EINVAL;
/* Start the management command */
p = qbman_swp_mc_start(s);
@@ -1325,59 +1225,81 @@ int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,
return -EBUSY;
/* Encode the caller-provided attributes */
- qb_attr_code_encode(&code_acquire_bpid, p, bpid);
- qb_attr_code_encode(&code_acquire_num, p, num_buffers);
+ p->bpid = bpid;
+ p->num = num_buffers;
/* Complete the management command */
- p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_MC_ACQUIRE);
+ r = qbman_swp_mc_complete(s, p, QBMAN_MC_ACQUIRE);
+ if (unlikely(!r)) {
+ pr_err("qbman: acquire from BPID %d failed, no response\n",
+ bpid);
+ return -EIO;
+ }
/* Decode the outcome */
- rslt = qb_attr_code_decode(&code_generic_rslt, p);
- num = qb_attr_code_decode(&code_acquire_r_num, p);
- QBMAN_BUG_ON(qb_attr_code_decode(&code_generic_verb, p) !=
- QBMAN_MC_ACQUIRE);
+ QBMAN_BUG_ON((r->verb & QBMAN_RESPONSE_VERB_MASK) != QBMAN_MC_ACQUIRE);
/* Determine success or failure */
- if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
+ if (unlikely(r->rslt != QBMAN_MC_RSLT_OK)) {
pr_err("Acquire buffers from BPID 0x%x failed, code=0x%02x\n",
- bpid, rslt);
+ bpid, r->rslt);
return -EIO;
}
- QBMAN_BUG_ON(num > num_buffers);
+
+ QBMAN_BUG_ON(r->num > num_buffers);
+
/* Copy the acquired buffers to the caller's array */
- u64_from_le32_copy(buffers, &p[2], num);
- return (int)num;
+ u64_from_le32_copy(buffers, &r->buf[0], r->num);
+
+ return (int)r->num;
}
/*****************/
/* FQ management */
/*****************/
+struct qbman_alt_fq_state_desc {
+ uint8_t verb;
+ uint8_t reserved[3];
+ uint32_t fqid;
+ uint8_t reserved2[56];
+};
+
+struct qbman_alt_fq_state_rslt {
+ uint8_t verb;
+ uint8_t rslt;
+ uint8_t reserved[62];
+};
-static struct qb_attr_code code_fqalt_fqid = QB_CODE(1, 0, 32);
+#define ALT_FQ_FQID_MASK 0x00FFFFFF
static int qbman_swp_alt_fq_state(struct qbman_swp *s, uint32_t fqid,
uint8_t alt_fq_verb)
{
- uint32_t *p;
- uint32_t rslt;
+ struct qbman_alt_fq_state_desc *p;
+ struct qbman_alt_fq_state_rslt *r;
/* Start the management command */
p = qbman_swp_mc_start(s);
if (!p)
return -EBUSY;
- qb_attr_code_encode(&code_fqalt_fqid, p, fqid);
+ p->fqid = fqid & ALT_FQ_FQID_MASK;
+
/* Complete the management command */
- p = qbman_swp_mc_complete(s, p, p[0] | alt_fq_verb);
+ r = qbman_swp_mc_complete(s, p, alt_fq_verb);
+ if (unlikely(!r)) {
+ pr_err("qbman: mgmt cmd failed, no response (verb=0x%x)\n",
+ alt_fq_verb);
+ return -EIO;
+ }
/* Decode the outcome */
- rslt = qb_attr_code_decode(&code_generic_rslt, p);
- QBMAN_BUG_ON(qb_attr_code_decode(&code_generic_verb, p) != alt_fq_verb);
+ QBMAN_BUG_ON((r->verb & QBMAN_RESPONSE_VERB_MASK) != alt_fq_verb);
/* Determine success or failure */
- if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
+ if (unlikely(r->rslt != QBMAN_MC_RSLT_OK)) {
pr_err("ALT FQID %d failed: verb = 0x%08x, code = 0x%02x\n",
- fqid, alt_fq_verb, rslt);
+ fqid, alt_fq_verb, r->rslt);
return -EIO;
}
@@ -1408,10 +1330,24 @@ int qbman_swp_fq_xoff(struct qbman_swp *s, uint32_t fqid)
/* Channel management */
/**********************/
-static struct qb_attr_code code_cdan_cid = QB_CODE(0, 16, 12);
-static struct qb_attr_code code_cdan_we = QB_CODE(1, 0, 8);
-static struct qb_attr_code code_cdan_en = QB_CODE(1, 8, 1);
-static struct qb_attr_code code_cdan_ctx_lo = QB_CODE(2, 0, 32);
+struct qbman_cdan_ctrl_desc {
+ uint8_t verb;
+ uint8_t reserved;
+ uint16_t ch;
+ uint8_t we;
+ uint8_t ctrl;
+ uint16_t reserved2;
+ uint64_t cdan_ctx;
+ uint8_t reserved3[48];
+
+};
+
+struct qbman_cdan_ctrl_rslt {
+ uint8_t verb;
+ uint8_t rslt;
+ uint16_t ch;
+ uint8_t reserved[60];
+};
/* Hide "ICD" for now as we don't use it, don't set it, and don't test it, so it
* would be irresponsible to expose it.
@@ -1423,8 +1359,8 @@ static int qbman_swp_CDAN_set(struct qbman_swp *s, uint16_t channelid,
uint8_t we_mask, uint8_t cdan_en,
uint64_t ctx)
{
- uint32_t *p;
- uint32_t rslt;
+ struct qbman_cdan_ctrl_desc *p;
+ struct qbman_cdan_ctrl_rslt *r;
/* Start the management command */
p = qbman_swp_mc_start(s);
@@ -1432,22 +1368,29 @@ static int qbman_swp_CDAN_set(struct qbman_swp *s, uint16_t channelid,
return -EBUSY;
/* Encode the caller-provided attributes */
- qb_attr_code_encode(&code_cdan_cid, p, channelid);
- qb_attr_code_encode(&code_cdan_we, p, we_mask);
- qb_attr_code_encode(&code_cdan_en, p, cdan_en);
- qb_attr_code_encode_64(&code_cdan_ctx_lo, (uint64_t *)p, ctx);
+ p->ch = channelid;
+ p->we = we_mask;
+ if (cdan_en)
+ p->ctrl = 1;
+ else
+ p->ctrl = 0;
+ p->cdan_ctx = ctx;
+
/* Complete the management command */
- p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_WQCHAN_CONFIGURE);
+ r = qbman_swp_mc_complete(s, p, QBMAN_WQCHAN_CONFIGURE);
+ if (unlikely(!r)) {
+ pr_err("qbman: wqchan config failed, no response\n");
+ return -EIO;
+ }
/* Decode the outcome */
- rslt = qb_attr_code_decode(&code_generic_rslt, p);
- QBMAN_BUG_ON(qb_attr_code_decode(&code_generic_verb, p)
- != QBMAN_WQCHAN_CONFIGURE);
+ QBMAN_BUG_ON((r->verb & QBMAN_RESPONSE_VERB_MASK)
+ != QBMAN_WQCHAN_CONFIGURE);
/* Determine success or failure */
- if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
+ if (unlikely(r->rslt != QBMAN_MC_RSLT_OK)) {
pr_err("CDAN cQID %d failed: code = 0x%02x\n",
- channelid, rslt);
+ channelid, r->rslt);
return -EIO;
}
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.h b/drivers/bus/fslmc/qbman/qbman_portal.h
index 8018048..bfcef8f 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/qbman_portal.h
@@ -123,12 +123,12 @@ struct qbman_swp {
* non-NULL if only if the response is complete).
*/
void *qbman_swp_mc_start(struct qbman_swp *p);
-void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb);
+void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint8_t cmd_verb);
void *qbman_swp_mc_result(struct qbman_swp *p);
/* Wraps up submit + poll-for-result */
static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd,
- uint32_t cmd_verb)
+ uint8_t cmd_verb)
{
int loopvar;
@@ -275,4 +275,4 @@ static inline int32_t qb_attr_code_makesigned(const struct qb_attr_code *code,
* an inline) is necessary to work with different descriptor types and to work
* correctly with const and non-const inputs (and similarly-qualified outputs).
*/
-#define qb_cl(d) (&(d)->dont_manipulate_directly[0])
+#define qb_cl(d) (&(d)->donot_manipulate_directly[0])
diff --git a/drivers/bus/fslmc/qbman/qbman_private.h b/drivers/bus/fslmc/qbman/qbman_private.h
index b98c330..4f48b47 100644
--- a/drivers/bus/fslmc/qbman/qbman_private.h
+++ b/drivers/bus/fslmc/qbman/qbman_private.h
@@ -92,7 +92,7 @@ do { \
*
*/
#ifdef __LP64__
-#define MAKE_MASK32(width) ((uint32_t)(( 1ULL << width) - 1))
+#define MAKE_MASK32(width) ((uint32_t)((1ULL << width) - 1))
#else
#define MAKE_MASK32(width) (width == 32 ? 0xffffffff : \
(uint32_t)((1 << width) - 1))
diff --git a/drivers/bus/fslmc/qbman/qbman_sys.h b/drivers/bus/fslmc/qbman/qbman_sys.h
index 47da595..c73d2bf 100644
--- a/drivers/bus/fslmc/qbman/qbman_sys.h
+++ b/drivers/bus/fslmc/qbman/qbman_sys.h
@@ -357,15 +357,3 @@ static inline void qbman_swp_sys_finish(struct qbman_swp_sys *s)
{
free_page((unsigned long)s->cena);
}
-
-static inline void *
-qbman_cena_write_start_wo_shadow_fast(struct qbman_swp_sys *s,
- uint32_t offset)
-{
-#ifdef QBMAN_CENA_TRACE
- pr_info("qbman_cena_write_start(%p:%d:0x%03x)\n",
- s->addr_cena, s->idx, offset);
-#endif
- QBMAN_BUG_ON(offset & 63);
- return (s->addr_cena + offset);
-}
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index 13fb46a..3cc7dad 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -62,11 +62,12 @@ DPDK_17.08 {
dpio_remove_static_dequeue_channel;
mc_get_soc_version;
mc_get_version;
+ qbman_check_new_result;
qbman_eq_desc_set_dca;
qbman_get_dqrr_from_idx;
qbman_get_dqrr_idx;
qbman_result_DQ_fqd_ctx;
- qbman_result_SCN_state_in_mem;
+ qbman_result_SCN_state;
qbman_swp_dqrr_consume;
qbman_swp_dqrr_next;
qbman_swp_enqueue_multiple;
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 094cf30..d2aff28 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -747,13 +747,13 @@ dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
* Also seems like the SWP is shared between the Ethernet Driver
* and the SEC driver.
*/
- while (!qbman_check_command_complete(swp, dq_storage))
+ while (!qbman_check_command_complete(dq_storage))
;
/* Loop until the dq_storage is updated with
* new token by QBMAN
*/
- while (!qbman_result_has_new_result(swp, dq_storage))
+ while (!qbman_check_new_result(dq_storage))
;
/* Check whether Last Pull command is Expired and
* setting Condition for Loop termination
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 4342c73..75a06f5 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -422,7 +422,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
qbman_pull_desc_set_storage(&pulldesc, dq_storage,
(dma_addr_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);
if (check_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index)) {
- while (!qbman_check_command_complete(swp,
+ while (!qbman_check_command_complete(
get_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index)))
;
clear_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index);
@@ -445,7 +445,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
* Also seems like the SWP is shared between the Ethernet Driver
* and the SEC driver.
*/
- while (!qbman_check_command_complete(swp, dq_storage))
+ while (!qbman_check_command_complete(dq_storage))
;
if (dq_storage == get_swp_active_dqs(q_storage->active_dpio_id))
clear_swp_active_dqs(q_storage->active_dpio_id);
@@ -453,7 +453,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
/* Loop until the dq_storage is updated with
* new token by QBMAN
*/
- while (!qbman_result_has_new_result(swp, dq_storage))
+ while (!qbman_check_new_result(dq_storage))
;
rte_prefetch0((void *)((uint64_t)(dq_storage + 1)));
/* Check whether Last Pull command is Expired and
@@ -486,7 +486,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
}
if (check_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index)) {
- while (!qbman_check_command_complete(swp,
+ while (!qbman_check_command_complete(
get_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index)))
;
clear_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index);
@@ -560,7 +560,7 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
while (nb_pkts) {
/*Check if the queue is congested*/
retry_count = 0;
- if (qbman_result_SCN_state_in_mem(dpaa2_q->cscn)) {
+ while (qbman_result_SCN_state(dpaa2_q->cscn)) {
retry_count++;
/* Retry for some time before giving up */
if (retry_count > CONG_RETRY_COUNT)
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 07/30] bus/fslmc: cleanup compat file
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (5 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 06/30] bus/fslmc: qbman remove unused funcs and align names Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 08/30] bus/fslmc: clean the qbman support code Hemant Agrawal
` (23 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/include/compat.h | 188 +------------------------------
drivers/bus/fslmc/qbman/qbman_private.h | 2 +-
2 files changed, 4 insertions(+), 186 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/include/compat.h b/drivers/bus/fslmc/qbman/include/compat.h
index 7b69fd1..8885d60 100644
--- a/drivers/bus/fslmc/qbman/include/compat.h
+++ b/drivers/bus/fslmc/qbman/include/compat.h
@@ -65,16 +65,9 @@
*/
/* Required compiler attributes */
-#define __user
#define likely(x) __builtin_expect(!!(x), 1)
#define unlikely(x) __builtin_expect(!!(x), 0)
#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
-#undef container_of
-#define container_of(ptr, type, member) ({ \
- typeof(((type *)0)->member)(*__mptr) = (ptr); \
- (type *)((char *)__mptr - offsetof(type, member)); })
-#define __stringify_1(x) #x
-#define __stringify(x) __stringify_1(x)
#ifdef ARRAY_SIZE
#undef ARRAY_SIZE
@@ -88,17 +81,8 @@ typedef uint32_t u32;
typedef uint64_t u64;
typedef uint64_t dma_addr_t;
typedef cpu_set_t cpumask_t;
-typedef u32 compat_uptr_t;
-
-static inline void __user *compat_ptr(compat_uptr_t uptr)
-{
- return (void __user *)(unsigned long)uptr;
-}
-
-static inline compat_uptr_t ptr_to_compat(void __user *uptr)
-{
- return (u32)(unsigned long)uptr;
-}
+typedef unsigned int gfp_t;
+typedef uint32_t phandle;
/* I/O operations */
static inline u32 in_be32(volatile void *__p)
@@ -124,12 +108,11 @@ static inline void out_be32(volatile void *__p, u32 val)
#define pr_warn(fmt, args...) prflush("WARN:" fmt, ##args)
#define pr_info(fmt, args...) prflush(fmt, ##args)
+#ifdef RTE_LIBRTE_DPAA2_DEBUG_BUS
#ifdef pr_debug
#undef pr_debug
#endif
#define pr_debug(fmt, args...) {}
-#define might_sleep_if(c) {}
-#define msleep(x) {}
#define WARN_ON(c, str) \
do { \
static int warned_##__LINE__; \
@@ -147,103 +130,20 @@ do { \
#define ALIGN(x, a) (((x) + ((typeof(x))(a) - 1)) & ~((typeof(x))(a) - 1))
-/****************/
-/* Linked-lists */
-/****************/
-
-struct list_head {
- struct list_head *prev;
- struct list_head *next;
-};
-
-#define LIST_HEAD(n) \
-struct list_head n = { \
- .prev = &n, \
- .next = &n \
-}
-
-#define INIT_LIST_HEAD(p) \
-do { \
- struct list_head *__p298 = (p); \
- __p298->next = __p298; \
- __p298->prev = __p298->next; \
-} while (0)
-#define list_entry(node, type, member) \
- (type *)((void *)node - offsetof(type, member))
-#define list_empty(p) \
-({ \
- const struct list_head *__p298 = (p); \
- ((__p298->next == __p298) && (__p298->prev == __p298)); \
-})
-#define list_add(p, l) \
-do { \
- struct list_head *__p298 = (p); \
- struct list_head *__l298 = (l); \
- __p298->next = __l298->next; \
- __p298->prev = __l298; \
- __l298->next->prev = __p298; \
- __l298->next = __p298; \
-} while (0)
-#define list_add_tail(p, l) \
-do { \
- struct list_head *__p298 = (p); \
- struct list_head *__l298 = (l); \
- __p298->prev = __l298->prev; \
- __p298->next = __l298; \
- __l298->prev->next = __p298; \
- __l298->prev = __p298; \
-} while (0)
-#define list_for_each(i, l) \
- for (i = (l)->next; i != (l); i = i->next)
-#define list_for_each_safe(i, j, l) \
- for (i = (l)->next, j = i->next; i != (l); \
- i = j, j = i->next)
-#define list_for_each_entry(i, l, name) \
- for (i = list_entry((l)->next, typeof(*i), name); &i->name != (l); \
- i = list_entry(i->name.next, typeof(*i), name))
-#define list_for_each_entry_safe(i, j, l, name) \
- for (i = list_entry((l)->next, typeof(*i), name), \
- j = list_entry(i->name.next, typeof(*j), name); \
- &i->name != (l); \
- i = j, j = list_entry(j->name.next, typeof(*j), name))
-#define list_del(i) \
-do { \
- (i)->next->prev = (i)->prev; \
- (i)->prev->next = (i)->next; \
-} while (0)
-
/* Other miscellaneous interfaces our APIs depend on; */
-
#define lower_32_bits(x) ((u32)(x))
#define upper_32_bits(x) ((u32)(((x) >> 16) >> 16))
/* Compiler/type stuff */
-typedef unsigned int gfp_t;
-typedef uint32_t phandle;
#define __iomem
-#define EINTR 4
-#define ENODEV 19
#define GFP_KERNEL 0
#define __raw_readb(p) (*(const volatile unsigned char *)(p))
#define __raw_readl(p) (*(const volatile unsigned int *)(p))
#define __raw_writel(v, p) {*(volatile unsigned int *)(p) = (v); }
-/* Completion stuff */
-#define DECLARE_COMPLETION(n) int n = 0
-#define complete(n) { *n = 1; }
-#define wait_for_completion(n) \
-do { \
- while (!*n) { \
- bman_poll(); \
- qman_poll(); \
- } \
- *n = 0; \
-} while (0)
-
/* Allocator stuff */
#define kmalloc(sz, t) malloc(sz)
-#define vmalloc(sz) malloc(sz)
#define kfree(p) { if (p) free(p); }
static inline void *kzalloc(size_t sz, gfp_t __foo __rte_unused)
{
@@ -269,88 +169,6 @@ static inline void free_page(unsigned long p)
free((void *)p);
}
-/* Bitfield stuff. */
-#define BITS_PER_ULONG (sizeof(unsigned long) << 3)
-#define SHIFT_PER_ULONG (((1 << 5) == BITS_PER_ULONG) ? 5 : 6)
-#define BITS_MASK(idx) ((unsigned long)1 << ((idx) & (BITS_PER_ULONG - 1)))
-#define BITS_IDX(idx) ((idx) >> SHIFT_PER_ULONG)
-static inline unsigned long test_bits(unsigned long mask,
- volatile unsigned long *p)
-{
- return *p & mask;
-}
-
-static inline int test_bit(int idx, volatile unsigned long *bits)
-{
- return test_bits(BITS_MASK(idx), bits + BITS_IDX(idx));
-}
-
-static inline void set_bits(unsigned long mask, volatile unsigned long *p)
-{
- *p |= mask;
-}
-
-static inline void set_bit(int idx, volatile unsigned long *bits)
-{
- set_bits(BITS_MASK(idx), bits + BITS_IDX(idx));
-}
-
-static inline void clear_bits(unsigned long mask, volatile unsigned long *p)
-{
- *p &= ~mask;
-}
-
-static inline void clear_bit(int idx, volatile unsigned long *bits)
-{
- clear_bits(BITS_MASK(idx), bits + BITS_IDX(idx));
-}
-
-static inline unsigned long test_and_set_bits(unsigned long mask,
- volatile unsigned long *p)
-{
- unsigned long ret = test_bits(mask, p);
-
- set_bits(mask, p);
- return ret;
-}
-
-static inline int test_and_set_bit(int idx, volatile unsigned long *bits)
-{
- int ret = test_bit(idx, bits);
-
- set_bit(idx, bits);
- return ret;
-}
-
-static inline int test_and_clear_bit(int idx, volatile unsigned long *bits)
-{
- int ret = test_bit(idx, bits);
-
- clear_bit(idx, bits);
- return ret;
-}
-
-static inline int find_next_zero_bit(unsigned long *bits, int limit, int idx)
-{
- while ((++idx < limit) && test_bit(idx, bits))
- ;
- return idx;
-}
-
-static inline int find_first_zero_bit(unsigned long *bits, int limit)
-{
- int idx = 0;
-
- while (test_bit(idx, bits) && (++idx < limit))
- ;
- return idx;
-}
-
-static inline u64 div64_u64(u64 n, u64 d)
-{
- return n / d;
-}
-
#define atomic_t rte_atomic32_t
#define atomic_read(v) rte_atomic32_read(v)
#define atomic_set(v, i) rte_atomic32_set(v, i)
diff --git a/drivers/bus/fslmc/qbman/qbman_private.h b/drivers/bus/fslmc/qbman/qbman_private.h
index 4f48b47..32e5c5d 100644
--- a/drivers/bus/fslmc/qbman/qbman_private.h
+++ b/drivers/bus/fslmc/qbman/qbman_private.h
@@ -27,7 +27,7 @@
*/
/* Perform extra checking */
-#define QBMAN_CHECKING
+/*#define QBMAN_CHECKING*/
/* To maximise the amount of logic that is common between the Linux driver and
* other targets (such as the embedded MC firmware), we pivot here between the
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 08/30] bus/fslmc: clean the qbman support code
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (6 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 07/30] bus/fslmc: cleanup compat file Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 09/30] bus/fslmc: update MC to 10.3.x Hemant Agrawal
` (22 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/include/compat.h | 87 +---------
drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 5 +-
drivers/bus/fslmc/qbman/qbman_portal.c | 26 +--
drivers/bus/fslmc/qbman/qbman_portal.h | 133 ++-------------
drivers/bus/fslmc/qbman/qbman_private.h | 178 ---------------------
drivers/bus/fslmc/qbman/qbman_sys.h | 124 ++++++++------
drivers/bus/fslmc/qbman/qbman_sys_decl.h | 25 +--
7 files changed, 102 insertions(+), 476 deletions(-)
delete mode 100644 drivers/bus/fslmc/qbman/qbman_private.h
diff --git a/drivers/bus/fslmc/qbman/include/compat.h b/drivers/bus/fslmc/qbman/include/compat.h
index 8885d60..97904b8 100644
--- a/drivers/bus/fslmc/qbman/include/compat.h
+++ b/drivers/bus/fslmc/qbman/include/compat.h
@@ -30,32 +30,17 @@
#ifndef HEADER_COMPAT_H
#define HEADER_COMPAT_H
-#include <sched.h>
-
#ifndef _GNU_SOURCE
#define _GNU_SOURCE
#endif
#include <stdint.h>
#include <stdlib.h>
-#include <stddef.h>
#include <errno.h>
#include <string.h>
-#include <pthread.h>
-#include <net/ethernet.h>
-#include <stdio.h>
-#include <stdbool.h>
-#include <ctype.h>
#include <malloc.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
#include <unistd.h>
-#include <sys/mman.h>
-#include <limits.h>
-#include <assert.h>
-#include <dirent.h>
-#include <inttypes.h>
#include <error.h>
+#include <linux/types.h>
#include <rte_atomic.h>
/* The following definitions are primarily to allow the single-source driver
@@ -67,35 +52,9 @@
/* Required compiler attributes */
#define likely(x) __builtin_expect(!!(x), 1)
#define unlikely(x) __builtin_expect(!!(x), 0)
-#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
-
-#ifdef ARRAY_SIZE
-#undef ARRAY_SIZE
-#endif
-#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
/* Required types */
-typedef uint8_t u8;
-typedef uint16_t u16;
-typedef uint32_t u32;
-typedef uint64_t u64;
typedef uint64_t dma_addr_t;
-typedef cpu_set_t cpumask_t;
-typedef unsigned int gfp_t;
-typedef uint32_t phandle;
-
-/* I/O operations */
-static inline u32 in_be32(volatile void *__p)
-{
- volatile u32 *p = __p;
- return *p;
-}
-
-static inline void out_be32(volatile void *__p, u32 val)
-{
- volatile u32 *p = __p;
- *p = val;
-}
/* Debugging */
#define prflush(fmt, args...) \
@@ -112,8 +71,8 @@ static inline void out_be32(volatile void *__p, u32 val)
#ifdef pr_debug
#undef pr_debug
#endif
-#define pr_debug(fmt, args...) {}
-#define WARN_ON(c, str) \
+#define pr_debug(fmt, args...) printf(fmt, ##args)
+#define QBMAN_BUG_ON(c) \
do { \
static int warned_##__LINE__; \
if ((c) && !warned_##__LINE__) { \
@@ -122,53 +81,23 @@ do { \
warned_##__LINE__ = 1; \
} \
} while (0)
-#ifdef CONFIG_BUGON
-#define QBMAN_BUG_ON(c) WARN_ON(c, "BUG")
#else
#define QBMAN_BUG_ON(c) {}
+#define pr_debug(fmt, args...) {}
#endif
-#define ALIGN(x, a) (((x) + ((typeof(x))(a) - 1)) & ~((typeof(x))(a) - 1))
-
/* Other miscellaneous interfaces our APIs depend on; */
-#define lower_32_bits(x) ((u32)(x))
-#define upper_32_bits(x) ((u32)(((x) >> 16) >> 16))
-/* Compiler/type stuff */
+#define lower_32_bits(x) ((uint32_t)(x))
+#define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16))
+
#define __iomem
-#define GFP_KERNEL 0
+
#define __raw_readb(p) (*(const volatile unsigned char *)(p))
#define __raw_readl(p) (*(const volatile unsigned int *)(p))
#define __raw_writel(v, p) {*(volatile unsigned int *)(p) = (v); }
-/* Allocator stuff */
-#define kmalloc(sz, t) malloc(sz)
-#define kfree(p) { if (p) free(p); }
-static inline void *kzalloc(size_t sz, gfp_t __foo __rte_unused)
-{
- void *ptr = malloc(sz);
-
- if (ptr)
- memset(ptr, 0, sz);
- return ptr;
-}
-
-static inline unsigned long get_zeroed_page(gfp_t __foo __rte_unused)
-{
- void *p;
-
- if (posix_memalign(&p, 4096, 4096))
- return 0;
- memset(p, 0, 4096);
- return (unsigned long)p;
-}
-
-static inline void free_page(unsigned long p)
-{
- free((void *)p);
-}
-
#define atomic_t rte_atomic32_t
#define atomic_read(v) rte_atomic32_read(v)
#define atomic_set(v, i) rte_atomic32_set(v, i)
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
index 24a6d4b..1e65660 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
@@ -329,7 +329,7 @@ void qbman_pull_desc_clear(struct qbman_pull_desc *d);
*/
void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
struct qbman_result *storage,
- dma_addr_t storage_phys,
+ uint64_t storage_phys,
int stash);
/**
* qbman_pull_desc_set_numframes() - Set the number of frames to be dequeued.
@@ -796,7 +796,6 @@ struct qbman_eq_desc {
uint8_t wae;
uint8_t rspid;
uint64_t rsp_addr;
- uint8_t fd[32];
} eq;
};
};
@@ -881,7 +880,7 @@ void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint16_t opr_id,
* expresses a cache-warming attribute.
*/
void qbman_eq_desc_set_response(struct qbman_eq_desc *d,
- dma_addr_t storage_phys,
+ uint64_t storage_phys,
int stash);
/**
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c
index 072dfe8..ace2c56 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -126,7 +126,7 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
{
int ret;
uint32_t eqcr_pi;
- struct qbman_swp *p = kmalloc(sizeof(*p), GFP_KERNEL);
+ struct qbman_swp *p = malloc(sizeof(*p));
if (!p)
return NULL;
@@ -155,7 +155,7 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
ret = qbman_swp_sys_init(&p->sys, d, p->dqrr.dqrr_size);
if (ret) {
- kfree(p);
+ free(p);
pr_err("qbman_swp_sys_init() failed %d\n", ret);
return NULL;
}
@@ -183,7 +183,7 @@ void qbman_swp_finish(struct qbman_swp *p)
#endif
qbman_swp_sys_finish(&p->sys);
portal_idx_map[p->desc.idx] = NULL;
- kfree(p);
+ free(p);
}
const struct qbman_swp_desc *qbman_swp_get_desc(struct qbman_swp *p)
@@ -1097,15 +1097,7 @@ int qbman_result_bpscn_is_surplus(const struct qbman_result *scn)
uint64_t qbman_result_bpscn_ctx(const struct qbman_result *scn)
{
- uint64_t ctx;
- uint32_t ctx_hi, ctx_lo;
-
- ctx = qbman_result_SCN_ctx(scn);
- ctx_hi = upper32(ctx);
- ctx_lo = lower32(ctx);
-
- return ((uint64_t)make_le32(ctx_hi) << 32 |
- (uint64_t)make_le32(ctx_lo));
+ return qbman_result_SCN_ctx(scn);
}
/*****************/
@@ -1118,15 +1110,7 @@ uint16_t qbman_result_cgcu_cgid(const struct qbman_result *scn)
uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn)
{
- uint64_t ctx;
- uint32_t ctx_hi, ctx_lo;
-
- ctx = qbman_result_SCN_ctx(scn);
- ctx_hi = upper32(ctx);
- ctx_lo = lower32(ctx);
-
- return ((uint64_t)(make_le32(ctx_hi) & 0xFF) << 32) |
- (uint64_t)make_le32(ctx_lo);
+ return qbman_result_SCN_ctx(scn);
}
/******************/
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.h b/drivers/bus/fslmc/qbman/qbman_portal.h
index bfcef8f..d9f3ed7 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/qbman_portal.h
@@ -26,10 +26,14 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "qbman_private.h"
+#include "qbman_sys.h"
#include <fsl_qbman_portal.h>
uint32_t qman_version;
+#define QMAN_REV_4000 0x04000000
+#define QMAN_REV_4100 0x04010000
+#define QMAN_REV_4101 0x04010001
+
/* All QBMan command and result structures use this "valid bit" encoding */
#define QB_VALID_BIT ((uint32_t)0x80)
@@ -40,7 +44,8 @@ uint32_t qman_version;
#define QBMAN_EQCR_SIZE 8
-static inline u8 qm_cyc_diff(u8 ringsize, u8 first, u8 last)
+static inline uint8_t qm_cyc_diff(uint8_t ringsize, uint8_t first,
+ uint8_t last)
{
/* 'first' is included, 'last' is excluded */
if (first <= last)
@@ -130,131 +135,15 @@ void *qbman_swp_mc_result(struct qbman_swp *p);
static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd,
uint8_t cmd_verb)
{
- int loopvar;
+ int loopvar = 1000;
qbman_swp_mc_submit(swp, cmd, cmd_verb);
- DBG_POLL_START(loopvar);
do {
- DBG_POLL_CHECK(loopvar);
cmd = qbman_swp_mc_result(swp);
- } while (!cmd);
- return cmd;
-}
-
-/* ------------ */
-/* qb_attr_code */
-/* ------------ */
-
-/* This struct locates a sub-field within a QBMan portal (CENA) cacheline which
- * is either serving as a configuration command or a query result. The
- * representation is inherently little-endian, as the indexing of the words is
- * itself little-endian in nature and DPAA2 QBMan is little endian for anything
- * that crosses a word boundary too (64-bit fields are the obvious examples).
- */
-struct qb_attr_code {
- unsigned int word; /* which uint32_t[] array member encodes the field */
- unsigned int lsoffset; /* encoding offset from ls-bit */
- unsigned int width; /* encoding width. (bool must be 1.) */
-};
-
-/* Some pre-defined codes */
-extern struct qb_attr_code code_generic_verb;
-extern struct qb_attr_code code_generic_rslt;
-
-/* Macros to define codes */
-#define QB_CODE(a, b, c) { a, b, c}
-#define QB_CODE_NULL \
- QB_CODE((unsigned int)-1, (unsigned int)-1, (unsigned int)-1)
-
-/* Rotate a code "ms", meaning that it moves from less-significant bytes to
- * more-significant, from less-significant words to more-significant, etc. The
- * "ls" version does the inverse, from more-significant towards
- * less-significant.
- */
-static inline void qb_attr_code_rotate_ms(struct qb_attr_code *code,
- unsigned int bits)
-{
- code->lsoffset += bits;
- while (code->lsoffset > 31) {
- code->word++;
- code->lsoffset -= 32;
- }
-}
-
-static inline void qb_attr_code_rotate_ls(struct qb_attr_code *code,
- unsigned int bits)
-{
- /* Don't be fooled, this trick should work because the types are
- * unsigned. So the case that interests the while loop (the rotate has
- * gone too far and the word count needs to compensate for it), is
- * manifested when lsoffset is negative. But that equates to a really
- * large unsigned value, starting with lots of "F"s. As such, we can
- * continue adding 32 back to it until it wraps back round above zero,
- * to a value of 31 or less...
- */
- code->lsoffset -= bits;
- while (code->lsoffset > 31) {
- code->word--;
- code->lsoffset += 32;
- }
-}
+ } while (!cmd && loopvar--);
+ QBMAN_BUG_ON(!loopvar);
-/* Implement a loop of code rotations until 'expr' evaluates to FALSE (0). */
-#define qb_attr_code_for_ms(code, bits, expr) \
- for (; expr; qb_attr_code_rotate_ms(code, bits))
-#define qb_attr_code_for_ls(code, bits, expr) \
- for (; expr; qb_attr_code_rotate_ls(code, bits))
-
-/* decode a field from a cacheline */
-static inline uint32_t qb_attr_code_decode(const struct qb_attr_code *code,
- const uint32_t *cacheline)
-{
- return d32_uint32_t(code->lsoffset, code->width, cacheline[code->word]);
-}
-
-static inline uint64_t qb_attr_code_decode_64(const struct qb_attr_code *code,
- const uint64_t *cacheline)
-{
- return cacheline[code->word / 2];
-}
-
-/* encode a field to a cacheline */
-static inline void qb_attr_code_encode(const struct qb_attr_code *code,
- uint32_t *cacheline, uint32_t val)
-{
- cacheline[code->word] =
- r32_uint32_t(code->lsoffset, code->width, cacheline[code->word])
- | e32_uint32_t(code->lsoffset, code->width, val);
-}
-
-static inline void qb_attr_code_encode_64(const struct qb_attr_code *code,
- uint64_t *cacheline, uint64_t val)
-{
- cacheline[code->word / 2] = val;
-}
-
-/* Small-width signed values (two's-complement) will decode into medium-width
- * positives. (Eg. for an 8-bit signed field, which stores values from -128 to
- * +127, a setting of -7 would appear to decode to the 32-bit unsigned value
- * 249. Likewise -120 would decode as 136.) This function allows the caller to
- * "re-sign" such fields to 32-bit signed. (Eg. -7, which was 249 with an 8-bit
- * encoding, will become 0xfffffff9 if you cast the return value to uint32_t).
- */
-static inline int32_t qb_attr_code_makesigned(const struct qb_attr_code *code,
- uint32_t val)
-{
- QBMAN_BUG_ON(val >= (1u << code->width));
- /* code->width should never exceed the width of val. If it does then a
- * different function with larger val size must be used to translate
- * from unsigned to signed
- */
- QBMAN_BUG_ON(code->width > sizeof(val) * CHAR_BIT);
- /* If the high bit was set, it was encoding a negative */
- if (val >= 1u << (code->width - 1))
- return (int32_t)0 - (int32_t)(((uint32_t)1 << code->width) -
- val);
- /* Otherwise, it was encoding a positive */
- return (int32_t)val;
+ return cmd;
}
/* ---------------------- */
diff --git a/drivers/bus/fslmc/qbman/qbman_private.h b/drivers/bus/fslmc/qbman/qbman_private.h
deleted file mode 100644
index 32e5c5d..0000000
--- a/drivers/bus/fslmc/qbman/qbman_private.h
+++ /dev/null
@@ -1,178 +0,0 @@
-/*-
- * BSD LICENSE
- *
- * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/* Perform extra checking */
-/*#define QBMAN_CHECKING*/
-
-/* To maximise the amount of logic that is common between the Linux driver and
- * other targets (such as the embedded MC firmware), we pivot here between the
- * inclusion of two platform-specific headers.
- *
- * The first, qbman_sys_decl.h, includes any and all required system headers as
- * well as providing any definitions for the purposes of compatibility. The
- * second, qbman_sys.h, is where platform-specific routines go.
- *
- * The point of the split is that the platform-independent code (including this
- * header) may depend on platform-specific declarations, yet other
- * platform-specific routines may depend on platform-independent definitions.
- */
-
-#include "qbman_sys_decl.h"
-
-/* When things go wrong, it is a convenient trick to insert a few FOO()
- * statements in the code to trace progress. TODO: remove this once we are
- * hacking the code less actively.
- */
-#define FOO() fsl_os_print("FOO: %s:%d\n", __FILE__, __LINE__)
-
-/* Any time there is a register interface which we poll on, this provides a
- * "break after x iterations" scheme for it. It's handy for debugging, eg.
- * where you don't want millions of lines of log output from a polling loop
- * that won't, because such things tend to drown out the earlier log output
- * that might explain what caused the problem. (NB: put ";" after each macro!)
- * TODO: we should probably remove this once we're done sanitising the
- * simulator...
- */
-#define DBG_POLL_START(loopvar) (loopvar = 10)
-#define DBG_POLL_CHECK(loopvar) \
-do { \
- if (!(loopvar--)) \
- QBMAN_BUG_ON(NULL == "DBG_POLL_CHECK"); \
-} while (0)
-
-/* For CCSR or portal-CINH registers that contain fields at arbitrary offsets
- * and widths, these macro-generated encode/decode/isolate/remove inlines can
- * be used.
- *
- * Eg. to "d"ecode a 14-bit field out of a register (into a "uint16_t" type),
- * where the field is located 3 bits "up" from the least-significant bit of the
- * register (ie. the field location within the 32-bit register corresponds to a
- * mask of 0x0001fff8), you would do;
- * uint16_t field = d32_uint16_t(3, 14, reg_value);
- *
- * Or to "e"ncode a 1-bit boolean value (input type is "int", zero is FALSE,
- * non-zero is TRUE, so must convert all non-zero inputs to 1, hence the "!!"
- * operator) into a register at bit location 0x00080000 (19 bits "in" from the
- * LS bit), do;
- * reg_value |= e32_int(19, 1, !!field);
- *
- * If you wish to read-modify-write a register, such that you leave the 14-bit
- * field as-is but have all other fields set to zero, then "i"solate the 14-bit
- * value using;
- * reg_value = i32_uint16_t(3, 14, reg_value);
- *
- * Alternatively, you could "r"emove the 1-bit boolean field (setting it to
- * zero) but leaving all other fields as-is;
- * reg_val = r32_int(19, 1, reg_value);
- *
- */
-#ifdef __LP64__
-#define MAKE_MASK32(width) ((uint32_t)((1ULL << width) - 1))
-#else
-#define MAKE_MASK32(width) (width == 32 ? 0xffffffff : \
- (uint32_t)((1 << width) - 1))
-#endif
-#define DECLARE_CODEC32(t) \
-static inline uint32_t e32_##t(uint32_t lsoffset, uint32_t width, t val) \
-{ \
- QBMAN_BUG_ON(width > (sizeof(t) * 8)); \
- return ((uint32_t)val & MAKE_MASK32(width)) << lsoffset; \
-} \
-static inline t d32_##t(uint32_t lsoffset, uint32_t width, uint32_t val) \
-{ \
- QBMAN_BUG_ON(width > (sizeof(t) * 8)); \
- return (t)((val >> lsoffset) & MAKE_MASK32(width)); \
-} \
-static inline uint32_t i32_##t(uint32_t lsoffset, uint32_t width, \
- uint32_t val) \
-{ \
- QBMAN_BUG_ON(width > (sizeof(t) * 8)); \
- return e32_##t(lsoffset, width, d32_##t(lsoffset, width, val)); \
-} \
-static inline uint32_t r32_##t(uint32_t lsoffset, uint32_t width, \
- uint32_t val) \
-{ \
- QBMAN_BUG_ON(width > (sizeof(t) * 8)); \
- return ~(MAKE_MASK32(width) << lsoffset) & val; \
-}
-DECLARE_CODEC32(uint32_t)
-DECLARE_CODEC32(uint16_t)
-DECLARE_CODEC32(uint8_t)
-DECLARE_CODEC32(int)
-
- /*********************/
- /* Debugging assists */
- /*********************/
-
-static inline void __hexdump(unsigned long start, unsigned long end,
- unsigned long p, size_t sz, const unsigned char *c)
-{
- while (start < end) {
- unsigned int pos = 0;
- char buf[64];
- int nl = 0;
-
- pos += sprintf(buf + pos, "%08lx: ", start);
- do {
- if ((start < p) || (start >= (p + sz)))
- pos += sprintf(buf + pos, "..");
- else
- pos += sprintf(buf + pos, "%02x", *(c++));
- if (!(++start & 15)) {
- buf[pos++] = '\n';
- nl = 1;
- } else {
- nl = 0;
- if (!(start & 1))
- buf[pos++] = ' ';
- if (!(start & 3))
- buf[pos++] = ' ';
- }
- } while (start & 15);
- if (!nl)
- buf[pos++] = '\n';
- buf[pos] = '\0';
- pr_info("%s", buf);
- }
-}
-
-static inline void hexdump(const void *ptr, size_t sz)
-{
- unsigned long p = (unsigned long)ptr;
- unsigned long start = p & ~(unsigned long)15;
- unsigned long end = (p + sz + 15) & ~(unsigned long)15;
- const unsigned char *c = ptr;
-
- __hexdump(start, end, p, sz, c);
-}
-
-#define QMAN_REV_4000 0x04000000
-#define QMAN_REV_4100 0x04010000
-#define QMAN_REV_4101 0x04010001
-
-#include "qbman_sys.h"
diff --git a/drivers/bus/fslmc/qbman/qbman_sys.h b/drivers/bus/fslmc/qbman/qbman_sys.h
index c73d2bf..d56bd69 100644
--- a/drivers/bus/fslmc/qbman/qbman_sys.h
+++ b/drivers/bus/fslmc/qbman/qbman_sys.h
@@ -40,6 +40,8 @@
* *not* to provide linux compatibility.
*/
+#include "qbman_sys_decl.h"
+
/* Trace the 3 different classes of read/write access to QBMan. #undef as
* required.
*/
@@ -47,6 +49,49 @@
#undef QBMAN_CINH_TRACE
#undef QBMAN_CENA_TRACE
+/* Debugging assists */
+static inline void __hexdump(unsigned long start, unsigned long end,
+ unsigned long p, size_t sz, const unsigned char *c)
+{
+ while (start < end) {
+ unsigned int pos = 0;
+ char buf[64];
+ int nl = 0;
+
+ pos += sprintf(buf + pos, "%08lx: ", start);
+ do {
+ if ((start < p) || (start >= (p + sz)))
+ pos += sprintf(buf + pos, "..");
+ else
+ pos += sprintf(buf + pos, "%02x", *(c++));
+ if (!(++start & 15)) {
+ buf[pos++] = '\n';
+ nl = 1;
+ } else {
+ nl = 0;
+ if (!(start & 1))
+ buf[pos++] = ' ';
+ if (!(start & 3))
+ buf[pos++] = ' ';
+ }
+ } while (start & 15);
+ if (!nl)
+ buf[pos++] = '\n';
+ buf[pos] = '\0';
+ pr_info("%s", buf);
+ }
+}
+
+static inline void hexdump(const void *ptr, size_t sz)
+{
+ unsigned long p = (unsigned long)ptr;
+ unsigned long start = p & ~15;
+ unsigned long end = (p + sz + 15) & ~15;
+ const unsigned char *c = ptr;
+
+ __hexdump(start, end, p, sz, c);
+}
+
/* Currently, the CENA support code expects each 32-bit word to be written in
* host order, and these are converted to hardware (little-endian) order on
* command submission. However, 64-bit quantities are must be written (and read)
@@ -94,34 +139,6 @@ static inline void u64_from_le32_copy(uint64_t *d, const void *s,
}
}
-/* Convert a host-native 32bit value into little endian */
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
-static inline uint32_t make_le32(uint32_t val)
-{
- return ((val & 0xff) << 24) | ((val & 0xff00) << 8) |
- ((val & 0xff0000) >> 8) | ((val & 0xff000000) >> 24);
-}
-
-static inline uint32_t make_le24(uint32_t val)
-{
- return (((val & 0xff) << 16) | (val & 0xff00) |
- ((val & 0xff0000) >> 16));
-}
-
-static inline void make_le32_n(uint32_t *val, unsigned int num)
-{
- while (num--) {
- *val = make_le32(*val);
- val++;
- }
-}
-
-#else
-#define make_le32(val) (val)
-#define make_le24(val) (val)
-#define make_le32_n(val, len) do {} while (0)
-#endif
-
/******************/
/* Portal access */
/******************/
@@ -283,20 +300,20 @@ static inline void qbman_cena_prefetch(struct qbman_swp_sys *s,
* qbman_portal.c. So use of it is declared locally here.
*/
#define QBMAN_CINH_SWP_CFG 0xd00
+#define QBMAN_CINH_SWP_CFG 0xd00
+#define SWP_CFG_DQRR_MF_SHIFT 20
+#define SWP_CFG_EST_SHIFT 16
+#define SWP_CFG_WN_SHIFT 14
+#define SWP_CFG_RPM_SHIFT 12
+#define SWP_CFG_DCM_SHIFT 10
+#define SWP_CFG_EPM_SHIFT 8
+#define SWP_CFG_SD_SHIFT 5
+#define SWP_CFG_SP_SHIFT 4
+#define SWP_CFG_SE_SHIFT 3
+#define SWP_CFG_DP_SHIFT 2
+#define SWP_CFG_DE_SHIFT 1
+#define SWP_CFG_EP_SHIFT 0
-/* For MC portal use, we always configure with
- * DQRR_MF is (SWP_CFG,20,3) - DQRR max fill (<- 0x4)
- * EST is (SWP_CFG,16,3) - EQCR_CI stashing threshold (<- 0x2)
- * RPM is (SWP_CFG,12,2) - RCR production notification mode (<- 0x3)
- * DCM is (SWP_CFG,10,2) - DQRR consumption notification mode (<- 0x2)
- * EPM is (SWP_CFG,8,2) - EQCR production notification mode (<- 0x2)
- * SD is (SWP_CFG,5,1) - memory stashing drop enable (<- TRUE)
- * SP is (SWP_CFG,4,1) - memory stashing priority (<- TRUE)
- * SE is (SWP_CFG,3,1) - memory stashing enable (<- TRUE)
- * DP is (SWP_CFG,2,1) - dequeue stashing priority (<- TRUE)
- * DE is (SWP_CFG,1,1) - dequeue stashing enable (<- TRUE)
- * EP is (SWP_CFG,0,1) - EQCR_CI stashing priority (<- TRUE)
- */
static inline uint32_t qbman_set_swp_cfg(uint8_t max_fill, uint8_t wn,
uint8_t est, uint8_t rpm, uint8_t dcm,
uint8_t epm, int sd, int sp, int se,
@@ -304,12 +321,19 @@ static inline uint32_t qbman_set_swp_cfg(uint8_t max_fill, uint8_t wn,
{
uint32_t reg;
- reg = e32_uint8_t(20, (uint32_t)(3 + (max_fill >> 3)), max_fill) |
- e32_uint8_t(16, 3, est) |
- e32_uint8_t(12, 2, rpm) | e32_uint8_t(10, 2, dcm) |
- e32_uint8_t(8, 2, epm) | e32_int(5, 1, sd) |
- e32_int(4, 1, sp) | e32_int(3, 1, se) | e32_int(2, 1, dp) |
- e32_int(1, 1, de) | e32_int(0, 1, ep) | e32_uint8_t(14, 1, wn);
+ reg = (max_fill << SWP_CFG_DQRR_MF_SHIFT |
+ est << SWP_CFG_EST_SHIFT |
+ wn << SWP_CFG_WN_SHIFT |
+ rpm << SWP_CFG_RPM_SHIFT |
+ dcm << SWP_CFG_DCM_SHIFT |
+ epm << SWP_CFG_EPM_SHIFT |
+ sd << SWP_CFG_SD_SHIFT |
+ sp << SWP_CFG_SP_SHIFT |
+ se << SWP_CFG_SE_SHIFT |
+ dp << SWP_CFG_DP_SHIFT |
+ de << SWP_CFG_DE_SHIFT |
+ ep << SWP_CFG_EP_SHIFT);
+
return reg;
}
@@ -322,7 +346,7 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,
s->addr_cena = d->cena_bar;
s->addr_cinh = d->cinh_bar;
s->idx = (uint32_t)d->idx;
- s->cena = (void *)get_zeroed_page(GFP_KERNEL);
+ s->cena = malloc(4096);
if (!s->cena) {
pr_err("Could not allocate page for cena shadow\n");
return -1;
@@ -347,7 +371,7 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,
reg = qbman_cinh_read(s, QBMAN_CINH_SWP_CFG);
if (!reg) {
pr_err("The portal %d is not enabled!\n", s->idx);
- kfree(s->cena);
+ free(s->cena);
return -1;
}
return 0;
@@ -355,5 +379,5 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,
static inline void qbman_swp_sys_finish(struct qbman_swp_sys *s)
{
- free_page((unsigned long)s->cena);
+ free(s->cena);
}
diff --git a/drivers/bus/fslmc/qbman/qbman_sys_decl.h b/drivers/bus/fslmc/qbman/qbman_sys_decl.h
index e52f5ed..e1125cf 100644
--- a/drivers/bus/fslmc/qbman/qbman_sys_decl.h
+++ b/drivers/bus/fslmc/qbman/qbman_sys_decl.h
@@ -34,27 +34,6 @@
#error "Unknown endianness!"
#endif
-/* The platform-independent code shouldn't need endianness, except for
- * weird/fast-path cases like qbman_result_has_token(), which needs to
- * perform a passive and endianness-specific test on a read-only data structure
- * very quickly. It's an exception, and this symbol is used for that case.
- */
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
-#define DQRR_TOK_OFFSET 0
-#define QBMAN_RESULT_VERB_OFFSET_IN_MEM 24
-#define SCN_STATE_OFFSET_IN_MEM 8
-#define SCN_RID_OFFSET_IN_MEM 8
-#else
-#define DQRR_TOK_OFFSET 24
-#define QBMAN_RESULT_VERB_OFFSET_IN_MEM 0
-#define SCN_STATE_OFFSET_IN_MEM 16
-#define SCN_RID_OFFSET_IN_MEM 0
-#endif
-
-/* Similarly-named functions */
-#define upper32(a) upper_32_bits(a)
-#define lower32(a) lower_32_bits(a)
-
/****************/
/* arch assists */
/****************/
@@ -64,10 +43,10 @@
#define dccivac(p) { asm volatile("dc civac, %0" : : "r"(p) : "memory"); }
static inline void prefetch_for_load(void *p)
{
- asm volatile("prfm pldl1keep, [%0, #64]" : : "r" (p));
+ asm volatile("prfm pldl1keep, [%0, #0]" : : "r" (p));
}
static inline void prefetch_for_store(void *p)
{
- asm volatile("prfm pstl1keep, [%0, #64]" : : "r" (p));
+ asm volatile("prfm pstl1keep, [%0, #0]" : : "r" (p));
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 09/30] bus/fslmc: update MC to 10.3.x
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (7 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 08/30] bus/fslmc: clean the qbman support code Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 10/30] net/dpaa2: " Hemant Agrawal
` (21 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Shreyansh Jain <shreyansh.jain@nxp.com>
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/fslmc_vfio.c | 19 +++
drivers/bus/fslmc/mc/dpbp.c | 182 +++++++++++++++++----
drivers/bus/fslmc/mc/dpci.c | 202 ++++++++++++++++++++---
drivers/bus/fslmc/mc/dpcon.c | 163 ++++++++++++++++---
drivers/bus/fslmc/mc/dpio.c | 230 ++++++++++++++++++++++++---
drivers/bus/fslmc/mc/dpmng.c | 33 +++-
drivers/bus/fslmc/mc/fsl_dpbp.h | 191 +++++-----------------
drivers/bus/fslmc/mc/fsl_dpbp_cmd.h | 125 ++++++++++-----
drivers/bus/fslmc/mc/fsl_dpci.h | 257 +++++++-----------------------
drivers/bus/fslmc/mc/fsl_dpci_cmd.h | 222 ++++++++++++++------------
drivers/bus/fslmc/mc/fsl_dpcon.h | 186 ++++------------------
drivers/bus/fslmc/mc/fsl_dpcon_cmd.h | 193 ++++++++--------------
drivers/bus/fslmc/mc/fsl_dpio.h | 299 +++++++++--------------------------
drivers/bus/fslmc/mc/fsl_dpio_cmd.h | 178 ++++++++++++---------
drivers/bus/fslmc/mc/fsl_dpmng.h | 41 ++---
drivers/bus/fslmc/mc/fsl_dpmng_cmd.h | 41 +++--
drivers/bus/fslmc/mc/fsl_mc_cmd.h | 217 +++++++++++--------------
drivers/bus/fslmc/mc/fsl_mc_sys.h | 36 ++---
drivers/bus/fslmc/mc/mc_sys.c | 5 +-
19 files changed, 1452 insertions(+), 1368 deletions(-)
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index 42a99e8..cdc982b 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -58,6 +58,7 @@
#include "rte_fslmc.h"
#include "fslmc_vfio.h"
+#include <mc/fsl_dpmng.h>
#include "portal/dpaa2_hw_pvt.h"
#include "portal/dpaa2_hw_dpio.h"
@@ -417,6 +418,8 @@ fslmc_process_mcp(struct rte_dpaa2_device *dev)
{
int64_t v_addr;
char *dev_name;
+ struct fsl_mc_io dpmng = {0};
+ struct mc_version mc_ver_info = {0};
rte_mcp_ptr_list = malloc(sizeof(void *) * 1);
if (!rte_mcp_ptr_list) {
@@ -441,6 +444,22 @@ fslmc_process_mcp(struct rte_dpaa2_device *dev)
return -1;
}
+ /* check the MC version compatibility */
+ dpmng.regs = (void *)v_addr;
+ if (mc_get_version(&dpmng, CMD_PRI_LOW, &mc_ver_info))
+ RTE_LOG(WARNING, PMD, "\tmc_get_version failed\n");
+
+ if ((mc_ver_info.major != MC_VER_MAJOR) ||
+ (mc_ver_info.minor < MC_VER_MINOR)) {
+ RTE_LOG(ERR, PMD, "DPAA2 MC version not compatible!"
+ " Expected %d.%d.x, Detected %d.%d.%d\n",
+ MC_VER_MAJOR, MC_VER_MINOR,
+ mc_ver_info.major, mc_ver_info.minor,
+ mc_ver_info.revision);
+ free(rte_mcp_ptr_list);
+ rte_mcp_ptr_list = NULL;
+ return -1;
+ }
rte_mcp_ptr_list[0] = (void *)v_addr;
return 0;
diff --git a/drivers/bus/fslmc/mc/dpbp.c b/drivers/bus/fslmc/mc/dpbp.c
index fd9a52d..a846245 100644
--- a/drivers/bus/fslmc/mc/dpbp.c
+++ b/drivers/bus/fslmc/mc/dpbp.c
@@ -5,7 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP.
+ * Copyright 2016-2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -42,19 +42,37 @@
#include <fsl_dpbp.h>
#include <fsl_dpbp_cmd.h>
+/**
+ * dpbp_open() - Open a control session for the specified object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @dpbp_id: DPBP unique ID
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpbp_create function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpbp_open(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
int dpbp_id,
uint16_t *token)
{
+ struct dpbp_cmd_open *cmd_params;
struct mc_command cmd = { 0 };
int err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPBP_CMDID_OPEN,
- cmd_flags,
- 0);
- DPBP_CMD_OPEN(cmd, dpbp_id);
+ cmd_flags, 0);
+ cmd_params = (struct dpbp_cmd_open *)cmd.params;
+ cmd_params->dpbp_id = cpu_to_le32(dpbp_id);
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -62,11 +80,22 @@ int dpbp_open(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+ *token = mc_cmd_hdr_read_token(&cmd);
return err;
}
+/**
+ * dpbp_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPBP object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpbp_close(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -81,6 +110,24 @@ int dpbp_close(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpbp_create() - Create the DPBP object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token: Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @cfg: Configuration structure
+ * @obj_id: Returned object id; use in subsequent API calls
+ *
+ * Create the DPBP object, allocate required resources and
+ * perform required initialization.
+ *
+ * This function accepts an authentication token of a parent
+ * container that this object should be assigned to and returns
+ * an object id. This object_id will be used in all subsequent calls to
+ * this specific object.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpbp_create(struct fsl_mc_io *mc_io,
uint16_t dprc_token,
uint32_t cmd_flags,
@@ -94,8 +141,7 @@ int dpbp_create(struct fsl_mc_io *mc_io,
/* prepare command */
cmd.header = mc_encode_cmd_header(DPBP_CMDID_CREATE,
- cmd_flags,
- dprc_token);
+ cmd_flags, dprc_token);
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -103,28 +149,47 @@ int dpbp_create(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- CMD_CREATE_RSP_GET_OBJ_ID_PARAM0(cmd, *obj_id);
+ *obj_id = mc_cmd_read_object_id(&cmd);
return 0;
}
+/**
+ * dpbp_destroy() - Destroy the DPBP object and release all its resources.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token: Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @obj_id: ID of DPBP object
+ *
+ * Return: '0' on Success; error code otherwise.
+ */
int dpbp_destroy(struct fsl_mc_io *mc_io,
uint16_t dprc_token,
- uint32_t cmd_flags,
- uint32_t object_id)
+ uint32_t cmd_flags,
+ uint32_t obj_id)
{
+ struct dpbp_cmd_destroy *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPBP_CMDID_DESTROY,
- cmd_flags,
- dprc_token);
- /* set object id to destroy */
- CMD_DESTROY_SET_OBJ_ID_PARAM0(cmd, object_id);
+ cmd_flags, dprc_token);
+
+ cmd_params = (struct dpbp_cmd_destroy *)cmd.params;
+ cmd_params->object_id = cpu_to_le32(obj_id);
+
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpbp_enable() - Enable the DPBP.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPBP object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpbp_enable(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -139,6 +204,14 @@ int dpbp_enable(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpbp_disable() - Disable the DPBP.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPBP object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpbp_disable(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -147,20 +220,30 @@ int dpbp_disable(struct fsl_mc_io *mc_io,
/* prepare command */
cmd.header = mc_encode_cmd_header(DPBP_CMDID_DISABLE,
- cmd_flags,
- token);
+ cmd_flags, token);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpbp_is_enabled() - Check if the DPBP is enabled.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPBP object
+ * @en: Returns '1' if object is enabled; '0' otherwise
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpbp_is_enabled(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
int *en)
{
+ struct dpbp_rsp_is_enabled *rsp_params;
struct mc_command cmd = { 0 };
int err;
+
/* prepare command */
cmd.header = mc_encode_cmd_header(DPBP_CMDID_IS_ENABLED, cmd_flags,
token);
@@ -171,11 +254,20 @@ int dpbp_is_enabled(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPBP_RSP_IS_ENABLED(cmd, *en);
+ rsp_params = (struct dpbp_rsp_is_enabled *)cmd.params;
+ *en = rsp_params->enabled & DPBP_ENABLE;
return 0;
}
+/**
+ * dpbp_reset() - Reset the DPBP, returns the object to initial state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPBP object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpbp_reset(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -184,8 +276,7 @@ int dpbp_reset(struct fsl_mc_io *mc_io,
/* prepare command */
cmd.header = mc_encode_cmd_header(DPBP_CMDID_RESET,
- cmd_flags,
- token);
+ cmd_flags, token);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
@@ -195,13 +286,13 @@ int dpbp_get_attributes(struct fsl_mc_io *mc_io,
uint16_t token,
struct dpbp_attr *attr)
{
+ struct dpbp_rsp_get_attributes *rsp_params;
struct mc_command cmd = { 0 };
int err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_ATTR,
- cmd_flags,
- token);
+ cmd_flags, token);
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -209,38 +300,64 @@ int dpbp_get_attributes(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPBP_RSP_GET_ATTRIBUTES(cmd, attr);
+ rsp_params = (struct dpbp_rsp_get_attributes *)cmd.params;
+ attr->bpid = le16_to_cpu(rsp_params->bpid);
+ attr->id = le32_to_cpu(rsp_params->id);
return 0;
}
-
+/**
+ * dpbp_get_api_version - Get Data Path Buffer Pool API version
+ * @mc_io: Pointer to Mc portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @major_ver: Major version of Buffer Pool API
+ * @minor_ver: Minor version of Buffer Pool API
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpbp_get_api_version(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
- uint16_t *major_ver,
- uint16_t *minor_ver)
+ uint16_t *major_ver,
+ uint16_t *minor_ver)
{
+ struct dpbp_rsp_get_api_version *rsp_params;
struct mc_command cmd = { 0 };
int err;
+ /* prepare command */
cmd.header = mc_encode_cmd_header(DPBP_CMDID_GET_API_VERSION,
- cmd_flags,
- 0);
+ cmd_flags, 0);
+ /* send command to mc */
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
- DPBP_RSP_GET_API_VERSION(cmd, *major_ver, *minor_ver);
+ /* retrieve response parameters */
+ rsp_params = (struct dpbp_rsp_get_api_version *)cmd.params;
+ *major_ver = le16_to_cpu(rsp_params->major);
+ *minor_ver = le16_to_cpu(rsp_params->minor);
return 0;
}
-int dpbp_get_num_free_bufs(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
+/**
+ * dpbp_get_num_free_bufs() - Get number of free buffers in the buffer pool
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPBP object
+ * @num_free_bufs: Number of free buffers
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+
+int dpbp_get_num_free_bufs(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
uint32_t *num_free_bufs)
{
+ struct dpbp_rsp_get_num_free_bufs *rsp_params;
struct mc_command cmd = { 0 };
int err;
@@ -255,7 +372,8 @@ int dpbp_get_num_free_bufs(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPBP_RSP_GET_NUM_FREE_BUFS(cmd, *num_free_bufs);
+ rsp_params = (struct dpbp_rsp_get_num_free_bufs *)cmd.params;
+ *num_free_bufs = le32_to_cpu(rsp_params->num_free_bufs);
return 0;
}
diff --git a/drivers/bus/fslmc/mc/dpci.c b/drivers/bus/fslmc/mc/dpci.c
index 0ea7837..5471024 100644
--- a/drivers/bus/fslmc/mc/dpci.c
+++ b/drivers/bus/fslmc/mc/dpci.c
@@ -41,11 +41,29 @@
#include <fsl_dpci.h>
#include <fsl_dpci_cmd.h>
+/**
+ * dpci_open() - Open a control session for the specified object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @dpci_id: DPCI unique ID
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpci_create() function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpci_open(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
int dpci_id,
uint16_t *token)
{
+ struct dpci_cmd_open *cmd_params;
struct mc_command cmd = { 0 };
int err;
@@ -53,7 +71,8 @@ int dpci_open(struct fsl_mc_io *mc_io,
cmd.header = mc_encode_cmd_header(DPCI_CMDID_OPEN,
cmd_flags,
0);
- DPCI_CMD_OPEN(cmd, dpci_id);
+ cmd_params = (struct dpci_cmd_open *)cmd.params;
+ cmd_params->dpci_id = cpu_to_le32(dpci_id);
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -61,11 +80,22 @@ int dpci_open(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+ *token = mc_cmd_hdr_read_token(&cmd);
return 0;
}
+/**
+ * dpci_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPCI object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpci_close(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -81,12 +111,35 @@ int dpci_close(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpci_create() - Create the DPCI object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token: Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @cfg: Configuration structure
+ * @obj_id: Returned object id
+ *
+ * Create the DPCI object, allocate required resources and perform required
+ * initialization.
+ *
+ * The object can be created either by declaring it in the
+ * DPL file, or by calling this function.
+ *
+ * The function accepts an authentication token of a parent
+ * container that this object should be assigned to. The token
+ * can be '0' so the object will be assigned to the default container.
+ * The newly created object can be opened with the returned
+ * object id and using the container's associated tokens and MC portals.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpci_create(struct fsl_mc_io *mc_io,
uint16_t dprc_token,
uint32_t cmd_flags,
const struct dpci_cfg *cfg,
uint32_t *obj_id)
{
+ struct dpci_cmd_create *cmd_params;
struct mc_command cmd = { 0 };
int err;
@@ -94,7 +147,8 @@ int dpci_create(struct fsl_mc_io *mc_io,
cmd.header = mc_encode_cmd_header(DPCI_CMDID_CREATE,
cmd_flags,
dprc_token);
- DPCI_CMD_CREATE(cmd, cfg);
+ cmd_params = (struct dpci_cmd_create *)cmd.params;
+ cmd_params->num_of_priorities = cfg->num_of_priorities;
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -102,28 +156,53 @@ int dpci_create(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- CMD_CREATE_RSP_GET_OBJ_ID_PARAM0(cmd, *obj_id);
+ *obj_id = mc_cmd_read_object_id(&cmd);
return 0;
}
+/**
+ * dpci_destroy() - Destroy the DPCI object and release all its resources.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token: Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @object_id: The object id; it must be a valid id within the container that
+ * created this object;
+ *
+ * The function accepts the authentication token of the parent container that
+ * created the object (not the one that currently owns the object). The object
+ * is searched within parent using the provided 'object_id'.
+ * All tokens to the object must be closed before calling destroy.
+ *
+ * Return: '0' on Success; error code otherwise.
+ */
int dpci_destroy(struct fsl_mc_io *mc_io,
uint16_t dprc_token,
- uint32_t cmd_flags,
- uint32_t object_id)
+ uint32_t cmd_flags,
+ uint32_t object_id)
{
+ struct dpci_cmd_destroy *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPCI_CMDID_DESTROY,
cmd_flags,
dprc_token);
- /* set object id to destroy */
- CMD_DESTROY_SET_OBJ_ID_PARAM0(cmd, object_id);
+ cmd_params = (struct dpci_cmd_destroy *)cmd.params;
+ cmd_params->dpci_id = cpu_to_le32(object_id);
+
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpci_enable() - Enable the DPCI, allow sending and receiving frames.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPCI object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpci_enable(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -139,6 +218,14 @@ int dpci_enable(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpci_disable() - Disable the DPCI, stop sending and receiving frames.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPCI object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpci_disable(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -154,13 +241,24 @@ int dpci_disable(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpci_is_enabled() - Check if the DPCI is enabled.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPCI object
+ * @en: Returns '1' if object is enabled; '0' otherwise
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpci_is_enabled(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
int *en)
{
+ struct dpci_rsp_is_enabled *rsp_params;
struct mc_command cmd = { 0 };
int err;
+
/* prepare command */
cmd.header = mc_encode_cmd_header(DPCI_CMDID_IS_ENABLED, cmd_flags,
token);
@@ -171,11 +269,20 @@ int dpci_is_enabled(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPCI_RSP_IS_ENABLED(cmd, *en);
+ rsp_params = (struct dpci_rsp_is_enabled *)cmd.params;
+ *en = dpci_get_field(rsp_params->en, ENABLE);
return 0;
}
+/**
+ * dpci_reset() - Reset the DPCI, returns the object to initial state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPCI object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpci_reset(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -196,6 +303,7 @@ int dpci_get_attributes(struct fsl_mc_io *mc_io,
uint16_t token,
struct dpci_attr *attr)
{
+ struct dpci_rsp_get_attr *rsp_params;
struct mc_command cmd = { 0 };
int err;
@@ -210,7 +318,9 @@ int dpci_get_attributes(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPCI_RSP_GET_ATTRIBUTES(cmd, attr);
+ rsp_params = (struct dpci_rsp_get_attr *)cmd.params;
+ attr->id = le32_to_cpu(rsp_params->id);
+ attr->num_of_priorities = rsp_params->num_of_priorities;
return 0;
}
@@ -221,24 +331,46 @@ int dpci_set_rx_queue(struct fsl_mc_io *mc_io,
uint8_t priority,
const struct dpci_rx_queue_cfg *cfg)
{
+ struct dpci_cmd_set_rx_queue *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPCI_CMDID_SET_RX_QUEUE,
cmd_flags,
token);
- DPCI_CMD_SET_RX_QUEUE(cmd, priority, cfg);
+ cmd_params = (struct dpci_cmd_set_rx_queue *)cmd.params;
+ cmd_params->dest_id = cpu_to_le32(cfg->dest_cfg.dest_id);
+ cmd_params->dest_priority = cfg->dest_cfg.priority;
+ cmd_params->priority = priority;
+ cmd_params->user_ctx = cpu_to_le64(cfg->user_ctx);
+ cmd_params->options = cpu_to_le32(cfg->options);
+ dpci_set_field(cmd_params->dest_type,
+ DEST_TYPE,
+ cfg->dest_cfg.dest_type);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpci_get_rx_queue() - Retrieve Rx queue attributes.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPCI object
+ * @priority: Select the queue relative to number of
+ * priorities configured at DPCI creation
+ * @attr: Returned Rx queue attributes
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpci_get_rx_queue(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
uint8_t priority,
struct dpci_rx_queue_attr *attr)
{
+ struct dpci_cmd_get_queue *cmd_params;
+ struct dpci_rsp_get_rx_queue *rsp_params;
struct mc_command cmd = { 0 };
int err;
@@ -246,7 +378,8 @@ int dpci_get_rx_queue(struct fsl_mc_io *mc_io,
cmd.header = mc_encode_cmd_header(DPCI_CMDID_GET_RX_QUEUE,
cmd_flags,
token);
- DPCI_CMD_GET_RX_QUEUE(cmd, priority);
+ cmd_params = (struct dpci_cmd_get_queue *)cmd.params;
+ cmd_params->priority = priority;
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -254,17 +387,36 @@ int dpci_get_rx_queue(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPCI_RSP_GET_RX_QUEUE(cmd, attr);
+ rsp_params = (struct dpci_rsp_get_rx_queue *)cmd.params;
+ attr->user_ctx = le64_to_cpu(rsp_params->user_ctx);
+ attr->fqid = le32_to_cpu(rsp_params->fqid);
+ attr->dest_cfg.dest_id = le32_to_cpu(rsp_params->dest_id);
+ attr->dest_cfg.priority = rsp_params->dest_priority;
+ attr->dest_cfg.dest_type = dpci_get_field(rsp_params->dest_type,
+ DEST_TYPE);
return 0;
}
+/**
+ * dpci_get_tx_queue() - Retrieve Tx queue attributes.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPCI object
+ * @priority: Select the queue relative to number of
+ * priorities of the peer DPCI object
+ * @attr: Returned Tx queue attributes
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpci_get_tx_queue(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
uint8_t priority,
struct dpci_tx_queue_attr *attr)
{
+ struct dpci_cmd_get_queue *cmd_params;
+ struct dpci_rsp_get_tx_queue *rsp_params;
struct mc_command cmd = { 0 };
int err;
@@ -272,7 +424,8 @@ int dpci_get_tx_queue(struct fsl_mc_io *mc_io,
cmd.header = mc_encode_cmd_header(DPCI_CMDID_GET_TX_QUEUE,
cmd_flags,
token);
- DPCI_CMD_GET_TX_QUEUE(cmd, priority);
+ cmd_params = (struct dpci_cmd_get_queue *)cmd.params;
+ cmd_params->priority = priority;
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -280,16 +433,27 @@ int dpci_get_tx_queue(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPCI_RSP_GET_TX_QUEUE(cmd, attr);
+ rsp_params = (struct dpci_rsp_get_tx_queue *)cmd.params;
+ attr->fqid = le32_to_cpu(rsp_params->fqid);
return 0;
}
+/**
+ * dpci_get_api_version() - Get communication interface API version
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @major_ver: Major version of data path communication interface API
+ * @minor_ver: Minor version of data path communication interface API
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpci_get_api_version(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
- uint16_t *major_ver,
- uint16_t *minor_ver)
+ uint16_t *major_ver,
+ uint16_t *minor_ver)
{
+ struct dpci_rsp_get_api_version *rsp_params;
struct mc_command cmd = { 0 };
int err;
@@ -301,7 +465,9 @@ int dpci_get_api_version(struct fsl_mc_io *mc_io,
if (err)
return err;
- DPCI_RSP_GET_API_VERSION(cmd, *major_ver, *minor_ver);
+ rsp_params = (struct dpci_rsp_get_api_version *)cmd.params;
+ *major_ver = le16_to_cpu(rsp_params->major);
+ *minor_ver = le16_to_cpu(rsp_params->minor);
return 0;
}
diff --git a/drivers/bus/fslmc/mc/dpcon.c b/drivers/bus/fslmc/mc/dpcon.c
index b078dff..477ee46 100644
--- a/drivers/bus/fslmc/mc/dpcon.c
+++ b/drivers/bus/fslmc/mc/dpcon.c
@@ -34,19 +34,38 @@
#include <fsl_dpcon.h>
#include <fsl_dpcon_cmd.h>
+/**
+ * dpcon_open() - Open a control session for the specified object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @dpcon_id: DPCON unique ID
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpcon_create() function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpcon_open(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
int dpcon_id,
uint16_t *token)
{
struct mc_command cmd = { 0 };
+ struct dpcon_cmd_open *dpcon_cmd;
int err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPCON_CMDID_OPEN,
cmd_flags,
0);
- DPCON_CMD_OPEN(cmd, dpcon_id);
+ dpcon_cmd = (struct dpcon_cmd_open *)cmd.params;
+ dpcon_cmd->dpcon_id = cpu_to_le32(dpcon_id);
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -54,11 +73,22 @@ int dpcon_open(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+ *token = mc_cmd_hdr_read_token(&cmd);
return 0;
}
+/**
+ * dpcon_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPCON object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpcon_close(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -74,12 +104,34 @@ int dpcon_close(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpcon_create() - Create the DPCON object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token: Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @cfg: Configuration structure
+ * @obj_id: Returned object id; use in subsequent API calls
+ *
+ * Create the DPCON object, allocate required resources and
+ * perform required initialization.
+ *
+ * The object can be created either by declaring it in the
+ * DPL file, or by calling this function.
+ *
+ * This function accepts an authentication token of a parent
+ * container that this object should be assigned to and returns
+ * an object id. This object_id will be used in all subsequent calls to
+ * this specific object.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpcon_create(struct fsl_mc_io *mc_io,
uint16_t dprc_token,
- uint32_t cmd_flags,
- const struct dpcon_cfg *cfg,
- uint32_t *obj_id)
+ uint32_t cmd_flags,
+ const struct dpcon_cfg *cfg,
+ uint32_t *obj_id)
{
+ struct dpcon_cmd_create *dpcon_cmd;
struct mc_command cmd = { 0 };
int err;
@@ -87,7 +139,8 @@ int dpcon_create(struct fsl_mc_io *mc_io,
cmd.header = mc_encode_cmd_header(DPCON_CMDID_CREATE,
cmd_flags,
dprc_token);
- DPCON_CMD_CREATE(cmd, cfg);
+ dpcon_cmd = (struct dpcon_cmd_create *)cmd.params;
+ dpcon_cmd->num_priorities = cfg->num_priorities;
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -95,28 +148,47 @@ int dpcon_create(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- CMD_CREATE_RSP_GET_OBJ_ID_PARAM0(cmd, *obj_id);
+ *obj_id = mc_cmd_read_object_id(&cmd);
return 0;
}
+/**
+ * dpcon_destroy() - Destroy the DPCON object and release all its resources.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token: Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @obj_id: ID of DPCON object
+ *
+ * Return: '0' on Success; error code otherwise.
+ */
int dpcon_destroy(struct fsl_mc_io *mc_io,
uint16_t dprc_token,
- uint32_t cmd_flags,
- uint32_t object_id)
+ uint32_t cmd_flags,
+ uint32_t obj_id)
{
+ struct dpcon_cmd_destroy *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPCON_CMDID_DESTROY,
cmd_flags,
dprc_token);
- /* set object id to destroy */
- CMD_DESTROY_SET_OBJ_ID_PARAM0(cmd, object_id);
+ cmd_params = (struct dpcon_cmd_destroy *)cmd.params;
+ cmd_params->object_id = cpu_to_le32(obj_id);
+
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpcon_enable() - Enable the DPCON
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPCON object
+ *
+ * Return: '0' on Success; Error code otherwise
+ */
int dpcon_enable(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -132,6 +204,14 @@ int dpcon_enable(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpcon_disable() - Disable the DPCON
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPCON object
+ *
+ * Return: '0' on Success; Error code otherwise
+ */
int dpcon_disable(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -147,13 +227,24 @@ int dpcon_disable(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpcon_is_enabled() - Check if the DPCON is enabled.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPCON object
+ * @en: Returns '1' if object is enabled; '0' otherwise
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpcon_is_enabled(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
int *en)
{
+ struct dpcon_rsp_is_enabled *dpcon_rsp;
struct mc_command cmd = { 0 };
int err;
+
/* prepare command */
cmd.header = mc_encode_cmd_header(DPCON_CMDID_IS_ENABLED,
cmd_flags,
@@ -165,11 +256,20 @@ int dpcon_is_enabled(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPCON_RSP_IS_ENABLED(cmd, *en);
+ dpcon_rsp = (struct dpcon_rsp_is_enabled *)cmd.params;
+ *en = dpcon_rsp->enabled & DPCON_ENABLE;
return 0;
}
+/**
+ * dpcon_reset() - Reset the DPCON, returns the object to initial state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPCON object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpcon_reset(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -184,11 +284,21 @@ int dpcon_reset(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpcon_get_attributes() - Retrieve DPCON attributes.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPCON object
+ * @attr: Object's attributes
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpcon_get_attributes(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
struct dpcon_attr *attr)
{
+ struct dpcon_rsp_get_attr *dpcon_rsp;
struct mc_command cmd = { 0 };
int err;
@@ -203,28 +313,45 @@ int dpcon_get_attributes(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPCON_RSP_GET_ATTR(cmd, attr);
+ dpcon_rsp = (struct dpcon_rsp_get_attr *)cmd.params;
+ attr->id = le32_to_cpu(dpcon_rsp->id);
+ attr->qbman_ch_id = le16_to_cpu(dpcon_rsp->qbman_ch_id);
+ attr->num_priorities = dpcon_rsp->num_priorities;
return 0;
}
+/**
+ * dpcon_get_api_version - Get Data Path Concentrator API version
+ * @mc_io: Pointer to MC portal's DPCON object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @major_ver: Major version of DPCON API
+ * @minor_ver: Minor version of DPCON API
+ *
+ * Return: '0' on Success; Error code otherwise
+ */
int dpcon_get_api_version(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
- uint16_t *major_ver,
- uint16_t *minor_ver)
+ uint16_t *major_ver,
+ uint16_t *minor_ver)
{
+ struct dpcon_rsp_get_api_version *rsp_params;
struct mc_command cmd = { 0 };
int err;
+ /* prepare command */
cmd.header = mc_encode_cmd_header(DPCON_CMDID_GET_API_VERSION,
- cmd_flags,
- 0);
+ cmd_flags, 0);
+ /* send command to mc */
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
- DPCON_RSP_GET_API_VERSION(cmd, *major_ver, *minor_ver);
+ /* retrieve response parameters */
+ rsp_params = (struct dpcon_rsp_get_api_version *)cmd.params;
+ *major_ver = le16_to_cpu(rsp_params->major);
+ *minor_ver = le16_to_cpu(rsp_params->minor);
return 0;
}
diff --git a/drivers/bus/fslmc/mc/dpio.c b/drivers/bus/fslmc/mc/dpio.c
index 608b57a..76c5d7b 100644
--- a/drivers/bus/fslmc/mc/dpio.c
+++ b/drivers/bus/fslmc/mc/dpio.c
@@ -5,7 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP.
+ * Copyright 2016-2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -42,11 +42,29 @@
#include <fsl_dpio.h>
#include <fsl_dpio_cmd.h>
+/**
+ * dpio_open() - Open a control session for the specified object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @dpio_id: DPIO unique ID
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpio_create() function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and any MC portals
+ * assigned to the parent container; this token must be used in
+ * all subsequent commands for this specific object.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpio_open(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
int dpio_id,
uint16_t *token)
{
+ struct dpio_cmd_open *cmd_params;
struct mc_command cmd = { 0 };
int err;
@@ -54,7 +72,8 @@ int dpio_open(struct fsl_mc_io *mc_io,
cmd.header = mc_encode_cmd_header(DPIO_CMDID_OPEN,
cmd_flags,
0);
- DPIO_CMD_OPEN(cmd, dpio_id);
+ cmd_params = (struct dpio_cmd_open *)cmd.params;
+ cmd_params->dpio_id = cpu_to_le32(dpio_id);
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -62,11 +81,19 @@ int dpio_open(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+ *token = mc_cmd_hdr_read_token(&cmd);
return 0;
}
+/**
+ * dpio_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPIO object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpio_close(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -82,12 +109,35 @@ int dpio_close(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
-int dpio_create(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- const struct dpio_cfg *cfg,
- uint32_t *obj_id)
+/**
+ * dpio_create() - Create the DPIO object.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token: Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @cfg: Configuration structure
+ * @obj_id: Returned object id
+ *
+ * Create the DPIO object, allocate required resources and
+ * perform required initialization.
+ *
+ * The object can be created either by declaring it in the
+ * DPL file, or by calling this function.
+ *
+ * The function accepts an authentication token of a parent
+ * container that this object should be assigned to. The token
+ * can be '0' so the object will be assigned to the default container.
+ * The newly created object can be opened with the returned
+ * object id and using the container's associated tokens and MC portals.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpio_create(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ const struct dpio_cfg *cfg,
+ uint32_t *obj_id)
{
+ struct dpio_cmd_create *cmd_params;
struct mc_command cmd = { 0 };
int err;
@@ -95,7 +145,11 @@ int dpio_create(struct fsl_mc_io *mc_io,
cmd.header = mc_encode_cmd_header(DPIO_CMDID_CREATE,
cmd_flags,
dprc_token);
- DPIO_CMD_CREATE(cmd, cfg);
+ cmd_params = (struct dpio_cmd_create *)cmd.params;
+ cmd_params->num_priorities = cfg->num_priorities;
+ dpio_set_field(cmd_params->channel_mode,
+ CHANNEL_MODE,
+ cfg->channel_mode);
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -103,28 +157,55 @@ int dpio_create(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- CMD_CREATE_RSP_GET_OBJ_ID_PARAM0(cmd, *obj_id);
+ *obj_id = mc_cmd_read_object_id(&cmd);
return 0;
}
-int dpio_destroy(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- uint32_t object_id)
+/**
+ * dpio_destroy() - Destroy the DPIO object and release all its resources.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token: Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @object_id: The object id; it must be a valid id within the container that
+ * created this object;
+ *
+ * The function accepts the authentication token of the parent container that
+ * created the object (not the one that currently owns the object). The object
+ * is searched within parent using the provided 'object_id'.
+ * All tokens to the object must be closed before calling destroy.
+ *
+ * Return: '0' on Success; Error code otherwise
+ */
+int dpio_destroy(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ uint32_t object_id)
{
+ struct dpio_cmd_destroy *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPIO_CMDID_DESTROY,
cmd_flags,
dprc_token);
+
/* set object id to destroy */
- CMD_DESTROY_SET_OBJ_ID_PARAM0(cmd, object_id);
+ cmd_params = (struct dpio_cmd_destroy *)cmd.params;
+ cmd_params->dpio_id = cpu_to_le32(object_id);
+
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpio_enable() - Enable the DPIO, allow I/O portal operations.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPIO object
+ *
+ * Return: '0' on Success; Error code otherwise
+ */
int dpio_enable(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -140,6 +221,14 @@ int dpio_enable(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpio_disable() - Disable the DPIO, stop any I/O portal operation.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPIO object
+ *
+ * Return: '0' on Success; Error code otherwise
+ */
int dpio_disable(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -155,13 +244,24 @@ int dpio_disable(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpio_is_enabled() - Check if the DPIO is enabled.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPIO object
+ * @en: Returns '1' if object is enabled; '0' otherwise
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpio_is_enabled(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
int *en)
{
+ struct dpio_rsp_is_enabled *rsp_params;
struct mc_command cmd = { 0 };
int err;
+
/* prepare command */
cmd.header = mc_encode_cmd_header(DPIO_CMDID_IS_ENABLED, cmd_flags,
token);
@@ -172,11 +272,20 @@ int dpio_is_enabled(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPIO_RSP_IS_ENABLED(cmd, *en);
+ rsp_params = (struct dpio_rsp_is_enabled *)cmd.params;
+ *en = dpio_get_field(rsp_params->en, ENABLE);
return 0;
}
+/**
+ * dpio_reset() - Reset the DPIO, returns the object to initial state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPIO object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpio_reset(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -197,6 +306,7 @@ int dpio_get_attributes(struct fsl_mc_io *mc_io,
uint16_t token,
struct dpio_attr *attr)
{
+ struct dpio_rsp_get_attr *rsp_params;
struct mc_command cmd = { 0 };
int err;
@@ -211,33 +321,65 @@ int dpio_get_attributes(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPIO_RSP_GET_ATTRIBUTES(cmd, attr);
+ rsp_params = (struct dpio_rsp_get_attr *)cmd.params;
+ attr->id = le32_to_cpu(rsp_params->id);
+ attr->qbman_portal_id = le16_to_cpu(rsp_params->qbman_portal_id);
+ attr->num_priorities = rsp_params->num_priorities;
+ attr->qbman_portal_ce_offset =
+ le64_to_cpu(rsp_params->qbman_portal_ce_offset);
+ attr->qbman_portal_ci_offset =
+ le64_to_cpu(rsp_params->qbman_portal_ci_offset);
+ attr->qbman_version = le32_to_cpu(rsp_params->qbman_version);
+ attr->clk = le32_to_cpu(rsp_params->clk);
+ attr->channel_mode = dpio_get_field(rsp_params->channel_mode,
+ ATTR_CHANNEL_MODE);
return 0;
}
+/**
+ * dpio_set_stashing_destination() - Set the stashing destination.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPIO object
+ * @sdest: Stashing destination value
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpio_set_stashing_destination(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
uint8_t sdest)
{
+ struct dpio_stashing_dest *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPIO_CMDID_SET_STASHING_DEST,
cmd_flags,
token);
- DPIO_CMD_SET_STASHING_DEST(cmd, sdest);
+ cmd_params = (struct dpio_stashing_dest *)cmd.params;
+ cmd_params->sdest = sdest;
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpio_get_stashing_destination() - Get the stashing destination..
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPIO object
+ * @sdest: Returns the stashing destination value
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpio_get_stashing_destination(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
uint8_t *sdest)
{
+ struct dpio_stashing_dest *rsp_params;
struct mc_command cmd = { 0 };
int err;
@@ -252,17 +394,30 @@ int dpio_get_stashing_destination(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPIO_RSP_GET_STASHING_DEST(cmd, *sdest);
+ rsp_params = (struct dpio_stashing_dest *)cmd.params;
+ *sdest = rsp_params->sdest;
return 0;
}
+/**
+ * dpio_add_static_dequeue_channel() - Add a static dequeue channel.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPIO object
+ * @dpcon_id: DPCON object ID
+ * @channel_index: Returned channel index to be used in qbman API
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpio_add_static_dequeue_channel(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
int dpcon_id,
uint8_t *channel_index)
{
+ struct dpio_rsp_add_static_dequeue_channel *rsp_params;
+ struct dpio_cmd_static_dequeue_channel *cmd_params;
struct mc_command cmd = { 0 };
int err;
@@ -270,7 +425,8 @@ int dpio_add_static_dequeue_channel(struct fsl_mc_io *mc_io,
cmd.header = mc_encode_cmd_header(DPIO_CMDID_ADD_STATIC_DEQUEUE_CHANNEL,
cmd_flags,
token);
- DPIO_CMD_ADD_STATIC_DEQUEUE_CHANNEL(cmd, dpcon_id);
+ cmd_params = (struct dpio_cmd_static_dequeue_channel *)cmd.params;
+ cmd_params->dpcon_id = cpu_to_le32(dpcon_id);
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -278,16 +434,27 @@ int dpio_add_static_dequeue_channel(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPIO_RSP_ADD_STATIC_DEQUEUE_CHANNEL(cmd, *channel_index);
+ rsp_params = (struct dpio_rsp_add_static_dequeue_channel *)cmd.params;
+ *channel_index = rsp_params->channel_index;
return 0;
}
+/**
+ * dpio_remove_static_dequeue_channel() - Remove a static dequeue channel.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPIO object
+ * @dpcon_id: DPCON object ID
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpio_remove_static_dequeue_channel(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
int dpcon_id)
{
+ struct dpio_cmd_static_dequeue_channel *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
@@ -295,17 +462,28 @@ int dpio_remove_static_dequeue_channel(struct fsl_mc_io *mc_io,
DPIO_CMDID_REMOVE_STATIC_DEQUEUE_CHANNEL,
cmd_flags,
token);
- DPIO_CMD_REMOVE_STATIC_DEQUEUE_CHANNEL(cmd, dpcon_id);
+ cmd_params = (struct dpio_cmd_static_dequeue_channel *)cmd.params;
+ cmd_params->dpcon_id = cpu_to_le32(dpcon_id);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpio_get_api_version() - Get Data Path I/O API version
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @major_ver: Major version of data path i/o API
+ * @minor_ver: Minor version of data path i/o API
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpio_get_api_version(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
- uint16_t *major_ver,
- uint16_t *minor_ver)
+ uint16_t *major_ver,
+ uint16_t *minor_ver)
{
+ struct dpio_rsp_get_api_version *rsp_params;
struct mc_command cmd = { 0 };
int err;
@@ -317,7 +495,9 @@ int dpio_get_api_version(struct fsl_mc_io *mc_io,
if (err)
return err;
- DPIO_RSP_GET_API_VERSION(cmd, *major_ver, *minor_ver);
+ rsp_params = (struct dpio_rsp_get_api_version *)cmd.params;
+ *major_ver = le16_to_cpu(rsp_params->major);
+ *minor_ver = le16_to_cpu(rsp_params->minor);
return 0;
}
diff --git a/drivers/bus/fslmc/mc/dpmng.c b/drivers/bus/fslmc/mc/dpmng.c
index dd1c3ac..f9946e8 100644
--- a/drivers/bus/fslmc/mc/dpmng.c
+++ b/drivers/bus/fslmc/mc/dpmng.c
@@ -5,6 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2015 Freescale Semiconductor Inc.
+ * Copyright 2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -41,11 +42,21 @@
#include <fsl_dpmng.h>
#include <fsl_dpmng_cmd.h>
+/**
+ * mc_get_version() - Retrieves the Management Complex firmware
+ * version information
+ * @mc_io: Pointer to opaque I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @mc_ver_info: Returned version information structure
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int mc_get_version(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
struct mc_version *mc_ver_info)
{
struct mc_command cmd = { 0 };
+ struct dpmng_rsp_get_version *rsp_params;
int err;
/* prepare command */
@@ -59,15 +70,31 @@ int mc_get_version(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPMNG_RSP_GET_VERSION(cmd, mc_ver_info);
+ rsp_params = (struct dpmng_rsp_get_version *)cmd.params;
+ mc_ver_info->revision = le32_to_cpu(rsp_params->revision);
+ mc_ver_info->major = le32_to_cpu(rsp_params->version_major);
+ mc_ver_info->minor = le32_to_cpu(rsp_params->version_minor);
return 0;
}
+/**
+ * mc_get_soc_version() - Retrieves the Management Complex firmware
+ * version information
+ * @mc_io Pointer to opaque I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @mc_platform_info: Returned version information structure. The structure
+ * contains the values of SVR and PVR registers.
+ * Please consult platform specific reference manual
+ * for detailed information.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int mc_get_soc_version(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
struct mc_soc_version *mc_platform_info)
{
+ struct dpmng_rsp_get_soc_version *rsp_params;
struct mc_command cmd = { 0 };
int err;
@@ -82,7 +109,9 @@ int mc_get_soc_version(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPMNG_RSP_GET_SOC_VERSION(cmd, mc_platform_info);
+ rsp_params = (struct dpmng_rsp_get_soc_version *)cmd.params;
+ mc_platform_info->svr = le32_to_cpu(rsp_params->svr);
+ mc_platform_info->pvr = le32_to_cpu(rsp_params->pvr);
return 0;
}
diff --git a/drivers/bus/fslmc/mc/fsl_dpbp.h b/drivers/bus/fslmc/mc/fsl_dpbp.h
index 32bb9aa..77ea6f2 100644
--- a/drivers/bus/fslmc/mc/fsl_dpbp.h
+++ b/drivers/bus/fslmc/mc/fsl_dpbp.h
@@ -5,7 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP.
+ * Copyright 2016-2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -40,48 +40,21 @@
#ifndef __FSL_DPBP_H
#define __FSL_DPBP_H
-/* Data Path Buffer Pool API
+/*
+ * Data Path Buffer Pool API
* Contains initialization APIs and runtime control APIs for DPBP
*/
struct fsl_mc_io;
-/**
- * dpbp_open() - Open a control session for the specified object.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @dpbp_id: DPBP unique ID
- * @token: Returned token; use in subsequent API calls
- *
- * This function can be used to open a control session for an
- * already created object; an object may have been declared in
- * the DPL or by calling the dpbp_create function.
- * This function returns a unique authentication token,
- * associated with the specific object ID and the specific MC
- * portal; this token must be used in all subsequent commands for
- * this specific object
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpbp_open(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- int dpbp_id,
- uint16_t *token);
+int dpbp_open(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ int dpbp_id,
+ uint16_t *token);
-/**
- * dpbp_close() - Close the control session of the object
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPBP object
- *
- * After this function is called, no further operations are
- * allowed on the object without opening a new control session.
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpbp_close(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpbp_close(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
/**
* struct dpbp_cfg - Structure representing DPBP configuration
@@ -91,98 +64,33 @@ struct dpbp_cfg {
uint32_t options;
};
-/**
- * dpbp_create() - Create the DPBP object.
- * @mc_io: Pointer to MC portal's I/O object
- * @dprc_token: Parent container token; '0' for default container
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @cfg: Configuration structure
- * @obj_id: returned object id
- *
- * Create the DPBP object, allocate required resources and
- * perform required initialization.
- *
- * The object can be created either by declaring it in the
- * DPL file, or by calling this function.
- *
- * The function accepts an authentication token of a parent
- * container that this object should be assigned to. The token
- * can be '0' so the object will be assigned to the default container.
- * The newly created object can be opened with the returned
- * object id and using the container's associated tokens and MC portals.
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpbp_create(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- const struct dpbp_cfg *cfg,
- uint32_t *obj_id);
+int dpbp_create(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ const struct dpbp_cfg *cfg,
+ uint32_t *obj_id);
-/**
- * dpbp_destroy() - Destroy the DPBP object and release all its resources.
- * @dprc_token: Parent container token; '0' for default container
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @object_id: The object id; it must be a valid id within the container that
- * created this object;
- *
- * Return: '0' on Success; error code otherwise.
- */
-int dpbp_destroy(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- uint32_t object_id);
+int dpbp_destroy(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ uint32_t obj_id);
-/**
- * dpbp_enable() - Enable the DPBP.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPBP object
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpbp_enable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpbp_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
-/**
- * dpbp_disable() - Disable the DPBP.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPBP object
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpbp_disable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpbp_disable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
-/**
- * dpbp_is_enabled() - Check if the DPBP is enabled.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPBP object
- * @en: Returns '1' if object is enabled; '0' otherwise
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpbp_is_enabled(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- int *en);
+int dpbp_is_enabled(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int *en);
-/**
- * dpbp_reset() - Reset the DPBP, returns the object to initial state.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPBP object
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpbp_reset(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpbp_reset(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
/**
* struct dpbp_attr - Structure representing DPBP attributes
@@ -195,44 +103,23 @@ struct dpbp_attr {
uint16_t bpid;
};
+int dpbp_get_attributes(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpbp_attr *attr);
+
/**
- * dpbp_get_attributes - Retrieve DPBP attributes.
- *
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPBP object
- * @attr: Returned object's attributes
- *
- * Return: '0' on Success; Error code otherwise.
+ * DPBP notifications options
*/
-int dpbp_get_attributes(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- struct dpbp_attr *attr);
/**
- * dpbp_get_api_version() - Get buffer pool API version
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @major_ver: Major version of data path buffer pool API
- * @minor_ver: Minor version of data path buffer pool API
- *
- * Return: '0' on Success; Error code otherwise.
+ * BPSCN write will attempt to allocate into a cache (coherent write)
*/
int dpbp_get_api_version(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t *major_ver,
uint16_t *minor_ver);
-/**
- * dpbp_get_num_free_bufs() - Get number of free buffers in the buffer pool
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPBP object
- * @num_free_bufs: Number of free buffers
- *
- * Return: '0' on Success; Error code otherwise.
- */
int dpbp_get_num_free_bufs(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
diff --git a/drivers/bus/fslmc/mc/fsl_dpbp_cmd.h b/drivers/bus/fslmc/mc/fsl_dpbp_cmd.h
index f0ee65a..ce38c79 100644
--- a/drivers/bus/fslmc/mc/fsl_dpbp_cmd.h
+++ b/drivers/bus/fslmc/mc/fsl_dpbp_cmd.h
@@ -5,7 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP.
+ * Copyright 2016-2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -42,47 +42,90 @@
/* DPBP Version */
#define DPBP_VER_MAJOR 3
-#define DPBP_VER_MINOR 2
+#define DPBP_VER_MINOR 3
+
+/* Command versioning */
+#define DPBP_CMD_BASE_VERSION 1
+#define DPBP_CMD_ID_OFFSET 4
+
+#define DPBP_CMD(id) ((id << DPBP_CMD_ID_OFFSET) | DPBP_CMD_BASE_VERSION)
/* Command IDs */
-#define DPBP_CMDID_CLOSE 0x8001
-#define DPBP_CMDID_OPEN 0x8041
-#define DPBP_CMDID_CREATE 0x9041
-#define DPBP_CMDID_DESTROY 0x9841
-#define DPBP_CMDID_GET_API_VERSION 0xa041
-
-#define DPBP_CMDID_ENABLE 0x0021
-#define DPBP_CMDID_DISABLE 0x0031
-#define DPBP_CMDID_GET_ATTR 0x0041
-#define DPBP_CMDID_RESET 0x0051
-#define DPBP_CMDID_IS_ENABLED 0x0061
-
-#define DPBP_CMDID_GET_FREE_BUFFERS_NUM 0x1b21
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPBP_CMD_OPEN(cmd, dpbp_id) \
- MC_CMD_OP(cmd, 0, 0, 32, int, dpbp_id)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPBP_RSP_IS_ENABLED(cmd, en) \
- MC_RSP_OP(cmd, 0, 0, 1, int, en)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPBP_RSP_GET_ATTRIBUTES(cmd, attr) \
-do { \
- MC_RSP_OP(cmd, 0, 16, 16, uint16_t, (attr)->bpid); \
- MC_RSP_OP(cmd, 0, 32, 32, int, (attr)->id);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPBP_RSP_GET_API_VERSION(cmd, major, minor) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 16, uint16_t, major);\
- MC_RSP_OP(cmd, 0, 16, 16, uint16_t, minor);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPBP_RSP_GET_NUM_FREE_BUFS(cmd, num_free_bufs) \
- MC_RSP_OP(cmd, 0, 0, 32, uint32_t, num_free_bufs)
+#define DPBP_CMDID_CLOSE DPBP_CMD(0x800)
+#define DPBP_CMDID_OPEN DPBP_CMD(0x804)
+#define DPBP_CMDID_CREATE DPBP_CMD(0x904)
+#define DPBP_CMDID_DESTROY DPBP_CMD(0x984)
+#define DPBP_CMDID_GET_API_VERSION DPBP_CMD(0xa04)
+
+#define DPBP_CMDID_ENABLE DPBP_CMD(0x002)
+#define DPBP_CMDID_DISABLE DPBP_CMD(0x003)
+#define DPBP_CMDID_GET_ATTR DPBP_CMD(0x004)
+#define DPBP_CMDID_RESET DPBP_CMD(0x005)
+#define DPBP_CMDID_IS_ENABLED DPBP_CMD(0x006)
+
+#define DPBP_CMDID_SET_IRQ_ENABLE DPBP_CMD(0x012)
+#define DPBP_CMDID_GET_IRQ_ENABLE DPBP_CMD(0x013)
+#define DPBP_CMDID_SET_IRQ_MASK DPBP_CMD(0x014)
+#define DPBP_CMDID_GET_IRQ_MASK DPBP_CMD(0x015)
+#define DPBP_CMDID_GET_IRQ_STATUS DPBP_CMD(0x016)
+#define DPBP_CMDID_CLEAR_IRQ_STATUS DPBP_CMD(0x017)
+
+#define DPBP_CMDID_SET_NOTIFICATIONS DPBP_CMD(0x1b0)
+#define DPBP_CMDID_GET_NOTIFICATIONS DPBP_CMD(0x1b1)
+
+#define DPBP_CMDID_GET_FREE_BUFFERS_NUM DPBP_CMD(0x1b2)
+
+#pragma pack(push, 1)
+struct dpbp_cmd_open {
+ uint32_t dpbp_id;
+};
+
+struct dpbp_cmd_destroy {
+ uint32_t object_id;
+};
+
+#define DPBP_ENABLE 0x1
+
+struct dpbp_rsp_is_enabled {
+ uint8_t enabled;
+};
+
+struct dpbp_rsp_get_attributes {
+ uint16_t pad;
+ uint16_t bpid;
+ uint32_t id;
+};
+
+struct dpbp_cmd_set_notifications {
+ uint32_t depletion_entry;
+ uint32_t depletion_exit;
+ uint32_t surplus_entry;
+ uint32_t surplus_exit;
+ uint16_t options;
+ uint16_t pad[3];
+ uint64_t message_ctx;
+ uint64_t message_iova;
+};
+
+struct dpbp_rsp_get_notifications {
+ uint32_t depletion_entry;
+ uint32_t depletion_exit;
+ uint32_t surplus_entry;
+ uint32_t surplus_exit;
+ uint16_t options;
+ uint16_t pad[3];
+ uint64_t message_ctx;
+ uint64_t message_iova;
+};
+
+struct dpbp_rsp_get_api_version {
+ uint16_t major;
+ uint16_t minor;
+};
+
+struct dpbp_rsp_get_num_free_bufs {
+ uint32_t num_free_bufs;
+};
+#pragma pack(pop)
#endif /* _FSL_DPBP_CMD_H */
diff --git a/drivers/bus/fslmc/mc/fsl_dpci.h b/drivers/bus/fslmc/mc/fsl_dpci.h
index 1e155dd..f4aa6e5 100644
--- a/drivers/bus/fslmc/mc/fsl_dpci.h
+++ b/drivers/bus/fslmc/mc/fsl_dpci.h
@@ -62,42 +62,14 @@ struct fsl_mc_io;
*/
#define DPCI_ALL_QUEUES (uint8_t)(-1)
-/**
- * dpci_open() - Open a control session for the specified object
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @dpci_id: DPCI unique ID
- * @token: Returned token; use in subsequent API calls
- *
- * This function can be used to open a control session for an
- * already created object; an object may have been declared in
- * the DPL or by calling the dpci_create() function.
- * This function returns a unique authentication token,
- * associated with the specific object ID and the specific MC
- * portal; this token must be used in all subsequent commands for
- * this specific object.
- *
- * Return: '0' on Success; Error code otherwise.
- */
int dpci_open(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- int dpci_id,
- uint16_t *token);
+ uint32_t cmd_flags,
+ int dpci_id,
+ uint16_t *token);
-/**
- * dpci_close() - Close the control session of the object
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPCI object
- *
- * After this function is called, no further operations are
- * allowed on the object without opening a new control session.
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpci_close(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpci_close(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
/**
* Enable the Order Restoration support
@@ -124,107 +96,37 @@ struct dpci_cfg {
uint8_t num_of_priorities;
};
-/**
- * dpci_create() - Create the DPCI object.
- * @mc_io: Pointer to MC portal's I/O object
- * @dprc_token: Parent container token; '0' for default container
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @cfg: Configuration structure
- * @obj_id: returned object id
- *
- * Create the DPCI object, allocate required resources and perform required
- * initialization.
- *
- * The object can be created either by declaring it in the
- * DPL file, or by calling this function.
- *
- * The function accepts an authentication token of a parent
- * container that this object should be assigned to. The token
- * can be '0' so the object will be assigned to the default container.
- * The newly created object can be opened with the returned
- * object id and using the container's associated tokens and MC portals.
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpci_create(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- const struct dpci_cfg *cfg,
- uint32_t *obj_id);
+int dpci_create(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ const struct dpci_cfg *cfg,
+ uint32_t *obj_id);
-/**
- * dpci_destroy() - Destroy the DPCI object and release all its resources.
- * @mc_io: Pointer to MC portal's I/O object
- * @dprc_token: Parent container token; '0' for default container
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @object_id: The object id; it must be a valid id within the container that
- * created this object;
- *
- * The function accepts the authentication token of the parent container that
- * created the object (not the one that currently owns the object). The object
- * is searched within parent using the provided 'object_id'.
- * All tokens to the object must be closed before calling destroy.
- *
- * Return: '0' on Success; error code otherwise.
- */
-int dpci_destroy(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- uint32_t object_id);
+int dpci_destroy(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ uint32_t object_id);
-/**
- * dpci_enable() - Enable the DPCI, allow sending and receiving frames.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPCI object
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpci_enable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpci_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
-/**
- * dpci_disable() - Disable the DPCI, stop sending and receiving frames.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPCI object
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpci_disable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpci_disable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
-/**
- * dpci_is_enabled() - Check if the DPCI is enabled.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPCI object
- * @en: Returns '1' if object is enabled; '0' otherwise
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpci_is_enabled(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- int *en);
+int dpci_is_enabled(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int *en);
-/**
- * dpci_reset() - Reset the DPCI, returns the object to initial state.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPCI object
- *
- * Return: '0' on Success; Error code otherwise.
- */
int dpci_reset(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+ uint32_t cmd_flags,
+ uint16_t token);
/**
* struct dpci_attr - Structure representing DPCI attributes
- * @id: DPCI object ID
+ * @id: DPCI object ID
* @num_of_priorities: Number of receive priorities
*/
struct dpci_attr {
@@ -232,19 +134,10 @@ struct dpci_attr {
uint8_t num_of_priorities;
};
-/**
- * dpci_get_attributes() - Retrieve DPCI attributes.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPCI object
- * @attr: Returned object's attributes
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpci_get_attributes(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- struct dpci_attr *attr);
+int dpci_get_attributes(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpci_attr *attr);
/**
* enum dpci_dest - DPCI destination types
@@ -310,24 +203,11 @@ struct dpci_rx_queue_cfg {
struct dpci_dest_cfg dest_cfg;
};
-/**
- * dpci_set_rx_queue() - Set Rx queue configuration
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPCI object
- * @priority: Select the queue relative to number of
- * priorities configured at DPCI creation; use
- * DPCI_ALL_QUEUES to configure all Rx queues
- * identically.
- * @cfg: Rx queue configuration
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpci_set_rx_queue(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t priority,
- const struct dpci_rx_queue_cfg *cfg);
+int dpci_set_rx_queue(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t priority,
+ const struct dpci_rx_queue_cfg *cfg);
/**
* struct dpci_rx_queue_attr - Structure representing Rx queue attributes
@@ -337,26 +217,15 @@ int dpci_set_rx_queue(struct fsl_mc_io *mc_io,
* @fqid: Virtual FQID value to be used for dequeue operations
*/
struct dpci_rx_queue_attr {
- uint64_t user_ctx;
- struct dpci_dest_cfg dest_cfg;
- uint32_t fqid;
+ uint64_t user_ctx;
+ struct dpci_dest_cfg dest_cfg;
+ uint32_t fqid;
};
-/**
- * dpci_get_rx_queue() - Retrieve Rx queue attributes.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPCI object
- * @priority: Select the queue relative to number of
- * priorities configured at DPCI creation
- * @attr: Returned Rx queue attributes
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpci_get_rx_queue(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t priority,
+int dpci_get_rx_queue(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t priority,
struct dpci_rx_queue_attr *attr);
/**
@@ -370,35 +239,15 @@ struct dpci_tx_queue_attr {
uint32_t fqid;
};
-/**
- * dpci_get_tx_queue() - Retrieve Tx queue attributes.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPCI object
- * @priority: Select the queue relative to number of
- * priorities of the peer DPCI object
- * @attr: Returned Tx queue attributes
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpci_get_tx_queue(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t priority,
- struct dpci_tx_queue_attr *attr);
+int dpci_get_tx_queue(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t priority,
+ struct dpci_tx_queue_attr *attr);
-/**
- * dpci_get_api_version() - Get communication interface API version
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @major_ver: Major version of data path communication interface API
- * @minor_ver: Minor version of data path communication interface API
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpci_get_api_version(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t *major_ver,
- uint16_t *minor_ver);
+int dpci_get_api_version(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t *major_ver,
+ uint16_t *minor_ver);
#endif /* __FSL_DPCI_H */
diff --git a/drivers/bus/fslmc/mc/fsl_dpci_cmd.h b/drivers/bus/fslmc/mc/fsl_dpci_cmd.h
index 6d4e273..73a551a 100644
--- a/drivers/bus/fslmc/mc/fsl_dpci_cmd.h
+++ b/drivers/bus/fslmc/mc/fsl_dpci_cmd.h
@@ -40,108 +40,126 @@
#define _FSL_DPCI_CMD_H
/* DPCI Version */
-#define DPCI_VER_MAJOR 3
-#define DPCI_VER_MINOR 3
+#define DPCI_VER_MAJOR 3
+#define DPCI_VER_MINOR 3
-/* Command IDs */
-#define DPCI_CMDID_CLOSE 0x8001
-#define DPCI_CMDID_OPEN 0x8071
-#define DPCI_CMDID_CREATE 0x9072
-#define DPCI_CMDID_DESTROY 0x9871
-#define DPCI_CMDID_GET_API_VERSION 0xa071
-
-#define DPCI_CMDID_ENABLE 0x0021
-#define DPCI_CMDID_DISABLE 0x0031
-#define DPCI_CMDID_GET_ATTR 0x0041
-#define DPCI_CMDID_RESET 0x0051
-#define DPCI_CMDID_IS_ENABLED 0x0061
-
-#define DPCI_CMDID_SET_IRQ_ENABLE 0x0121
-#define DPCI_CMDID_GET_IRQ_ENABLE 0x0131
-#define DPCI_CMDID_SET_IRQ_MASK 0x0141
-#define DPCI_CMDID_GET_IRQ_MASK 0x0151
-#define DPCI_CMDID_GET_IRQ_STATUS 0x0161
-#define DPCI_CMDID_CLEAR_IRQ_STATUS 0x0171
-
-#define DPCI_CMDID_SET_RX_QUEUE 0x0e01
-#define DPCI_CMDID_GET_LINK_STATE 0x0e11
-#define DPCI_CMDID_GET_PEER_ATTR 0x0e21
-#define DPCI_CMDID_GET_RX_QUEUE 0x0e31
-#define DPCI_CMDID_GET_TX_QUEUE 0x0e41
-#define DPCI_CMDID_SET_OPR 0x0e51
-#define DPCI_CMDID_GET_OPR 0x0e61
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCI_CMD_OPEN(cmd, dpci_id) \
- MC_CMD_OP(cmd, 0, 0, 32, int, dpci_id)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCI_CMD_CREATE(cmd, cfg) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 8, uint8_t, cfg->num_of_priorities);\
- MC_CMD_OP(cmd, 2, 0, 32, uint32_t, cfg->options);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCI_RSP_IS_ENABLED(cmd, en) \
- MC_RSP_OP(cmd, 0, 0, 1, int, en)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCI_RSP_GET_ATTRIBUTES(cmd, attr) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 32, int, (attr)->id);\
- MC_RSP_OP(cmd, 0, 48, 8, uint8_t, (attr)->num_of_priorities);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCI_RSP_GET_PEER_ATTR(cmd, attr) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 32, int, attr->peer_id);\
- MC_RSP_OP(cmd, 1, 0, 8, uint8_t, attr->num_of_priorities);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCI_RSP_GET_LINK_STATE(cmd, up) \
- MC_RSP_OP(cmd, 0, 0, 1, int, up)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCI_CMD_SET_RX_QUEUE(cmd, priority, cfg) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 32, int, cfg->dest_cfg.dest_id);\
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, cfg->dest_cfg.priority);\
- MC_CMD_OP(cmd, 0, 40, 8, uint8_t, priority);\
- MC_CMD_OP(cmd, 0, 48, 4, enum dpci_dest, cfg->dest_cfg.dest_type);\
- MC_CMD_OP(cmd, 1, 0, 64, uint64_t, cfg->user_ctx);\
- MC_CMD_OP(cmd, 2, 0, 32, uint32_t, cfg->options);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCI_CMD_GET_RX_QUEUE(cmd, priority) \
- MC_CMD_OP(cmd, 0, 40, 8, uint8_t, priority)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCI_RSP_GET_RX_QUEUE(cmd, attr) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 32, int, attr->dest_cfg.dest_id);\
- MC_RSP_OP(cmd, 0, 32, 8, uint8_t, attr->dest_cfg.priority);\
- MC_RSP_OP(cmd, 0, 48, 4, enum dpci_dest, attr->dest_cfg.dest_type);\
- MC_RSP_OP(cmd, 1, 0, 8, uint64_t, attr->user_ctx);\
- MC_RSP_OP(cmd, 2, 0, 32, uint32_t, attr->fqid);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCI_CMD_GET_TX_QUEUE(cmd, priority) \
- MC_CMD_OP(cmd, 0, 40, 8, uint8_t, priority)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCI_RSP_GET_TX_QUEUE(cmd, attr) \
- MC_RSP_OP(cmd, 0, 32, 32, uint32_t, attr->fqid)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCI_RSP_GET_API_VERSION(cmd, major, minor) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 16, uint16_t, major);\
- MC_RSP_OP(cmd, 0, 16, 16, uint16_t, minor);\
-} while (0)
+#define DPCI_CMD_BASE_VERSION 1
+#define DPCI_CMD_BASE_VERSION_V2 2
+#define DPCI_CMD_ID_OFFSET 4
+
+#define DPCI_CMD_V1(id) ((id << DPCI_CMD_ID_OFFSET) | DPCI_CMD_BASE_VERSION)
+#define DPCI_CMD_V2(id) ((id << DPCI_CMD_ID_OFFSET) | DPCI_CMD_BASE_VERSION_V2)
+/* Command IDs */
+#define DPCI_CMDID_CLOSE DPCI_CMD_V1(0x800)
+#define DPCI_CMDID_OPEN DPCI_CMD_V1(0x807)
+#define DPCI_CMDID_CREATE DPCI_CMD_V2(0x907)
+#define DPCI_CMDID_DESTROY DPCI_CMD_V1(0x987)
+#define DPCI_CMDID_GET_API_VERSION DPCI_CMD_V1(0xa07)
+
+#define DPCI_CMDID_ENABLE DPCI_CMD_V1(0x002)
+#define DPCI_CMDID_DISABLE DPCI_CMD_V1(0x003)
+#define DPCI_CMDID_GET_ATTR DPCI_CMD_V1(0x004)
+#define DPCI_CMDID_RESET DPCI_CMD_V1(0x005)
+#define DPCI_CMDID_IS_ENABLED DPCI_CMD_V1(0x006)
+
+#define DPCI_CMDID_SET_RX_QUEUE DPCI_CMD_V1(0x0e0)
+#define DPCI_CMDID_GET_LINK_STATE DPCI_CMD_V1(0x0e1)
+#define DPCI_CMDID_GET_PEER_ATTR DPCI_CMD_V1(0x0e2)
+#define DPCI_CMDID_GET_RX_QUEUE DPCI_CMD_V1(0x0e3)
+#define DPCI_CMDID_GET_TX_QUEUE DPCI_CMD_V1(0x0e4)
+
+/* Macros for accessing command fields smaller than 1byte */
+#define DPCI_MASK(field) \
+ GENMASK(DPCI_##field##_SHIFT + DPCI_##field##_SIZE - 1, \
+ DPCI_##field##_SHIFT)
+#define dpci_set_field(var, field, val) \
+ ((var) |= (((val) << DPCI_##field##_SHIFT) & DPCI_MASK(field)))
+#define dpci_get_field(var, field) \
+ (((var) & DPCI_MASK(field)) >> DPCI_##field##_SHIFT)
+
+#pragma pack(push, 1)
+struct dpci_cmd_open {
+ uint32_t dpci_id;
+};
+
+struct dpci_cmd_create {
+ uint8_t num_of_priorities;
+ uint8_t pad[15];
+ uint32_t options;
+};
+
+struct dpci_cmd_destroy {
+ uint32_t dpci_id;
+};
+
+#define DPCI_ENABLE_SHIFT 0
+#define DPCI_ENABLE_SIZE 1
+
+struct dpci_rsp_is_enabled {
+ /* only the LSB bit */
+ uint8_t en;
+};
+
+struct dpci_rsp_get_attr {
+ uint32_t id;
+ uint16_t pad;
+ uint8_t num_of_priorities;
+};
+
+struct dpci_rsp_get_peer_attr {
+ uint32_t id;
+ uint32_t pad;
+ uint8_t num_of_priorities;
+};
+
+#define DPCI_UP_SHIFT 0
+#define DPCI_UP_SIZE 1
+
+struct dpci_rsp_get_link_state {
+ /* only the LSB bit */
+ uint8_t up;
+};
+
+#define DPCI_DEST_TYPE_SHIFT 0
+#define DPCI_DEST_TYPE_SIZE 4
+
+struct dpci_cmd_set_rx_queue {
+ uint32_t dest_id;
+ uint8_t dest_priority;
+ uint8_t priority;
+ /* from LSB: dest_type:4 */
+ uint8_t dest_type;
+ uint8_t pad;
+ uint64_t user_ctx;
+ uint32_t options;
+};
+
+struct dpci_cmd_get_queue {
+ uint8_t pad[5];
+ uint8_t priority;
+};
+
+struct dpci_rsp_get_rx_queue {
+ uint32_t dest_id;
+ uint8_t dest_priority;
+ uint8_t pad;
+ /* from LSB: dest_type:4 */
+ uint8_t dest_type;
+ uint8_t pad1;
+ uint64_t user_ctx;
+ uint32_t fqid;
+};
+
+struct dpci_rsp_get_tx_queue {
+ uint32_t pad;
+ uint32_t fqid;
+};
+
+struct dpci_rsp_get_api_version {
+ uint16_t major;
+ uint16_t minor;
+};
+
+#pragma pack(pop)
#endif /* _FSL_DPCI_CMD_H */
diff --git a/drivers/bus/fslmc/mc/fsl_dpcon.h b/drivers/bus/fslmc/mc/fsl_dpcon.h
index 0ed9db5..1da807f 100644
--- a/drivers/bus/fslmc/mc/fsl_dpcon.h
+++ b/drivers/bus/fslmc/mc/fsl_dpcon.h
@@ -52,42 +52,14 @@ struct fsl_mc_io;
*/
#define DPCON_INVALID_DPIO_ID (int)(-1)
-/**
- * dpcon_open() - Open a control session for the specified object
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @dpcon_id: DPCON unique ID
- * @token: Returned token; use in subsequent API calls
- *
- * This function can be used to open a control session for an
- * already created object; an object may have been declared in
- * the DPL or by calling the dpcon_create() function.
- * This function returns a unique authentication token,
- * associated with the specific object ID and the specific MC
- * portal; this token must be used in all subsequent commands for
- * this specific object.
- *
- * Return: '0' on Success; Error code otherwise.
- */
int dpcon_open(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- int dpcon_id,
- uint16_t *token);
+ uint32_t cmd_flags,
+ int dpcon_id,
+ uint16_t *token);
-/**
- * dpcon_close() - Close the control session of the object
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPCON object
- *
- * After this function is called, no further operations are
- * allowed on the object without opening a new control session.
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpcon_close(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpcon_close(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
/**
* struct dpcon_cfg - Structure representing DPCON configuration
@@ -97,109 +69,39 @@ struct dpcon_cfg {
uint8_t num_priorities;
};
-/**
- * dpcon_create() - Create the DPCON object.
- * @mc_io: Pointer to MC portal's I/O object
- * @dprc_token: Parent container token; '0' for default container
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @cfg: Configuration structure
- * @obj_id: returned object id
- *
- * Create the DPCON object, allocate required resources and
- * perform required initialization.
- *
- * The object can be created either by declaring it in the
- * DPL file, or by calling this function.
- *
- * The function accepts an authentication token of a parent
- * container that this object should be assigned to. The token
- * can be '0' so the object will be assigned to the default container.
- * The newly created object can be opened with the returned
- * object id and using the container's associated tokens and MC portals.
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpcon_create(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- const struct dpcon_cfg *cfg,
- uint32_t *obj_id);
+int dpcon_create(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ const struct dpcon_cfg *cfg,
+ uint32_t *obj_id);
-/**
- * dpcon_destroy() - Destroy the DPCON object and release all its resources.
- * @mc_io: Pointer to MC portal's I/O object
- * @dprc_token: Parent container token; '0' for default container
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @object_id: The object id; it must be a valid id within the container that
- * created this object;
- *
- * The function accepts the authentication token of the parent container that
- * created the object (not the one that currently owns the object). The object
- * is searched within parent using the provided 'object_id'.
- * All tokens to the object must be closed before calling destroy.
- *
- * Return: '0' on Success; error code otherwise.
- */
-int dpcon_destroy(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- uint32_t object_id);
+int dpcon_destroy(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ uint32_t obj_id);
-/**
- * dpcon_enable() - Enable the DPCON
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPCON object
- *
- * Return: '0' on Success; Error code otherwise
- */
-int dpcon_enable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpcon_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
-/**
- * dpcon_disable() - Disable the DPCON
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPCON object
- *
- * Return: '0' on Success; Error code otherwise
- */
-int dpcon_disable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpcon_disable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
-/**
- * dpcon_is_enabled() - Check if the DPCON is enabled.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPCON object
- * @en: Returns '1' if object is enabled; '0' otherwise
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpcon_is_enabled(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- int *en);
+int dpcon_is_enabled(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int *en);
-/**
- * dpcon_reset() - Reset the DPCON, returns the object to initial state.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPCON object
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpcon_reset(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpcon_reset(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
/**
* struct dpcon_attr - Structure representing DPCON attributes
- * @id: DPCON object ID
- * @qbman_ch_id: Channel ID to be used by dequeue operation
- * @num_priorities: Number of priorities for the DPCON channel (1-8)
+ * @id: DPCON object ID
+ * @qbman_ch_id: Channel ID to be used by dequeue operation
+ * @num_priorities: Number of priorities for the DPCON channel (1-8)
*/
struct dpcon_attr {
int id;
@@ -207,29 +109,11 @@ struct dpcon_attr {
uint8_t num_priorities;
};
-/**
- * dpcon_get_attributes() - Retrieve DPCON attributes.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPCON object
- * @attr: Object's attributes
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpcon_get_attributes(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- struct dpcon_attr *attr);
+int dpcon_get_attributes(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpcon_attr *attr);
-/**
- * dpcon_get_api_version() - Get Data Path Concentrator API version
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @major_ver: Major version of data path concentrator API
- * @minor_ver: Minor version of data path concentrator API
- *
- * Return: '0' on Success; Error code otherwise.
- */
int dpcon_get_api_version(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t *major_ver,
diff --git a/drivers/bus/fslmc/mc/fsl_dpcon_cmd.h b/drivers/bus/fslmc/mc/fsl_dpcon_cmd.h
index f7f7690..4d0522c 100644
--- a/drivers/bus/fslmc/mc/fsl_dpcon_cmd.h
+++ b/drivers/bus/fslmc/mc/fsl_dpcon_cmd.h
@@ -5,6 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
+ * Copyright 2016-2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -40,136 +41,68 @@
#define _FSL_DPCON_CMD_H
/* DPCON Version */
-#define DPCON_VER_MAJOR 3
-#define DPCON_VER_MINOR 2
+#define DPCON_VER_MAJOR 3
+#define DPCON_VER_MINOR 3
-/* Command IDs */
-#define DPCON_CMDID_CLOSE ((0x800 << 4) | (0x1))
-#define DPCON_CMDID_OPEN ((0x808 << 4) | (0x1))
-#define DPCON_CMDID_CREATE ((0x908 << 4) | (0x1))
-#define DPCON_CMDID_DESTROY ((0x988 << 4) | (0x1))
-#define DPCON_CMDID_GET_API_VERSION ((0xa08 << 4) | (0x1))
-
-#define DPCON_CMDID_ENABLE ((0x002 << 4) | (0x1))
-#define DPCON_CMDID_DISABLE ((0x003 << 4) | (0x1))
-#define DPCON_CMDID_GET_ATTR ((0x004 << 4) | (0x1))
-#define DPCON_CMDID_RESET ((0x005 << 4) | (0x1))
-#define DPCON_CMDID_IS_ENABLED ((0x006 << 4) | (0x1))
-
-#define DPCON_CMDID_SET_IRQ ((0x010 << 4) | (0x1))
-#define DPCON_CMDID_GET_IRQ ((0x011 << 4) | (0x1))
-#define DPCON_CMDID_SET_IRQ_ENABLE ((0x012 << 4) | (0x1))
-#define DPCON_CMDID_GET_IRQ_ENABLE ((0x013 << 4) | (0x1))
-#define DPCON_CMDID_SET_IRQ_MASK ((0x014 << 4) | (0x1))
-#define DPCON_CMDID_GET_IRQ_MASK ((0x015 << 4) | (0x1))
-#define DPCON_CMDID_GET_IRQ_STATUS ((0x016 << 4) | (0x1))
-#define DPCON_CMDID_CLEAR_IRQ_STATUS ((0x017 << 4) | (0x1))
-
-#define DPCON_CMDID_SET_NOTIFICATION ((0x100 << 4) | (0x1))
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_CMD_OPEN(cmd, dpcon_id) \
- MC_CMD_OP(cmd, 0, 0, 32, int, dpcon_id)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_CMD_CREATE(cmd, cfg) \
- MC_CMD_OP(cmd, 0, 0, 8, uint8_t, cfg->num_priorities)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_RSP_IS_ENABLED(cmd, en) \
- MC_RSP_OP(cmd, 0, 0, 1, int, en)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 8, uint8_t, irq_index);\
- MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
- MC_CMD_OP(cmd, 1, 0, 64, uint64_t, irq_cfg->addr);\
- MC_CMD_OP(cmd, 2, 0, 32, int, irq_cfg->irq_num); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_CMD_GET_IRQ(cmd, irq_index) \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_RSP_GET_IRQ(cmd, type, irq_cfg) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 32, uint32_t, irq_cfg->val);\
- MC_RSP_OP(cmd, 1, 0, 64, uint64_t, irq_cfg->addr);\
- MC_RSP_OP(cmd, 2, 0, 32, int, irq_cfg->irq_num); \
- MC_RSP_OP(cmd, 2, 32, 32, int, type);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_CMD_SET_IRQ_ENABLE(cmd, irq_index, en) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 8, uint8_t, en); \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_RSP_GET_IRQ_ENABLE(cmd, en) \
- MC_RSP_OP(cmd, 0, 0, 8, uint8_t, en)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 32, uint32_t, mask); \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_CMD_GET_IRQ_MASK(cmd, irq_index) \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_RSP_GET_IRQ_MASK(cmd, mask) \
- MC_RSP_OP(cmd, 0, 0, 32, uint32_t, mask)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 32, uint32_t, status);\
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_RSP_GET_IRQ_STATUS(cmd, status) \
- MC_RSP_OP(cmd, 0, 0, 32, uint32_t, status)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 32, uint32_t, status); \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_RSP_GET_ATTR(cmd, attr) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 32, int, attr->id);\
- MC_RSP_OP(cmd, 0, 32, 16, uint16_t, attr->qbman_ch_id);\
- MC_RSP_OP(cmd, 0, 48, 8, uint8_t, attr->num_priorities);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_CMD_SET_NOTIFICATION(cmd, cfg) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 32, int, cfg->dpio_id);\
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, cfg->priority);\
- MC_CMD_OP(cmd, 1, 0, 64, uint64_t, cfg->user_ctx);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPCON_RSP_GET_API_VERSION(cmd, major, minor) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 16, uint16_t, major);\
- MC_RSP_OP(cmd, 0, 16, 16, uint16_t, minor);\
-} while (0)
+/* Command versioning */
+#define DPCON_CMD_BASE_VERSION 1
+#define DPCON_CMD_ID_OFFSET 4
+
+#define DPCON_CMD(id) ((id << DPCON_CMD_ID_OFFSET) | DPCON_CMD_BASE_VERSION)
+
+/* Command IDs */
+#define DPCON_CMDID_CLOSE DPCON_CMD(0x800)
+#define DPCON_CMDID_OPEN DPCON_CMD(0x808)
+#define DPCON_CMDID_CREATE DPCON_CMD(0x908)
+#define DPCON_CMDID_DESTROY DPCON_CMD(0x988)
+#define DPCON_CMDID_GET_API_VERSION DPCON_CMD(0xa08)
+
+#define DPCON_CMDID_ENABLE DPCON_CMD(0x002)
+#define DPCON_CMDID_DISABLE DPCON_CMD(0x003)
+#define DPCON_CMDID_GET_ATTR DPCON_CMD(0x004)
+#define DPCON_CMDID_RESET DPCON_CMD(0x005)
+#define DPCON_CMDID_IS_ENABLED DPCON_CMD(0x006)
+
+#define DPCON_CMDID_SET_NOTIFICATION DPCON_CMD(0x100)
+
+#pragma pack(push, 1)
+struct dpcon_cmd_open {
+ uint32_t dpcon_id;
+};
+
+struct dpcon_cmd_create {
+ uint8_t num_priorities;
+};
+
+struct dpcon_cmd_destroy {
+ uint32_t object_id;
+};
+
+#define DPCON_ENABLE 1
+
+struct dpcon_rsp_is_enabled {
+ uint8_t enabled;
+};
+
+struct dpcon_rsp_get_attr {
+ uint32_t id;
+ uint16_t qbman_ch_id;
+ uint8_t num_priorities;
+ uint8_t pad;
+};
+
+struct dpcon_cmd_set_notification {
+ uint32_t dpio_id;
+ uint8_t priority;
+ uint8_t pad[3];
+ uint64_t user_ctx;
+};
+
+struct dpcon_rsp_get_api_version {
+ uint16_t major;
+ uint16_t minor;
+};
+
+#pragma pack(pop)
#endif /* _FSL_DPCON_CMD_H */
diff --git a/drivers/bus/fslmc/mc/fsl_dpio.h b/drivers/bus/fslmc/mc/fsl_dpio.h
index 4448cca..3d96adf 100644
--- a/drivers/bus/fslmc/mc/fsl_dpio.h
+++ b/drivers/bus/fslmc/mc/fsl_dpio.h
@@ -5,7 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP.
+ * Copyright 2016-2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -46,44 +46,19 @@
struct fsl_mc_io;
-/**
- * dpio_open() - Open a control session for the specified object
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @dpio_id: DPIO unique ID
- * @token: Returned token; use in subsequent API calls
- *
- * This function can be used to open a control session for an
- * already created object; an object may have been declared in
- * the DPL or by calling the dpio_create() function.
- * This function returns a unique authentication token,
- * associated with the specific object ID and any MC portals
- * assigned to the parent container; this token must be used in
- * all subsequent commands for this specific object.
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpio_open(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- int dpio_id,
- uint16_t *token);
+int dpio_open(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ int dpio_id,
+ uint16_t *token);
-/**
- * dpio_close() - Close the control session of the object
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPIO object
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpio_close(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpio_close(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
/**
* enum dpio_channel_mode - DPIO notification channel mode
- * @DPIO_NO_CHANNEL: No support for notification channel
- * @DPIO_LOCAL_CHANNEL: Notifications on data availability can be received by a
+ * @DPIO_NO_CHANNEL: No support for notification channel
+ * @DPIO_LOCAL_CHANNEL: Notifications on data availability can be received by a
* dedicated channel in the DPIO; user should point the queue's
* destination in the relevant interface to this DPIO
*/
@@ -94,216 +69,94 @@ enum dpio_channel_mode {
/**
* struct dpio_cfg - Structure representing DPIO configuration
- * @channel_mode: Notification channel mode
- * @num_priorities: Number of priorities for the notification channel (1-8);
+ * @channel_mode: Notification channel mode
+ * @num_priorities: Number of priorities for the notification channel (1-8);
* relevant only if 'channel_mode = DPIO_LOCAL_CHANNEL'
*/
struct dpio_cfg {
- enum dpio_channel_mode channel_mode;
- uint8_t num_priorities;
+ enum dpio_channel_mode channel_mode;
+ uint8_t num_priorities;
};
-/**
- * dpio_create() - Create the DPIO object.
- * @mc_io: Pointer to MC portal's I/O object
- * @dprc_token: Parent container token; '0' for default container
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @cfg: Configuration structure
- * @obj_id: returned object id
- *
- * Create the DPIO object, allocate required resources and
- * perform required initialization.
- *
- * The object can be created either by declaring it in the
- * DPL file, or by calling this function.
- *
- * The function accepts an authentication token of a parent
- * container that this object should be assigned to. The token
- * can be '0' so the object will be assigned to the default container.
- * The newly created object can be opened with the returned
- * object id and using the container's associated tokens and MC portals.
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpio_create(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- const struct dpio_cfg *cfg,
- uint32_t *obj_id);
-/**
- * dpio_destroy() - Destroy the DPIO object and release all its resources.
- * @mc_io: Pointer to MC portal's I/O object
- * @dprc_token: Parent container token; '0' for default container
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @object_id: The object id; it must be a valid id within the container that
- * created this object;
- *
- * The function accepts the authentication token of the parent container that
- * created the object (not the one that currently owns the object). The object
- * is searched within parent using the provided 'object_id'.
- * All tokens to the object must be closed before calling destroy.
- *
- * Return: '0' on Success; Error code otherwise
- */
-int dpio_destroy(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- uint32_t object_id);
+int dpio_create(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ const struct dpio_cfg *cfg,
+ uint32_t *obj_id);
-/**
- * dpio_enable() - Enable the DPIO, allow I/O portal operations.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPIO object
- *
- * Return: '0' on Success; Error code otherwise
- */
-int dpio_enable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpio_destroy(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ uint32_t object_id);
-/**
- * dpio_disable() - Disable the DPIO, stop any I/O portal operation.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPIO object
- *
- * Return: '0' on Success; Error code otherwise
- */
-int dpio_disable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpio_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
-/**
- * dpio_is_enabled() - Check if the DPIO is enabled.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPIO object
- * @en: Returns '1' if object is enabled; '0' otherwise
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpio_is_enabled(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- int *en);
+int dpio_disable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
-/**
- * dpio_reset() - Reset the DPIO, returns the object to initial state.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPIO object
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpio_reset(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpio_is_enabled(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int *en);
-/**
- * dpio_set_stashing_destination() - Set the stashing destination.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPIO object
- * @sdest: stashing destination value
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpio_set_stashing_destination(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t sdest);
+int dpio_reset(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
-/**
- * dpio_get_stashing_destination() - Get the stashing destination..
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPIO object
- * @sdest: Returns the stashing destination value
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpio_get_stashing_destination(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t *sdest);
+int dpio_set_stashing_destination(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t sdest);
-/**
- * dpio_add_static_dequeue_channel() - Add a static dequeue channel.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPIO object
- * @dpcon_id: DPCON object ID
- * @channel_index: Returned channel index to be used in qbman API
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpio_add_static_dequeue_channel(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- int dpcon_id,
- uint8_t *channel_index);
+int dpio_get_stashing_destination(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t *sdest);
-/**
- * dpio_remove_static_dequeue_channel() - Remove a static dequeue channel.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPIO object
- * @dpcon_id: DPCON object ID
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpio_remove_static_dequeue_channel(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- int dpcon_id);
+int dpio_add_static_dequeue_channel(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int dpcon_id,
+ uint8_t *channel_index);
+
+int dpio_remove_static_dequeue_channel(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int dpcon_id);
/**
* struct dpio_attr - Structure representing DPIO attributes
- * @id: DPIO object ID
- * @qbman_portal_ce_offset: offset of the software portal cache-enabled area
- * @qbman_portal_ci_offset: offset of the software portal cache-inhibited area
- * @qbman_portal_id: Software portal ID
- * @channel_mode: Notification channel mode
- * @num_priorities: Number of priorities for the notification channel (1-8);
- * relevant only if 'channel_mode = DPIO_LOCAL_CHANNEL'
- * @qbman_version: QBMAN version
+ * @id: DPIO object ID
+ * @qbman_portal_ce_offset: Offset of the software portal cache-enabled area
+ * @qbman_portal_ci_offset: Offset of the software portal
+ * cache-inhibited area
+ * @qbman_portal_id: Software portal ID
+ * @channel_mode: Notification channel mode
+ * @num_priorities: Number of priorities for the notification
+ * channel (1-8); relevant only if
+ * 'channel_mode = DPIO_LOCAL_CHANNEL'
+ * @qbman_version: QBMAN version
*/
struct dpio_attr {
- int id;
- uint64_t qbman_portal_ce_offset;
- uint64_t qbman_portal_ci_offset;
- uint16_t qbman_portal_id;
- enum dpio_channel_mode channel_mode;
- uint8_t num_priorities;
- uint32_t qbman_version;
- uint32_t clk;
+ int id;
+ uint64_t qbman_portal_ce_offset;
+ uint64_t qbman_portal_ci_offset;
+ uint16_t qbman_portal_id;
+ enum dpio_channel_mode channel_mode;
+ uint8_t num_priorities;
+ uint32_t qbman_version;
+ uint32_t clk;
};
-/**
- * dpio_get_attributes() - Retrieve DPIO attributes
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPIO object
- * @attr: Returned object's attributes
- *
- * Return: '0' on Success; Error code otherwise
- */
-int dpio_get_attributes(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- struct dpio_attr *attr);
+int dpio_get_attributes(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpio_attr *attr);
-/**
- * dpio_get_api_version() - Get Data Path I/O API version
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @major_ver: Major version of data path i/o API
- * @minor_ver: Minor version of data path i/o API
- *
- * Return: '0' on Success; Error code otherwise.
- */
int dpio_get_api_version(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t *major_ver,
diff --git a/drivers/bus/fslmc/mc/fsl_dpio_cmd.h b/drivers/bus/fslmc/mc/fsl_dpio_cmd.h
index d757507..3e9e1f6 100644
--- a/drivers/bus/fslmc/mc/fsl_dpio_cmd.h
+++ b/drivers/bus/fslmc/mc/fsl_dpio_cmd.h
@@ -5,7 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP.
+ * Copyright 2016-2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -41,82 +41,108 @@
#define _FSL_DPIO_CMD_H
/* DPIO Version */
-#define DPIO_VER_MAJOR 4
-#define DPIO_VER_MINOR 2
+#define DPIO_VER_MAJOR 4
+#define DPIO_VER_MINOR 2
+
+#define DPIO_CMD_BASE_VERSION 1
+#define DPIO_CMD_ID_OFFSET 4
+
+#define DPIO_CMD(id) (((id) << DPIO_CMD_ID_OFFSET) | DPIO_CMD_BASE_VERSION)
/* Command IDs */
-#define DPIO_CMDID_CLOSE 0x8001
-#define DPIO_CMDID_OPEN 0x8031
-#define DPIO_CMDID_CREATE 0x9031
-#define DPIO_CMDID_DESTROY 0x9831
-#define DPIO_CMDID_GET_API_VERSION 0xa031
-
-#define DPIO_CMDID_ENABLE 0x0021
-#define DPIO_CMDID_DISABLE 0x0031
-#define DPIO_CMDID_GET_ATTR 0x0041
-#define DPIO_CMDID_RESET 0x0051
-#define DPIO_CMDID_IS_ENABLED 0x0061
-
-#define DPIO_CMDID_SET_STASHING_DEST 0x1201
-#define DPIO_CMDID_GET_STASHING_DEST 0x1211
-#define DPIO_CMDID_ADD_STATIC_DEQUEUE_CHANNEL 0x1221
-#define DPIO_CMDID_REMOVE_STATIC_DEQUEUE_CHANNEL 0x1231
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPIO_CMD_OPEN(cmd, dpio_id) \
- MC_CMD_OP(cmd, 0, 0, 32, uint32_t, dpio_id)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPIO_CMD_CREATE(cmd, cfg) \
-do { \
- MC_CMD_OP(cmd, 0, 16, 2, enum dpio_channel_mode, \
- cfg->channel_mode);\
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, cfg->num_priorities);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPIO_RSP_IS_ENABLED(cmd, en) \
- MC_RSP_OP(cmd, 0, 0, 1, int, en)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPIO_RSP_GET_ATTRIBUTES(cmd, attr) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 32, int, (attr)->id);\
- MC_RSP_OP(cmd, 0, 32, 16, uint16_t, (attr)->qbman_portal_id);\
- MC_RSP_OP(cmd, 0, 48, 8, uint8_t, (attr)->num_priorities);\
- MC_RSP_OP(cmd, 0, 56, 4, enum dpio_channel_mode,\
- (attr)->channel_mode);\
- MC_RSP_OP(cmd, 1, 0, 64, uint64_t, (attr)->qbman_portal_ce_offset);\
- MC_RSP_OP(cmd, 2, 0, 64, uint64_t, (attr)->qbman_portal_ci_offset);\
- MC_RSP_OP(cmd, 3, 0, 32, uint32_t, (attr)->qbman_version);\
- MC_RSP_OP(cmd, 4, 0, 32, uint32_t, (attr)->clk);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPIO_CMD_SET_STASHING_DEST(cmd, sdest) \
- MC_CMD_OP(cmd, 0, 0, 8, uint8_t, sdest)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPIO_RSP_GET_STASHING_DEST(cmd, sdest) \
- MC_RSP_OP(cmd, 0, 0, 8, uint8_t, sdest)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPIO_CMD_ADD_STATIC_DEQUEUE_CHANNEL(cmd, dpcon_id) \
- MC_CMD_OP(cmd, 0, 0, 32, int, dpcon_id)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPIO_RSP_ADD_STATIC_DEQUEUE_CHANNEL(cmd, channel_index) \
- MC_RSP_OP(cmd, 0, 0, 8, uint8_t, channel_index)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPIO_CMD_REMOVE_STATIC_DEQUEUE_CHANNEL(cmd, dpcon_id) \
- MC_CMD_OP(cmd, 0, 0, 32, int, dpcon_id)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPIO_RSP_GET_API_VERSION(cmd, major, minor) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 16, uint16_t, major);\
- MC_RSP_OP(cmd, 0, 16, 16, uint16_t, minor);\
-} while (0)
+#define DPIO_CMDID_CLOSE DPIO_CMD(0x800)
+#define DPIO_CMDID_OPEN DPIO_CMD(0x803)
+#define DPIO_CMDID_CREATE DPIO_CMD(0x903)
+#define DPIO_CMDID_DESTROY DPIO_CMD(0x983)
+#define DPIO_CMDID_GET_API_VERSION DPIO_CMD(0xa03)
+
+#define DPIO_CMDID_ENABLE DPIO_CMD(0x002)
+#define DPIO_CMDID_DISABLE DPIO_CMD(0x003)
+#define DPIO_CMDID_GET_ATTR DPIO_CMD(0x004)
+#define DPIO_CMDID_RESET DPIO_CMD(0x005)
+#define DPIO_CMDID_IS_ENABLED DPIO_CMD(0x006)
+
+#define DPIO_CMDID_SET_IRQ_ENABLE DPIO_CMD(0x012)
+#define DPIO_CMDID_GET_IRQ_ENABLE DPIO_CMD(0x013)
+#define DPIO_CMDID_SET_IRQ_MASK DPIO_CMD(0x014)
+#define DPIO_CMDID_GET_IRQ_MASK DPIO_CMD(0x015)
+#define DPIO_CMDID_GET_IRQ_STATUS DPIO_CMD(0x016)
+#define DPIO_CMDID_CLEAR_IRQ_STATUS DPIO_CMD(0x017)
+
+#define DPIO_CMDID_SET_STASHING_DEST DPIO_CMD(0x120)
+#define DPIO_CMDID_GET_STASHING_DEST DPIO_CMD(0x121)
+#define DPIO_CMDID_ADD_STATIC_DEQUEUE_CHANNEL DPIO_CMD(0x122)
+#define DPIO_CMDID_REMOVE_STATIC_DEQUEUE_CHANNEL DPIO_CMD(0x123)
+
+/* Macros for accessing command fields smaller than 1byte */
+#define DPIO_MASK(field) \
+ GENMASK(DPIO_##field##_SHIFT + DPIO_##field##_SIZE - 1, \
+ DPIO_##field##_SHIFT)
+#define dpio_set_field(var, field, val) \
+ ((var) |= (((val) << DPIO_##field##_SHIFT) & DPIO_MASK(field)))
+#define dpio_get_field(var, field) \
+ (((var) & DPIO_MASK(field)) >> DPIO_##field##_SHIFT)
+
+#pragma pack(push, 1)
+struct dpio_cmd_open {
+ uint32_t dpio_id;
+};
+
+#define DPIO_CHANNEL_MODE_SHIFT 0
+#define DPIO_CHANNEL_MODE_SIZE 2
+
+struct dpio_cmd_create {
+ uint16_t pad1;
+ /* from LSB: channel_mode:2 */
+ uint8_t channel_mode;
+ uint8_t pad2;
+ uint8_t num_priorities;
+};
+
+struct dpio_cmd_destroy {
+ uint32_t dpio_id;
+};
+
+#define DPIO_ENABLE_SHIFT 0
+#define DPIO_ENABLE_SIZE 1
+
+struct dpio_rsp_is_enabled {
+ /* only the LSB */
+ uint8_t en;
+};
+
+#define DPIO_ATTR_CHANNEL_MODE_SHIFT 0
+#define DPIO_ATTR_CHANNEL_MODE_SIZE 4
+
+struct dpio_rsp_get_attr {
+ uint32_t id;
+ uint16_t qbman_portal_id;
+ uint8_t num_priorities;
+ /* from LSB: channel_mode:4 */
+ uint8_t channel_mode;
+ uint64_t qbman_portal_ce_offset;
+ uint64_t qbman_portal_ci_offset;
+ uint32_t qbman_version;
+ uint32_t pad;
+ uint32_t clk;
+};
+
+struct dpio_stashing_dest {
+ uint8_t sdest;
+};
+
+struct dpio_cmd_static_dequeue_channel {
+ uint32_t dpcon_id;
+};
+
+struct dpio_rsp_add_static_dequeue_channel {
+ uint8_t channel_index;
+};
+
+struct dpio_rsp_get_api_version {
+ uint16_t major;
+ uint16_t minor;
+};
+#pragma pack(pop)
#endif /* _FSL_DPIO_CMD_H */
diff --git a/drivers/bus/fslmc/mc/fsl_dpmng.h b/drivers/bus/fslmc/mc/fsl_dpmng.h
index c2ddde0..97030e4 100644
--- a/drivers/bus/fslmc/mc/fsl_dpmng.h
+++ b/drivers/bus/fslmc/mc/fsl_dpmng.h
@@ -5,6 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2015 Freescale Semiconductor Inc.
+ * Copyright 2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -39,7 +40,8 @@
#ifndef __FSL_DPMNG_H
#define __FSL_DPMNG_H
-/* Management Complex General API
+/*
+ * Management Complex General API
* Contains general API for the Management Complex firmware
*/
@@ -49,10 +51,10 @@ struct fsl_mc_io;
* Management Complex firmware version information
*/
#define MC_VER_MAJOR 10
-#define MC_VER_MINOR 1
+#define MC_VER_MINOR 3
/**
- * struct mc_versoin
+ * struct mc_version
* @major: Major version number: incremented on API compatibility changes
* @minor: Minor version number: incremented on API additions (that are
* backward compatible); reset when major version is incremented
@@ -65,42 +67,21 @@ struct mc_version {
uint32_t revision;
};
+int mc_get_version(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ struct mc_version *mc_ver_info);
+
/**
* struct mc_platform
- * @svr: system version (content of platform SVR register)
- * @pvr: processor version (content of platform PVR register)
+ * @svr: System version (content of platform SVR register)
+ * @pvr: Processor version (content of platform PVR register)
*/
struct mc_soc_version {
uint32_t svr;
uint32_t pvr;
};
-/**
- * mc_get_version() - Retrieves the Management Complex firmware
- * version information
- * @mc_io: Pointer to opaque I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @mc_ver_info: Returned version information structure
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int mc_get_version(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- struct mc_version *mc_ver_info);
-
-/**
- * mc_get_soc_version() - Retrieves the Management Complex firmware
- * version information
- * @mc_io: Pointer to opaque I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @mc_platform_info: Returned version information structure. The structure
- * contains the values of SVR and PVR registers. Please consult platform
- * specific reference manual for detailed information.
- *
- * Return: '0' on Success; Error code otherwise.
- */
int mc_get_soc_version(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
struct mc_soc_version *mc_platform_info);
-
#endif /* __FSL_DPMNG_H */
diff --git a/drivers/bus/fslmc/mc/fsl_dpmng_cmd.h b/drivers/bus/fslmc/mc/fsl_dpmng_cmd.h
index 3a36b6d..4c0a629 100644
--- a/drivers/bus/fslmc/mc/fsl_dpmng_cmd.h
+++ b/drivers/bus/fslmc/mc/fsl_dpmng_cmd.h
@@ -5,6 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
+ * Copyright 2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -36,26 +37,32 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
+
#ifndef __FSL_DPMNG_CMD_H
#define __FSL_DPMNG_CMD_H
+/* Command versioning */
+#define DPMNG_CMD_BASE_VERSION 1
+#define DPMNG_CMD_ID_OFFSET 4
+
+#define DPMNG_CMD(id) ((id << DPMNG_CMD_ID_OFFSET) | DPMNG_CMD_BASE_VERSION)
+
/* Command IDs */
-#define DPMNG_CMDID_GET_VERSION 0x8311
-#define DPMNG_CMDID_GET_SOC_VERSION 0x8321
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPMNG_RSP_GET_VERSION(cmd, mc_ver_info) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 32, uint32_t, mc_ver_info->revision); \
- MC_RSP_OP(cmd, 0, 32, 32, uint32_t, mc_ver_info->major); \
- MC_RSP_OP(cmd, 1, 0, 32, uint32_t, mc_ver_info->minor); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPMNG_RSP_GET_SOC_VERSION(cmd, mc_soc_version) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 32, uint32_t, mc_soc_version->svr); \
- MC_RSP_OP(cmd, 0, 32, 32, uint32_t, mc_soc_version->pvr); \
-} while (0)
+#define DPMNG_CMDID_GET_VERSION DPMNG_CMD(0x831)
+#define DPMNG_CMDID_GET_SOC_VERSION DPMNG_CMD(0x832)
+
+#pragma pack(push, 1)
+struct dpmng_rsp_get_version {
+ uint32_t revision;
+ uint32_t version_major;
+ uint32_t version_minor;
+};
+
+struct dpmng_rsp_get_soc_version {
+ uint32_t svr;
+ uint32_t pvr;
+};
+
+#pragma pack(pop)
#endif /* __FSL_DPMNG_CMD_H */
diff --git a/drivers/bus/fslmc/mc/fsl_mc_cmd.h b/drivers/bus/fslmc/mc/fsl_mc_cmd.h
index 0ca4345..2cec29e 100644
--- a/drivers/bus/fslmc/mc/fsl_mc_cmd.h
+++ b/drivers/bus/fslmc/mc/fsl_mc_cmd.h
@@ -5,7 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP.
+ * Copyright 2016-2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -40,146 +40,118 @@
#ifndef __FSL_MC_CMD_H
#define __FSL_MC_CMD_H
-#define MC_CMD_NUM_OF_PARAMS 7
-
-#define MAKE_UMASK64(_width) \
- ((uint64_t)((_width) < 64 ? ((uint64_t)1 << (_width)) - 1 : \
- (uint64_t)-1))
+#include <rte_byteorder.h>
+#include <stdint.h>
-static inline uint64_t mc_enc(int lsoffset, int width, uint64_t val)
-{
- return (uint64_t)(((uint64_t)val & MAKE_UMASK64(width)) << lsoffset);
-}
+#define MC_CMD_NUM_OF_PARAMS 7
-static inline uint64_t mc_dec(uint64_t val, int lsoffset, int width)
-{
- return (uint64_t)((val >> lsoffset) & MAKE_UMASK64(width));
-}
+#define phys_addr_t uint64_t
+
+#define u64 uint64_t
+#define u32 uint32_t
+#define u16 uint16_t
+#define u8 uint8_t
+
+#define cpu_to_le64 rte_cpu_to_le_64
+#define cpu_to_le32 rte_cpu_to_le_32
+#define cpu_to_le16 rte_cpu_to_le_16
+
+#define le64_to_cpu rte_le_to_cpu_64
+#define le32_to_cpu rte_le_to_cpu_32
+#define le16_to_cpu rte_le_to_cpu_16
+
+#define BITS_PER_LONG 64
+#define GENMASK(h, l) \
+ (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
+
+struct mc_cmd_header {
+ union {
+ struct {
+ uint8_t src_id;
+ uint8_t flags_hw;
+ uint8_t status;
+ uint8_t flags_sw;
+ uint16_t token;
+ uint16_t cmd_id;
+ };
+ uint32_t word[2];
+ };
+};
struct mc_command {
uint64_t header;
uint64_t params[MC_CMD_NUM_OF_PARAMS];
};
-/**
- * enum mc_cmd_status - indicates MC status at command response
- * @MC_CMD_STATUS_OK: Completed successfully
- * @MC_CMD_STATUS_READY: Ready to be processed
- * @MC_CMD_STATUS_AUTH_ERR: Authentication error
- * @MC_CMD_STATUS_NO_PRIVILEGE: No privilege
- * @MC_CMD_STATUS_DMA_ERR: DMA or I/O error
- * @MC_CMD_STATUS_CONFIG_ERR: Configuration error
- * @MC_CMD_STATUS_TIMEOUT: Operation timed out
- * @MC_CMD_STATUS_NO_RESOURCE: No resources
- * @MC_CMD_STATUS_NO_MEMORY: No memory available
- * @MC_CMD_STATUS_BUSY: Device is busy
- * @MC_CMD_STATUS_UNSUPPORTED_OP: Unsupported operation
- * @MC_CMD_STATUS_INVALID_STATE: Invalid state
- */
-enum mc_cmd_status {
- MC_CMD_STATUS_OK = 0x0,
- MC_CMD_STATUS_READY = 0x1,
- MC_CMD_STATUS_AUTH_ERR = 0x3,
- MC_CMD_STATUS_NO_PRIVILEGE = 0x4,
- MC_CMD_STATUS_DMA_ERR = 0x5,
- MC_CMD_STATUS_CONFIG_ERR = 0x6,
- MC_CMD_STATUS_TIMEOUT = 0x7,
- MC_CMD_STATUS_NO_RESOURCE = 0x8,
- MC_CMD_STATUS_NO_MEMORY = 0x9,
- MC_CMD_STATUS_BUSY = 0xA,
- MC_CMD_STATUS_UNSUPPORTED_OP = 0xB,
- MC_CMD_STATUS_INVALID_STATE = 0xC
+struct mc_rsp_create {
+ uint32_t object_id;
};
-/* MC command flags */
+enum mc_cmd_status {
+ MC_CMD_STATUS_OK = 0x0, /* Completed successfully */
+ MC_CMD_STATUS_READY = 0x1, /* Ready to be processed */
+ MC_CMD_STATUS_AUTH_ERR = 0x3, /* Authentication error */
+ MC_CMD_STATUS_NO_PRIVILEGE = 0x4, /* No privilege */
+ MC_CMD_STATUS_DMA_ERR = 0x5, /* DMA or I/O error */
+ MC_CMD_STATUS_CONFIG_ERR = 0x6, /* Configuration error */
+ MC_CMD_STATUS_TIMEOUT = 0x7, /* Operation timed out */
+ MC_CMD_STATUS_NO_RESOURCE = 0x8, /* No resources */
+ MC_CMD_STATUS_NO_MEMORY = 0x9, /* No memory available */
+ MC_CMD_STATUS_BUSY = 0xA, /* Device is busy */
+ MC_CMD_STATUS_UNSUPPORTED_OP = 0xB, /* Unsupported operation */
+ MC_CMD_STATUS_INVALID_STATE = 0xC /* Invalid state */
+};
-/**
- * High priority flag
- */
-#define MC_CMD_FLAG_PRI 0x00008000
-/**
- * Command completion flag
+/*
+ * MC command flags
*/
-#define MC_CMD_FLAG_INTR_DIS 0x01000000
-/**
- * Command ID field offset
- */
-#define MC_CMD_HDR_CMDID_O 48
-/**
- * Command ID field size
- */
-#define MC_CMD_HDR_CMDID_S 16
-/**
- * Token field offset
- */
-#define MC_CMD_HDR_TOKEN_O 32
-/**
- * Token field size
- */
-#define MC_CMD_HDR_TOKEN_S 16
-/**
- * Status field offset
- */
-#define MC_CMD_HDR_STATUS_O 16
-/**
- * Status field size
- */
-#define MC_CMD_HDR_STATUS_S 8
-/**
- * Flags field offset
- */
-#define MC_CMD_HDR_FLAGS_O 0
-/**
- * Flags field size
- */
-#define MC_CMD_HDR_FLAGS_S 32
-/**
- * Command flags mask
- */
+/* High priority flag */
+#define MC_CMD_FLAG_PRI 0x80
+/* Command completion flag */
+#define MC_CMD_FLAG_INTR_DIS 0x01
+
#define MC_CMD_HDR_FLAGS_MASK 0xFF00FF00
-#define MC_CMD_HDR_READ_STATUS(_hdr) \
- ((enum mc_cmd_status)mc_dec((_hdr), \
- MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S))
+int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd);
-#define MC_CMD_HDR_READ_TOKEN(_hdr) \
- ((uint16_t)mc_dec((_hdr), MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S))
+static inline uint64_t mc_encode_cmd_header(uint16_t cmd_id,
+ uint32_t cmd_flags,
+ uint16_t token)
+{
+ uint64_t header = 0;
+ struct mc_cmd_header *hdr = (struct mc_cmd_header *)&header;
-#define MC_PREP_OP(_ext, _param, _offset, _width, _type, _arg) \
- ((_ext)[_param] |= cpu_to_le64(mc_enc((_offset), (_width), _arg)))
+ hdr->cmd_id = cpu_to_le16(cmd_id);
+ hdr->token = cpu_to_le16(token);
+ hdr->status = MC_CMD_STATUS_READY;
+ hdr->word[0] |= cpu_to_le32(cmd_flags & MC_CMD_HDR_FLAGS_MASK);
-#define MC_EXT_OP(_ext, _param, _offset, _width, _type, _arg) \
- (_arg = (_type)mc_dec(cpu_to_le64(_ext[_param]), (_offset), (_width)))
+ return header;
+}
-#define MC_CMD_OP(_cmd, _param, _offset, _width, _type, _arg) \
- ((_cmd).params[_param] |= mc_enc((_offset), (_width), _arg))
+static inline uint16_t mc_cmd_hdr_read_token(struct mc_command *cmd)
+{
+ struct mc_cmd_header *hdr = (struct mc_cmd_header *)&cmd->header;
+ uint16_t token = le16_to_cpu(hdr->token);
-#define MC_RSP_OP(_cmd, _param, _offset, _width, _type, _arg) \
- (_arg = (_type)mc_dec(_cmd.params[_param], (_offset), (_width)))
+ return token;
+}
-/* cmd, param, offset, width, type, arg_name */
-#define CMD_CREATE_RSP_GET_OBJ_ID_PARAM0(cmd, object_id) \
- MC_RSP_OP(cmd, 0, 0, 32, uint32_t, object_id)
+static inline uint32_t mc_cmd_read_object_id(struct mc_command *cmd)
+{
+ struct mc_rsp_create *rsp_params;
-/* cmd, param, offset, width, type, arg_name */
-#define CMD_DESTROY_SET_OBJ_ID_PARAM0(cmd, object_id) \
- MC_CMD_OP(cmd, 0, 0, 32, uint32_t, object_id)
+ rsp_params = (struct mc_rsp_create *)cmd->params;
+ return le32_to_cpu(rsp_params->object_id);
+}
-static inline uint64_t mc_encode_cmd_header(uint16_t cmd_id,
- uint32_t cmd_flags,
- uint16_t token)
+static inline enum mc_cmd_status mc_cmd_read_status(struct mc_command *cmd)
{
- uint64_t hdr;
-
- hdr = mc_enc(MC_CMD_HDR_CMDID_O, MC_CMD_HDR_CMDID_S, cmd_id);
- hdr |= mc_enc(MC_CMD_HDR_FLAGS_O, MC_CMD_HDR_FLAGS_S,
- (cmd_flags & MC_CMD_HDR_FLAGS_MASK));
- hdr |= mc_enc(MC_CMD_HDR_TOKEN_O, MC_CMD_HDR_TOKEN_S, token);
- hdr |= mc_enc(MC_CMD_HDR_STATUS_O, MC_CMD_HDR_STATUS_S,
- MC_CMD_STATUS_READY);
+ struct mc_cmd_header *hdr = (struct mc_cmd_header *)&cmd->header;
+ uint8_t status = hdr->status;
- return hdr;
+ return (enum mc_cmd_status)status;
}
/**
@@ -191,20 +163,17 @@ static inline uint64_t mc_encode_cmd_header(uint16_t cmd_id,
static inline void mc_write_command(struct mc_command __iomem *portal,
struct mc_command *cmd)
{
- int i;
- uint32_t word;
+ struct mc_cmd_header *cmd_header = (struct mc_cmd_header *)&cmd->header;
char *header = (char *)&portal->header;
+ int i;
/* copy command parameters into the portal */
for (i = 0; i < MC_CMD_NUM_OF_PARAMS; i++)
iowrite64(cmd->params[i], &portal->params[i]);
/* submit the command by writing the header */
- word = (uint32_t)mc_dec(cmd->header, 32, 32);
- iowrite32(word, (((uint32_t *)header) + 1));
-
- word = (uint32_t)mc_dec(cmd->header, 0, 32);
- iowrite32(word, (uint32_t *)header);
+ iowrite32(le32_to_cpu(cmd_header->word[1]), (((uint32_t *)header) + 1));
+ iowrite32(le32_to_cpu(cmd_header->word[0]), (uint32_t *)header);
}
/**
@@ -225,7 +194,7 @@ static inline enum mc_cmd_status mc_read_response(
/* Copy command response header from MC portal: */
resp->header = ioread64(&portal->header);
- status = MC_CMD_HDR_READ_STATUS(resp->header);
+ status = mc_cmd_read_status(resp);
if (status != MC_CMD_STATUS_OK)
return status;
diff --git a/drivers/bus/fslmc/mc/fsl_mc_sys.h b/drivers/bus/fslmc/mc/fsl_mc_sys.h
index ebada60..d803205 100644
--- a/drivers/bus/fslmc/mc/fsl_mc_sys.h
+++ b/drivers/bus/fslmc/mc/fsl_mc_sys.h
@@ -5,6 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2015 Freescale Semiconductor Inc.
+ * Copyright 2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -65,40 +66,31 @@ struct fsl_mc_io {
#include <sys/uio.h>
#include <linux/byteorder/little_endian.h>
-#define cpu_to_le64(x) __cpu_to_le64(x)
#ifndef dmb
#define dmb() {__asm__ __volatile__("" : : : "memory"); }
#endif
-#define __iormb() dmb()
-#define __iowmb() dmb()
-#define __arch_getq(a) (*(volatile unsigned long *)(a))
-#define __arch_putq(v, a) (*(volatile unsigned long *)(a) = (v))
-#define __arch_putq32(v, a) (*(volatile unsigned int *)(a) = (v))
-#define readq(c) \
+#define __iormb() dmb()
+#define __iowmb() dmb()
+#define __arch_getq(a) (*(volatile uint64_t *)(a))
+#define __arch_putq(v, a) (*(volatile uint64_t *)(a) = (v))
+#define __arch_putq32(v, a) (*(volatile uint32_t *)(a) = (v))
+#define readq(c) \
({ uint64_t __v = __arch_getq(c); __iormb(); __v; })
-#define writeq(v, c) \
+#define writeq(v, c) \
({ uint64_t __v = v; __iowmb(); __arch_putq(__v, c); __v; })
#define writeq32(v, c) \
({ uint32_t __v = v; __iowmb(); __arch_putq32(__v, c); __v; })
-#define ioread64(_p) readq(_p)
-#define iowrite64(_v, _p) writeq(_v, _p)
-#define iowrite32(_v, _p) writeq32(_v, _p)
+#define ioread64(_p) readq(_p)
+#define iowrite64(_v, _p) writeq(_v, _p)
+#define iowrite32(_v, _p) writeq32(_v, _p)
#define __iomem
-struct fsl_mc_io {
- void *regs;
-};
-
-#ifndef ENOTSUP
-#define ENOTSUP 95
-#endif
-
/*GPP is supposed to use MC commands with low priority*/
#define CMD_PRI_LOW 0 /*!< Low Priority command indication */
-struct mc_command;
-
-int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd);
+struct fsl_mc_io {
+ void *regs;
+};
#endif /* __linux_driver__ */
diff --git a/drivers/bus/fslmc/mc/mc_sys.c b/drivers/bus/fslmc/mc/mc_sys.c
index 4573165..f0f9a26 100644
--- a/drivers/bus/fslmc/mc/mc_sys.c
+++ b/drivers/bus/fslmc/mc/mc_sys.c
@@ -5,6 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2015 Freescale Semiconductor Inc.
+ * Copyright 2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -86,6 +87,7 @@ static int mc_status_to_error(enum mc_cmd_status status)
int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd)
{
enum mc_cmd_status status;
+ uint64_t response;
if (!mc_io || !mc_io->regs)
return -EACCES;
@@ -97,7 +99,8 @@ int mc_send_command(struct fsl_mc_io *mc_io, struct mc_command *cmd)
/* Spin until status changes */
do {
- status = MC_CMD_HDR_READ_STATUS(ioread64(mc_io->regs));
+ response = ioread64(mc_io->regs);
+ status = mc_cmd_read_status((struct mc_command *)&response);
/* --- Call wait function here to prevent blocking ---
* Change the loop condition accordingly to exit on timeout.
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 10/30] net/dpaa2: update MC to 10.3.x
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (8 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 09/30] bus/fslmc: update MC to 10.3.x Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 11/30] crypto/dpaa2_sec: " Hemant Agrawal
` (20 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Shreyansh Jain <shreyansh.jain@nxp.com>
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/Makefile | 1 +
drivers/net/dpaa2/base/dpaa2_hw_dpni.c | 11 +-
drivers/net/dpaa2/dpaa2_ethdev.c | 21 +-
drivers/net/dpaa2/dpaa2_ethdev.h | 2 +-
drivers/net/dpaa2/mc/dpkg.c | 107 ++++
drivers/net/dpaa2/mc/dpni.c | 1093 ++++++++++++++++++++++++++------
drivers/net/dpaa2/mc/fsl_dpkg.h | 69 +-
drivers/net/dpaa2/mc/fsl_dpni.h | 1083 +++++++++----------------------
drivers/net/dpaa2/mc/fsl_dpni_cmd.h | 970 +++++++++++++++-------------
drivers/net/dpaa2/mc/fsl_net.h | 2 +-
10 files changed, 1939 insertions(+), 1420 deletions(-)
create mode 100644 drivers/net/dpaa2/mc/dpkg.c
diff --git a/drivers/net/dpaa2/Makefile b/drivers/net/dpaa2/Makefile
index 32cd819..2f551d5 100644
--- a/drivers/net/dpaa2/Makefile
+++ b/drivers/net/dpaa2/Makefile
@@ -63,6 +63,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += base/dpaa2_hw_dpni.c
SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_rxtx.c
SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_ethdev.c
SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpni.c
+SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpkg.c
LDLIBS += -lrte_bus_fslmc
LDLIBS += -lrte_mempool_dpaa2
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
index 4c82aa8..1269dd2 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
@@ -79,7 +79,7 @@ dpaa2_setup_flow_dist(struct rte_eth_dev *eth_dev,
tc_cfg.dist_size = eth_dev->data->nb_rx_queues;
tc_cfg.dist_mode = DPNI_DIST_MODE_HASH;
- ret = dpni_prepare_key_cfg(&kg_cfg, p_params);
+ ret = dpkg_prepare_key_cfg(&kg_cfg, p_params);
if (ret) {
RTE_LOG(ERR, PMD, "Unable to prepare extract parameters\n");
rte_free(p_params);
@@ -118,12 +118,12 @@ int dpaa2_remove_flow_dist(
}
memset(p_params, 0, DIST_PARAM_IOVA_SIZE);
memset(&tc_cfg, 0, sizeof(struct dpni_rx_tc_dist_cfg));
-
+ kg_cfg.num_extracts = 0;
tc_cfg.key_cfg_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(p_params));
tc_cfg.dist_size = 0;
tc_cfg.dist_mode = DPNI_DIST_MODE_NONE;
- ret = dpni_prepare_key_cfg(&kg_cfg, p_params);
+ ret = dpkg_prepare_key_cfg(&kg_cfg, p_params);
if (ret) {
RTE_LOG(ERR, PMD, "Unable to prepare extract parameters\n");
rte_free(p_params);
@@ -133,12 +133,10 @@ int dpaa2_remove_flow_dist(
ret = dpni_set_rx_tc_dist(dpni, CMD_PRI_LOW, priv->token, tc_index,
&tc_cfg);
rte_free(p_params);
- if (ret) {
+ if (ret)
RTE_LOG(ERR, PMD,
"Setting distribution for Rx failed with err: %d\n",
ret);
- return ret;
- }
return ret;
}
@@ -337,6 +335,7 @@ dpaa2_attach_bp_list(struct dpaa2_dev_priv *priv,
bpool_cfg.pools[0].backup_pool = 0;
bpool_cfg.pools[0].buffer_size = RTE_ALIGN_CEIL(bp_list->buf_pool.size,
DPAA2_PACKET_LAYOUT_ALIGN);
+ bpool_cfg.pools[0].priority_mask = 0;
retcode = dpni_set_pools(dpni, CMD_PRI_LOW, priv->token, &bpool_cfg);
if (retcode != 0) {
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 360109e..945dcc7 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -941,7 +941,7 @@ void dpaa2_dev_stats_get(struct rte_eth_dev *dev,
/*Get Counters from page_0*/
retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
- page0, &value);
+ page0, 0, &value);
if (retcode)
goto err;
@@ -950,7 +950,7 @@ void dpaa2_dev_stats_get(struct rte_eth_dev *dev,
/*Get Counters from page_1*/
retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
- page1, &value);
+ page1, 0, &value);
if (retcode)
goto err;
@@ -959,7 +959,7 @@ void dpaa2_dev_stats_get(struct rte_eth_dev *dev,
/*Get Counters from page_2*/
retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
- page2, &value);
+ page2, 0, &value);
if (retcode)
goto err;
@@ -1384,22 +1384,19 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
goto init_err;
}
- priv->num_tc = attr.num_tcs;
+ priv->num_rx_tc = attr.num_rx_tcs;
- /* Resetting the "num_rx_vqueues" to equal number of queues in first TC
+ /* Resetting the "num_rx_queues" to equal number of queues in first TC
* as only one TC is supported on Rx Side. Once Multiple TCs will be
* in use for Rx processing then this will be changed or removed.
*/
priv->nb_rx_queues = attr.num_queues;
- /* TODO:Using hard coded value for number of TX queues due to dependency
- * in MC.
- */
- priv->nb_tx_queues = 8;
+ /* Using number of TX queues as number of TX TCs */
+ priv->nb_tx_queues = attr.num_tx_tcs;
- PMD_INIT_LOG(DEBUG, "num TC - RX %d", priv->num_tc);
- PMD_INIT_LOG(DEBUG, "nb_tx_queues %d", priv->nb_tx_queues);
- PMD_INIT_LOG(DEBUG, "nb_rx_queues %d", priv->nb_rx_queues);
+ PMD_DRV_LOG(DEBUG, "RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d",
+ priv->num_tc, priv->nb_rx_queues, priv->nb_tx_queues);
priv->hw = dpni_dev;
priv->hw_id = hw_id;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index a2902da..07e1da6 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -87,7 +87,7 @@ struct dpaa2_dev_priv {
uint32_t options;
uint8_t max_mac_filters;
uint8_t max_vlan_filters;
- uint8_t num_tc;
+ uint8_t num_rx_tc;
uint8_t flags; /*dpaa2 config flags */
};
diff --git a/drivers/net/dpaa2/mc/dpkg.c b/drivers/net/dpaa2/mc/dpkg.c
new file mode 100644
index 0000000..3f98907
--- /dev/null
+++ b/drivers/net/dpaa2/mc/dpkg.c
@@ -0,0 +1,107 @@
+/*-
+ * This file is provided under a dual BSD/GPLv2 license. When using or
+ * redistributing this file, you may do so under either license.
+ *
+ * BSD LICENSE
+ *
+ * Copyright 2017 NXP
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of the above-listed copyright holders nor the
+ * names of any contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ * GPL LICENSE SUMMARY
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#include <fsl_mc_sys.h>
+#include <fsl_mc_cmd.h>
+#include <fsl_dpkg.h>
+
+/**
+ * dpkg_prepare_key_cfg() - function prepare extract parameters
+ * @cfg: defining a full Key Generation profile (rule)
+ * @key_cfg_buf: Zeroed 256 bytes of memory before mapping it to DMA
+ *
+ * This function has to be called before the following functions:
+ * - dpni_set_rx_tc_dist()
+ * - dpni_set_qos_table()
+ * - dpkg_prepare_key_cfg()
+ */
+int
+dpkg_prepare_key_cfg(const struct dpkg_profile_cfg *cfg, uint8_t *key_cfg_buf)
+{
+ int i, j;
+ struct dpni_ext_set_rx_tc_dist *dpni_ext;
+ struct dpni_dist_extract *extr;
+
+ if (cfg->num_extracts > DPKG_MAX_NUM_OF_EXTRACTS)
+ return -EINVAL;
+
+ dpni_ext = (struct dpni_ext_set_rx_tc_dist *)key_cfg_buf;
+ dpni_ext->num_extracts = cfg->num_extracts;
+
+ for (i = 0; i < cfg->num_extracts; i++) {
+ extr = &dpni_ext->extracts[i];
+
+ switch (cfg->extracts[i].type) {
+ case DPKG_EXTRACT_FROM_HDR:
+ extr->prot = cfg->extracts[i].extract.from_hdr.prot;
+ dpkg_set_field(extr->efh_type, EFH_TYPE,
+ cfg->extracts[i].extract.from_hdr.type);
+ extr->size = cfg->extracts[i].extract.from_hdr.size;
+ extr->offset = cfg->extracts[i].extract.from_hdr.offset;
+ extr->field = cpu_to_le32(
+ cfg->extracts[i].extract.from_hdr.field);
+ extr->hdr_index =
+ cfg->extracts[i].extract.from_hdr.hdr_index;
+ break;
+ case DPKG_EXTRACT_FROM_DATA:
+ extr->size = cfg->extracts[i].extract.from_data.size;
+ extr->offset =
+ cfg->extracts[i].extract.from_data.offset;
+ break;
+ case DPKG_EXTRACT_FROM_PARSE:
+ extr->size = cfg->extracts[i].extract.from_parse.size;
+ extr->offset =
+ cfg->extracts[i].extract.from_parse.offset;
+ break;
+ default:
+ return -EINVAL;
+ }
+
+ extr->num_of_byte_masks = cfg->extracts[i].num_of_byte_masks;
+ dpkg_set_field(extr->extract_type, EXTRACT_TYPE,
+ cfg->extracts[i].type);
+
+ for (j = 0; j < DPKG_NUM_OF_MASKS; j++) {
+ extr->masks[j].mask = cfg->extracts[i].masks[j].mask;
+ extr->masks[j].offset =
+ cfg->extracts[i].masks[j].offset;
+ }
+ }
+
+ return 0;
+}
diff --git a/drivers/net/dpaa2/mc/dpni.c b/drivers/net/dpaa2/mc/dpni.c
index c2d3969..f95e669 100644
--- a/drivers/net/dpaa2/mc/dpni.c
+++ b/drivers/net/dpaa2/mc/dpni.c
@@ -42,100 +42,39 @@
#include <fsl_dpni.h>
#include <fsl_dpni_cmd.h>
-int dpni_prepare_key_cfg(const struct dpkg_profile_cfg *cfg,
- uint8_t *key_cfg_buf)
-{
- int i, j;
- int offset = 0;
- int param = 1;
- uint64_t *params = (uint64_t *)key_cfg_buf;
-
- if (!key_cfg_buf || !cfg)
- return -EINVAL;
-
- params[0] |= mc_enc(0, 8, cfg->num_extracts);
- params[0] = cpu_to_le64(params[0]);
-
- if (cfg->num_extracts >= DPKG_MAX_NUM_OF_EXTRACTS)
- return -EINVAL;
-
- for (i = 0; i < cfg->num_extracts; i++) {
- switch (cfg->extracts[i].type) {
- case DPKG_EXTRACT_FROM_HDR:
- params[param] |= mc_enc(0, 8,
- cfg->extracts[i].extract.from_hdr.prot);
- params[param] |= mc_enc(8, 4,
- cfg->extracts[i].extract.from_hdr.type);
- params[param] |= mc_enc(16, 8,
- cfg->extracts[i].extract.from_hdr.size);
- params[param] |= mc_enc(24, 8,
- cfg->extracts[i].extract.
- from_hdr.offset);
- params[param] |= mc_enc(32, 32,
- cfg->extracts[i].extract.
- from_hdr.field);
- params[param] = cpu_to_le64(params[param]);
- param++;
- params[param] |= mc_enc(0, 8,
- cfg->extracts[i].extract.
- from_hdr.hdr_index);
- break;
- case DPKG_EXTRACT_FROM_DATA:
- params[param] |= mc_enc(16, 8,
- cfg->extracts[i].extract.
- from_data.size);
- params[param] |= mc_enc(24, 8,
- cfg->extracts[i].extract.
- from_data.offset);
- params[param] = cpu_to_le64(params[param]);
- param++;
- break;
- case DPKG_EXTRACT_FROM_PARSE:
- params[param] |= mc_enc(16, 8,
- cfg->extracts[i].extract.
- from_parse.size);
- params[param] |= mc_enc(24, 8,
- cfg->extracts[i].extract.
- from_parse.offset);
- params[param] = cpu_to_le64(params[param]);
- param++;
- break;
- default:
- return -EINVAL;
- }
- params[param] |= mc_enc(
- 24, 8, cfg->extracts[i].num_of_byte_masks);
- params[param] |= mc_enc(32, 4, cfg->extracts[i].type);
- params[param] = cpu_to_le64(params[param]);
- param++;
- for (offset = 0, j = 0;
- j < DPKG_NUM_OF_MASKS;
- offset += 16, j++) {
- params[param] |= mc_enc(
- (offset), 8, cfg->extracts[i].masks[j].mask);
- params[param] |= mc_enc(
- (offset + 8), 8,
- cfg->extracts[i].masks[j].offset);
- }
- params[param] = cpu_to_le64(params[param]);
- param++;
- }
- return 0;
-}
-
+/**
+ * dpni_open() - Open a control session for the specified object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @dpni_id: DPNI unique ID
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpni_create() function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_open(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
int dpni_id,
uint16_t *token)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_open *cmd_params;
+
int err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_OPEN,
cmd_flags,
0);
- DPNI_CMD_OPEN(cmd, dpni_id);
+ cmd_params = (struct dpni_cmd_open *)cmd.params;
+ cmd_params->dpni_id = cpu_to_le32(dpni_id);
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -143,11 +82,22 @@ int dpni_open(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+ *token = mc_cmd_hdr_read_token(&cmd);
return 0;
}
+/**
+ * dpni_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_close(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -163,12 +113,35 @@ int dpni_close(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
-int dpni_create(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- const struct dpni_cfg *cfg,
- uint32_t *obj_id)
+/**
+ * dpni_create() - Create the DPNI object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token: Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @cfg: Configuration structure
+ * @obj_id: Returned object id
+ *
+ * Create the DPNI object, allocate required resources and
+ * perform required initialization.
+ *
+ * The object can be created either by declaring it in the
+ * DPL file, or by calling this function.
+ *
+ * The function accepts an authentication token of a parent
+ * container that this object should be assigned to. The token
+ * can be '0' so the object will be assigned to the default container.
+ * The newly created object can be opened with the returned
+ * object id and using the container's associated tokens and MC portals.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_create(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ const struct dpni_cfg *cfg,
+ uint32_t *obj_id)
{
+ struct dpni_cmd_create *cmd_params;
struct mc_command cmd = { 0 };
int err;
@@ -176,7 +149,14 @@ int dpni_create(struct fsl_mc_io *mc_io,
cmd.header = mc_encode_cmd_header(DPNI_CMDID_CREATE,
cmd_flags,
dprc_token);
- DPNI_CMD_CREATE(cmd, cfg);
+ cmd_params = (struct dpni_cmd_create *)cmd.params;
+ cmd_params->options = cpu_to_le32(cfg->options);
+ cmd_params->num_queues = cfg->num_queues;
+ cmd_params->num_tcs = cfg->num_tcs;
+ cmd_params->mac_filter_entries = cfg->mac_filter_entries;
+ cmd_params->vlan_filter_entries = cfg->vlan_filter_entries;
+ cmd_params->qos_entries = cfg->qos_entries;
+ cmd_params->fs_entries = cpu_to_le16(cfg->fs_entries);
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -184,16 +164,32 @@ int dpni_create(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- CMD_CREATE_RSP_GET_OBJ_ID_PARAM0(cmd, *obj_id);
+ *obj_id = mc_cmd_read_object_id(&cmd);
return 0;
}
-int dpni_destroy(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- uint32_t object_id)
+/**
+ * dpni_destroy() - Destroy the DPNI object and release all its resources.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token: Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @object_id: The object id; it must be a valid id within the container that
+ * created this object;
+ *
+ * The function accepts the authentication token of the parent container that
+ * created the object (not the one that currently owns the object). The object
+ * is searched within parent using the provided 'object_id'.
+ * All tokens to the object must be closed before calling destroy.
+ *
+ * Return: '0' on Success; error code otherwise.
+ */
+int dpni_destroy(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ uint32_t object_id)
{
+ struct dpni_cmd_destroy *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
@@ -201,28 +197,63 @@ int dpni_destroy(struct fsl_mc_io *mc_io,
cmd_flags,
dprc_token);
/* set object id to destroy */
- CMD_DESTROY_SET_OBJ_ID_PARAM0(cmd, object_id);
+ cmd_params = (struct dpni_cmd_destroy *)cmd.params;
+ cmd_params->dpsw_id = cpu_to_le32(object_id);
+
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_set_pools() - Set buffer pools configuration
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @cfg: Buffer pools configuration
+ *
+ * mandatory for DPNI operation
+ * warning:Allowed only when DPNI is disabled
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_set_pools(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
const struct dpni_pools_cfg *cfg)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_pools *cmd_params;
+ int i;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_POOLS,
cmd_flags,
token);
- DPNI_CMD_SET_POOLS(cmd, cfg);
+ cmd_params = (struct dpni_cmd_set_pools *)cmd.params;
+ cmd_params->num_dpbp = cfg->num_dpbp;
+ for (i = 0; i < DPNI_MAX_DPBP; i++) {
+ cmd_params->pool[i].dpbp_id =
+ cpu_to_le16(cfg->pools[i].dpbp_id);
+ cmd_params->pool[i].priority_mask =
+ cfg->pools[i].priority_mask;
+ cmd_params->buffer_size[i] =
+ cpu_to_le16(cfg->pools[i].buffer_size);
+ cmd_params->backup_pool_mask |=
+ DPNI_BACKUP_POOL(cfg->pools[i].backup_pool, i);
+ }
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_enable() - Enable the DPNI, allow sending and receiving frames.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_enable(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -238,6 +269,14 @@ int dpni_enable(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_disable() - Disable the DPNI, stop sending and receiving frames.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_disable(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -253,15 +292,27 @@ int dpni_disable(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_is_enabled() - Check if the DPNI is enabled.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @en: Returns '1' if object is enabled; '0' otherwise
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_is_enabled(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
int *en)
{
struct mc_command cmd = { 0 };
+ struct dpni_rsp_is_enabled *rsp_params;
int err;
+
/* prepare command */
- cmd.header = mc_encode_cmd_header(DPNI_CMDID_IS_ENABLED, cmd_flags,
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_IS_ENABLED,
+ cmd_flags,
token);
/* send command to mc*/
@@ -270,11 +321,20 @@ int dpni_is_enabled(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPNI_RSP_IS_ENABLED(cmd, *en);
+ rsp_params = (struct dpni_rsp_is_enabled *)cmd.params;
+ *en = dpni_get_field(rsp_params->enabled, ENABLE);
return 0;
}
+/**
+ * dpni_reset() - Reset the DPNI, returns the object to initial state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_reset(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -290,12 +350,23 @@ int dpni_reset(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_get_attributes() - Retrieve DPNI attributes.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @attr: Object's attributes
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_get_attributes(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
struct dpni_attr *attr)
{
struct mc_command cmd = { 0 };
+ struct dpni_rsp_get_attr *rsp_params;
+
int err;
/* prepare command */
@@ -309,28 +380,65 @@ int dpni_get_attributes(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPNI_RSP_GET_ATTR(cmd, attr);
+ rsp_params = (struct dpni_rsp_get_attr *)cmd.params;
+ attr->options = le32_to_cpu(rsp_params->options);
+ attr->num_queues = rsp_params->num_queues;
+ attr->num_rx_tcs = rsp_params->num_rx_tcs;
+ attr->num_tx_tcs = rsp_params->num_tx_tcs;
+ attr->mac_filter_entries = rsp_params->mac_filter_entries;
+ attr->vlan_filter_entries = rsp_params->vlan_filter_entries;
+ attr->qos_entries = rsp_params->qos_entries;
+ attr->fs_entries = le16_to_cpu(rsp_params->fs_entries);
+ attr->qos_key_size = rsp_params->qos_key_size;
+ attr->fs_key_size = rsp_params->fs_key_size;
+ attr->wriop_version = le16_to_cpu(rsp_params->wriop_version);
return 0;
}
+/**
+ * dpni_set_errors_behavior() - Set errors behavior
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @cfg: Errors configuration
+ *
+ * This function may be called numerous times with different
+ * error masks
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_set_errors_behavior(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
- struct dpni_error_cfg *cfg)
+ struct dpni_error_cfg *cfg)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_errors_behavior *cmd_params;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_ERRORS_BEHAVIOR,
cmd_flags,
token);
- DPNI_CMD_SET_ERRORS_BEHAVIOR(cmd, cfg);
+ cmd_params = (struct dpni_cmd_set_errors_behavior *)cmd.params;
+ cmd_params->errors = cpu_to_le32(cfg->errors);
+ dpni_set_field(cmd_params->flags, ERROR_ACTION, cfg->error_action);
+ dpni_set_field(cmd_params->flags, FRAME_ANN, cfg->set_frame_annotation);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_get_buffer_layout() - Retrieve buffer layout attributes.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @qtype: Type of queue to retrieve configuration for
+ * @layout: Returns buffer layout attributes
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_get_buffer_layout(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
@@ -338,13 +446,16 @@ int dpni_get_buffer_layout(struct fsl_mc_io *mc_io,
struct dpni_buffer_layout *layout)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_get_buffer_layout *cmd_params;
+ struct dpni_rsp_get_buffer_layout *rsp_params;
int err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_BUFFER_LAYOUT,
cmd_flags,
token);
- DPNI_CMD_GET_BUFFER_LAYOUT(cmd, qtype);
+ cmd_params = (struct dpni_cmd_get_buffer_layout *)cmd.params;
+ cmd_params->qtype = qtype;
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -352,29 +463,72 @@ int dpni_get_buffer_layout(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPNI_RSP_GET_BUFFER_LAYOUT(cmd, layout);
+ rsp_params = (struct dpni_rsp_get_buffer_layout *)cmd.params;
+ layout->pass_timestamp = dpni_get_field(rsp_params->flags, PASS_TS);
+ layout->pass_parser_result = dpni_get_field(rsp_params->flags, PASS_PR);
+ layout->pass_frame_status = dpni_get_field(rsp_params->flags, PASS_FS);
+ layout->private_data_size = le16_to_cpu(rsp_params->private_data_size);
+ layout->data_align = le16_to_cpu(rsp_params->data_align);
+ layout->data_head_room = le16_to_cpu(rsp_params->head_room);
+ layout->data_tail_room = le16_to_cpu(rsp_params->tail_room);
return 0;
}
+/**
+ * dpni_set_buffer_layout() - Set buffer layout configuration.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @qtype: Type of queue this configuration applies to
+ * @layout: Buffer layout configuration
+ *
+ * Return: '0' on Success; Error code otherwise.
+ *
+ * @warning Allowed only when DPNI is disabled
+ */
int dpni_set_buffer_layout(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
- uint16_t token,
- enum dpni_queue_type qtype,
- const struct dpni_buffer_layout *layout)
+ uint16_t token,
+ enum dpni_queue_type qtype,
+ const struct dpni_buffer_layout *layout)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_buffer_layout *cmd_params;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_BUFFER_LAYOUT,
cmd_flags,
token);
- DPNI_CMD_SET_BUFFER_LAYOUT(cmd, qtype, layout);
+ cmd_params = (struct dpni_cmd_set_buffer_layout *)cmd.params;
+ cmd_params->qtype = qtype;
+ cmd_params->options = cpu_to_le16(layout->options);
+ dpni_set_field(cmd_params->flags, PASS_TS, layout->pass_timestamp);
+ dpni_set_field(cmd_params->flags, PASS_PR, layout->pass_parser_result);
+ dpni_set_field(cmd_params->flags, PASS_FS, layout->pass_frame_status);
+ cmd_params->private_data_size = cpu_to_le16(layout->private_data_size);
+ cmd_params->data_align = cpu_to_le16(layout->data_align);
+ cmd_params->head_room = cpu_to_le16(layout->data_head_room);
+ cmd_params->tail_room = cpu_to_le16(layout->data_tail_room);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_set_offload() - Set DPNI offload configuration.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @type: Type of DPNI offload
+ * @config: Offload configuration.
+ * For checksum offloads, non-zero value enables the offload
+ *
+ * Return: '0' on Success; Error code otherwise.
+ *
+ * @warning Allowed only when DPNI is disabled
+ */
+
int dpni_set_offload(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
@@ -382,17 +536,32 @@ int dpni_set_offload(struct fsl_mc_io *mc_io,
uint32_t config)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_offload *cmd_params;
- /* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_OFFLOAD,
cmd_flags,
token);
- DPNI_CMD_SET_OFFLOAD(cmd, type, config);
+ cmd_params = (struct dpni_cmd_set_offload *)cmd.params;
+ cmd_params->dpni_offload = type;
+ cmd_params->config = cpu_to_le32(config);
- /* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_get_offload() - Get DPNI offload configuration.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @type: Type of DPNI offload
+ * @config: Offload configuration.
+ * For checksum offloads, a value of 1 indicates that the
+ * offload is enabled.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ *
+ * @warning Allowed only when DPNI is disabled
+ */
int dpni_get_offload(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
@@ -400,13 +569,16 @@ int dpni_get_offload(struct fsl_mc_io *mc_io,
uint32_t *config)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_get_offload *cmd_params;
+ struct dpni_rsp_get_offload *rsp_params;
int err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_OFFLOAD,
cmd_flags,
token);
- DPNI_CMD_GET_OFFLOAD(cmd, type);
+ cmd_params = (struct dpni_cmd_get_offload *)cmd.params;
+ cmd_params->dpni_offload = type;
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -414,11 +586,24 @@ int dpni_get_offload(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPNI_RSP_GET_OFFLOAD(cmd, *config);
+ rsp_params = (struct dpni_rsp_get_offload *)cmd.params;
+ *config = le32_to_cpu(rsp_params->config);
return 0;
}
+/**
+ * dpni_get_qdid() - Get the Queuing Destination ID (QDID) that should be used
+ * for enqueue operations
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @qtype: Type of queue to receive QDID for
+ * @qdid: Returned virtual QDID value that should be used as an argument
+ * in all enqueue operations
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_get_qdid(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
@@ -426,13 +611,51 @@ int dpni_get_qdid(struct fsl_mc_io *mc_io,
uint16_t *qdid)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_get_qdid *cmd_params;
+ struct dpni_rsp_get_qdid *rsp_params;
int err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_QDID,
cmd_flags,
token);
- DPNI_CMD_GET_QDID(cmd, qtype);
+ cmd_params = (struct dpni_cmd_get_qdid *)cmd.params;
+ cmd_params->qtype = qtype;
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ rsp_params = (struct dpni_rsp_get_qdid *)cmd.params;
+ *qdid = le16_to_cpu(rsp_params->qdid);
+
+ return 0;
+}
+
+/**
+ * dpni_get_tx_data_offset() - Get the Tx data offset (from start of buffer)
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @data_offset: Tx data offset (from start of buffer)
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_get_tx_data_offset(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint16_t *data_offset)
+{
+ struct mc_command cmd = { 0 };
+ struct dpni_rsp_get_tx_data_offset *rsp_params;
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_TX_DATA_OFFSET,
+ cmd_flags,
+ token);
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
@@ -440,34 +663,57 @@ int dpni_get_qdid(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPNI_RSP_GET_QDID(cmd, *qdid);
+ rsp_params = (struct dpni_rsp_get_tx_data_offset *)cmd.params;
+ *data_offset = le16_to_cpu(rsp_params->data_offset);
return 0;
}
+/**
+ * dpni_set_link_cfg() - set the link configuration.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @cfg: Link configuration
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_set_link_cfg(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
const struct dpni_link_cfg *cfg)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_link_cfg *cmd_params;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_LINK_CFG,
cmd_flags,
token);
- DPNI_CMD_SET_LINK_CFG(cmd, cfg);
+ cmd_params = (struct dpni_cmd_set_link_cfg *)cmd.params;
+ cmd_params->rate = cpu_to_le32(cfg->rate);
+ cmd_params->options = cpu_to_le64(cfg->options);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_get_link_state() - Return the link state (either up or down)
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @state: Returned link state;
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_get_link_state(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
struct dpni_link_state *state)
{
struct mc_command cmd = { 0 };
+ struct dpni_rsp_get_link_state *rsp_params;
int err;
/* prepare command */
@@ -481,34 +727,60 @@ int dpni_get_link_state(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPNI_RSP_GET_LINK_STATE(cmd, state);
+ rsp_params = (struct dpni_rsp_get_link_state *)cmd.params;
+ state->up = dpni_get_field(rsp_params->flags, LINK_STATE);
+ state->rate = le32_to_cpu(rsp_params->rate);
+ state->options = le64_to_cpu(rsp_params->options);
return 0;
}
+/**
+ * dpni_set_max_frame_length() - Set the maximum received frame length.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @max_frame_length: Maximum received frame length (in bytes);
+ * frame is discarded if its length exceeds this value
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_set_max_frame_length(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
uint16_t max_frame_length)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_max_frame_length *cmd_params;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_MAX_FRAME_LENGTH,
cmd_flags,
token);
- DPNI_CMD_SET_MAX_FRAME_LENGTH(cmd, max_frame_length);
+ cmd_params = (struct dpni_cmd_set_max_frame_length *)cmd.params;
+ cmd_params->max_frame_length = cpu_to_le16(max_frame_length);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_get_max_frame_length() - Get the maximum received frame length.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @max_frame_length: Maximum received frame length (in bytes);
+ * frame is discarded if its length exceeds this value
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_get_max_frame_length(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
uint16_t *max_frame_length)
{
struct mc_command cmd = { 0 };
+ struct dpni_rsp_get_max_frame_length *rsp_params;
int err;
/* prepare command */
@@ -522,34 +794,56 @@ int dpni_get_max_frame_length(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPNI_RSP_GET_MAX_FRAME_LENGTH(cmd, *max_frame_length);
+ rsp_params = (struct dpni_rsp_get_max_frame_length *)cmd.params;
+ *max_frame_length = le16_to_cpu(rsp_params->max_frame_length);
return 0;
}
+/**
+ * dpni_set_multicast_promisc() - Enable/disable multicast promiscuous mode
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @en: Set to '1' to enable; '0' to disable
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_set_multicast_promisc(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
int en)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_multicast_promisc *cmd_params;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_MCAST_PROMISC,
cmd_flags,
token);
- DPNI_CMD_SET_MULTICAST_PROMISC(cmd, en);
+ cmd_params = (struct dpni_cmd_set_multicast_promisc *)cmd.params;
+ dpni_set_field(cmd_params->enable, ENABLE, en);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_get_multicast_promisc() - Get multicast promiscuous mode
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @en: Returns '1' if enabled; '0' otherwise
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_get_multicast_promisc(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
int *en)
{
struct mc_command cmd = { 0 };
+ struct dpni_rsp_get_multicast_promisc *rsp_params;
int err;
/* prepare command */
@@ -563,34 +857,56 @@ int dpni_get_multicast_promisc(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPNI_RSP_GET_MULTICAST_PROMISC(cmd, *en);
+ rsp_params = (struct dpni_rsp_get_multicast_promisc *)cmd.params;
+ *en = dpni_get_field(rsp_params->enabled, ENABLE);
return 0;
}
+/**
+ * dpni_set_unicast_promisc() - Enable/disable unicast promiscuous mode
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @en: Set to '1' to enable; '0' to disable
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_set_unicast_promisc(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
int en)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_unicast_promisc *cmd_params;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_UNICAST_PROMISC,
cmd_flags,
token);
- DPNI_CMD_SET_UNICAST_PROMISC(cmd, en);
+ cmd_params = (struct dpni_cmd_set_unicast_promisc *)cmd.params;
+ dpni_set_field(cmd_params->enable, ENABLE, en);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_get_unicast_promisc() - Get unicast promiscuous mode
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @en: Returns '1' if enabled; '0' otherwise
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_get_unicast_promisc(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
int *en)
{
struct mc_command cmd = { 0 };
+ struct dpni_rsp_get_unicast_promisc *rsp_params;
int err;
/* prepare command */
@@ -604,35 +920,59 @@ int dpni_get_unicast_promisc(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPNI_RSP_GET_UNICAST_PROMISC(cmd, *en);
+ rsp_params = (struct dpni_rsp_get_unicast_promisc *)cmd.params;
+ *en = dpni_get_field(rsp_params->enabled, ENABLE);
return 0;
}
+/**
+ * dpni_set_primary_mac_addr() - Set the primary MAC address
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @mac_addr: MAC address to set as primary address
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
const uint8_t mac_addr[6])
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_primary_mac_addr *cmd_params;
+ int i;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_PRIM_MAC,
cmd_flags,
token);
- DPNI_CMD_SET_PRIMARY_MAC_ADDR(cmd, mac_addr);
+ cmd_params = (struct dpni_cmd_set_primary_mac_addr *)cmd.params;
+ for (i = 0; i < 6; i++)
+ cmd_params->mac_addr[i] = mac_addr[5 - i];
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_get_primary_mac_addr() - Get the primary MAC address
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @mac_addr: Returned MAC address
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_get_primary_mac_addr(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
uint8_t mac_addr[6])
{
struct mc_command cmd = { 0 };
- int err;
+ struct dpni_rsp_get_primary_mac_addr *rsp_params;
+ int i, err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_PRIM_MAC,
@@ -645,45 +985,85 @@ int dpni_get_primary_mac_addr(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPNI_RSP_GET_PRIMARY_MAC_ADDR(cmd, mac_addr);
+ rsp_params = (struct dpni_rsp_get_primary_mac_addr *)cmd.params;
+ for (i = 0; i < 6; i++)
+ mac_addr[5 - i] = rsp_params->mac_addr[i];
return 0;
}
+/**
+ * dpni_add_mac_addr() - Add MAC address filter
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @mac_addr: MAC address to add
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_add_mac_addr(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
const uint8_t mac_addr[6])
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_add_mac_addr *cmd_params;
+ int i;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_ADD_MAC_ADDR,
cmd_flags,
token);
- DPNI_CMD_ADD_MAC_ADDR(cmd, mac_addr);
+ cmd_params = (struct dpni_cmd_add_mac_addr *)cmd.params;
+ for (i = 0; i < 6; i++)
+ cmd_params->mac_addr[i] = mac_addr[5 - i];
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_remove_mac_addr() - Remove MAC address filter
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @mac_addr: MAC address to remove
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_remove_mac_addr(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
const uint8_t mac_addr[6])
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_remove_mac_addr *cmd_params;
+ int i;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_REMOVE_MAC_ADDR,
cmd_flags,
token);
- DPNI_CMD_REMOVE_MAC_ADDR(cmd, mac_addr);
+ cmd_params = (struct dpni_cmd_remove_mac_addr *)cmd.params;
+ for (i = 0; i < 6; i++)
+ cmd_params->mac_addr[i] = mac_addr[5 - i];
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_clear_mac_filters() - Clear all unicast and/or multicast MAC filters
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @unicast: Set to '1' to clear unicast addresses
+ * @multicast: Set to '1' to clear multicast addresses
+ *
+ * The primary MAC address is not cleared by this operation.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_clear_mac_filters(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
@@ -691,24 +1071,40 @@ int dpni_clear_mac_filters(struct fsl_mc_io *mc_io,
int multicast)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_clear_mac_filters *cmd_params;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_CLR_MAC_FILTERS,
cmd_flags,
token);
- DPNI_CMD_CLEAR_MAC_FILTERS(cmd, unicast, multicast);
+ cmd_params = (struct dpni_cmd_clear_mac_filters *)cmd.params;
+ dpni_set_field(cmd_params->flags, UNICAST_FILTERS, unicast);
+ dpni_set_field(cmd_params->flags, MULTICAST_FILTERS, multicast);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_get_port_mac_addr() - Retrieve MAC address associated to the physical
+ * port the DPNI is attached to
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @mac_addr: MAC address of the physical port, if any, otherwise 0
+ *
+ * The primary MAC address is not cleared by this operation.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_get_port_mac_addr(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
uint8_t mac_addr[6])
{
struct mc_command cmd = { 0 };
- int err;
+ struct dpni_rsp_get_port_mac_addr *rsp_params;
+ int i, err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_PORT_MAC_ADDR,
@@ -721,62 +1117,105 @@ int dpni_get_port_mac_addr(struct fsl_mc_io *mc_io,
return err;
/* retrieve response parameters */
- DPNI_RSP_GET_PORT_MAC_ADDR(cmd, mac_addr);
+ rsp_params = (struct dpni_rsp_get_port_mac_addr *)cmd.params;
+ for (i = 0; i < 6; i++)
+ mac_addr[5 - i] = rsp_params->mac_addr[i];
return 0;
}
+/**
+ * dpni_enable_vlan_filter() - Enable/disable VLAN filtering mode
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @en: Set to '1' to enable; '0' to disable
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_enable_vlan_filter(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
- uint16_t token,
- int en)
+ uint16_t token,
+ int en)
{
+ struct dpni_cmd_enable_vlan_filter *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_ENABLE_VLAN_FILTER,
cmd_flags,
token);
- DPNI_CMD_ENABLE_VLAN_FILTER(cmd, en);
+ cmd_params = (struct dpni_cmd_enable_vlan_filter *)cmd.params;
+ dpni_set_field(cmd_params->en, ENABLE, en);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_add_vlan_id() - Add VLAN ID filter
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @vlan_id: VLAN ID to add
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_add_vlan_id(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
uint16_t vlan_id)
{
+ struct dpni_cmd_vlan_id *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_ADD_VLAN_ID,
cmd_flags,
token);
- DPNI_CMD_ADD_VLAN_ID(cmd, vlan_id);
+ cmd_params = (struct dpni_cmd_vlan_id *)cmd.params;
+ cmd_params->vlan_id = cpu_to_le16(vlan_id);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_remove_vlan_id() - Remove VLAN ID filter
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @vlan_id: VLAN ID to remove
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_remove_vlan_id(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
uint16_t vlan_id)
{
+ struct dpni_cmd_vlan_id *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_REMOVE_VLAN_ID,
cmd_flags,
token);
- DPNI_CMD_REMOVE_VLAN_ID(cmd, vlan_id);
+ cmd_params = (struct dpni_cmd_vlan_id *)cmd.params;
+ cmd_params->vlan_id = cpu_to_le16(vlan_id);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_clear_vlan_filters() - Clear all VLAN filters
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_clear_vlan_filters(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -792,6 +1231,19 @@ int dpni_clear_vlan_filters(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_set_rx_tc_dist() - Set Rx traffic class distribution configuration
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @tc_id: Traffic class selection (0-7)
+ * @cfg: Traffic class distribution configuration
+ *
+ * warning: if 'dist_mode != DPNI_DIST_MODE_NONE', call dpkg_prepare_key_cfg()
+ * first to prepare the key_cfg_iova parameter
+ *
+ * Return: '0' on Success; error code otherwise.
+ */
int dpni_set_rx_tc_dist(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
@@ -799,87 +1251,185 @@ int dpni_set_rx_tc_dist(struct fsl_mc_io *mc_io,
const struct dpni_rx_tc_dist_cfg *cfg)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_rx_tc_dist *cmd_params;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_RX_TC_DIST,
cmd_flags,
token);
- DPNI_CMD_SET_RX_TC_DIST(cmd, tc_id, cfg);
+ cmd_params = (struct dpni_cmd_set_rx_tc_dist *)cmd.params;
+ cmd_params->dist_size = cpu_to_le16(cfg->dist_size);
+ cmd_params->tc_id = tc_id;
+ cmd_params->default_flow_id = cpu_to_le16(cfg->fs_cfg.default_flow_id);
+ cmd_params->key_cfg_iova = cpu_to_le64(cfg->key_cfg_iova);
+ dpni_set_field(cmd_params->flags,
+ DIST_MODE,
+ cfg->dist_mode);
+ dpni_set_field(cmd_params->flags,
+ MISS_ACTION,
+ cfg->fs_cfg.miss_action);
+ dpni_set_field(cmd_params->keep_hash_key,
+ KEEP_HASH_KEY,
+ cfg->fs_cfg.keep_hash_key);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
-int dpni_set_tx_confirmation_mode(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- enum dpni_confirmation_mode mode)
+/**
+ * dpni_set_tx_confirmation_mode() - Tx confirmation mode
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @mode: Tx confirmation mode
+ *
+ * This function is useful only when 'DPNI_OPT_TX_CONF_DISABLED' is not
+ * selected at DPNI creation.
+ * Calling this function with 'mode' set to DPNI_CONF_DISABLE disables all
+ * transmit confirmation (including the private confirmation queues), regardless
+ * of previous settings; Note that in this case, Tx error frames are still
+ * enqueued to the general transmit errors queue.
+ * Calling this function with 'mode' set to DPNI_CONF_SINGLE switches all
+ * Tx confirmations to a shared Tx conf queue. 'index' field in dpni_get_queue
+ * command will be ignored.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_set_tx_confirmation_mode(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ enum dpni_confirmation_mode mode)
{
+ struct dpni_tx_confirmation_mode *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_TX_CONFIRMATION_MODE,
cmd_flags,
token);
- DPNI_CMD_SET_TX_CONFIRMATION_MODE(cmd, mode);
+ cmd_params = (struct dpni_tx_confirmation_mode *)cmd.params;
+ cmd_params->confirmation_mode = mode;
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
-int dpni_set_congestion_notification(
- struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- enum dpni_queue_type qtype,
- uint8_t tc_id,
+/**
+ * dpni_set_congestion_notification() - Set traffic class congestion
+ * notification configuration
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @qtype: Type of queue - Rx, Tx and Tx confirm types are supported
+ * @tc_id: Traffic class selection (0-7)
+ * @cfg: congestion notification configuration
+ *
+ * Return: '0' on Success; error code otherwise.
+ */
+int dpni_set_congestion_notification(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ enum dpni_queue_type qtype,
+ uint8_t tc_id,
const struct dpni_congestion_notification_cfg *cfg)
{
+ struct dpni_cmd_set_congestion_notification *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(
- DPNI_CMDID_SET_CONGESTION_NOTIFICATION,
- cmd_flags,
- token);
- DPNI_CMD_SET_CONGESTION_NOTIFICATION(cmd, qtype, tc_id, cfg);
+ DPNI_CMDID_SET_CONGESTION_NOTIFICATION,
+ cmd_flags,
+ token);
+ cmd_params = (struct dpni_cmd_set_congestion_notification *)cmd.params;
+ cmd_params->qtype = qtype;
+ cmd_params->tc = tc_id;
+ cmd_params->dest_id = cpu_to_le32(cfg->dest_cfg.dest_id);
+ cmd_params->notification_mode = cpu_to_le16(cfg->notification_mode);
+ cmd_params->dest_priority = cfg->dest_cfg.priority;
+ cmd_params->message_iova = cpu_to_le64(cfg->message_iova);
+ cmd_params->message_ctx = cpu_to_le64(cfg->message_ctx);
+ cmd_params->threshold_entry = cpu_to_le32(cfg->threshold_entry);
+ cmd_params->threshold_exit = cpu_to_le32(cfg->threshold_exit);
+ dpni_set_field(cmd_params->type_units,
+ DEST_TYPE,
+ cfg->dest_cfg.dest_type);
+ dpni_set_field(cmd_params->type_units,
+ CONG_UNITS,
+ cfg->units);
/* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
-int dpni_get_congestion_notification(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
+/**
+ * dpni_get_congestion_notification() - Get traffic class congestion
+ * notification configuration
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @qtype: Type of queue - Rx, Tx and Tx confirm types are supported
+ * @tc_id: Traffic class selection (0-7)
+ * @cfg: congestion notification configuration
+ *
+ * Return: '0' on Success; error code otherwise.
+ */
+int dpni_get_congestion_notification(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
enum dpni_queue_type qtype,
- uint8_t tc_id,
+ uint8_t tc_id,
struct dpni_congestion_notification_cfg *cfg)
{
+ struct dpni_rsp_get_congestion_notification *rsp_params;
+ struct dpni_cmd_get_congestion_notification *cmd_params;
struct mc_command cmd = { 0 };
int err;
/* prepare command */
cmd.header = mc_encode_cmd_header(
- DPNI_CMDID_GET_CONGESTION_NOTIFICATION,
- cmd_flags,
- token);
- DPNI_CMD_GET_CONGESTION_NOTIFICATION(cmd, qtype, tc_id);
+ DPNI_CMDID_GET_CONGESTION_NOTIFICATION,
+ cmd_flags,
+ token);
+ cmd_params = (struct dpni_cmd_get_congestion_notification *)cmd.params;
+ cmd_params->qtype = qtype;
+ cmd_params->tc = tc_id;
/* send command to mc*/
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
- DPNI_RSP_GET_CONGESTION_NOTIFICATION(cmd, cfg);
+ rsp_params = (struct dpni_rsp_get_congestion_notification *)cmd.params;
+ cfg->units = dpni_get_field(rsp_params->type_units, CONG_UNITS);
+ cfg->threshold_entry = le32_to_cpu(rsp_params->threshold_entry);
+ cfg->threshold_exit = le32_to_cpu(rsp_params->threshold_exit);
+ cfg->message_ctx = le64_to_cpu(rsp_params->message_ctx);
+ cfg->message_iova = le64_to_cpu(rsp_params->message_iova);
+ cfg->notification_mode = le16_to_cpu(rsp_params->notification_mode);
+ cfg->dest_cfg.dest_id = le32_to_cpu(rsp_params->dest_id);
+ cfg->dest_cfg.priority = rsp_params->dest_priority;
+ cfg->dest_cfg.dest_type = dpni_get_field(rsp_params->type_units,
+ DEST_TYPE);
return 0;
}
+/**
+ * dpni_get_api_version() - Get Data Path Network Interface API version
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @major_ver: Major version of data path network interface API
+ * @minor_ver: Minor version of data path network interface API
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_get_api_version(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
- uint16_t *major_ver,
- uint16_t *minor_ver)
+ uint16_t *major_ver,
+ uint16_t *minor_ver)
{
+ struct dpni_rsp_get_api_version *rsp_params;
struct mc_command cmd = { 0 };
int err;
@@ -891,87 +1441,177 @@ int dpni_get_api_version(struct fsl_mc_io *mc_io,
if (err)
return err;
- DPNI_RSP_GET_API_VERSION(cmd, *major_ver, *minor_ver);
+ rsp_params = (struct dpni_rsp_get_api_version *)cmd.params;
+ *major_ver = le16_to_cpu(rsp_params->major);
+ *minor_ver = le16_to_cpu(rsp_params->minor);
return 0;
}
+/**
+ * dpni_set_queue() - Set queue parameters
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @qtype: Type of queue - all queue types are supported, although
+ * the command is ignored for Tx
+ * @tc: Traffic class, in range 0 to NUM_TCS - 1
+ * @index: Selects the specific queue out of the set allocated for the
+ * same TC. Value must be in range 0 to NUM_QUEUES - 1
+ * @options: A combination of DPNI_QUEUE_OPT_ values that control what
+ * configuration options are set on the queue
+ * @queue: Queue structure
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_set_queue(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
- uint16_t token,
+ uint16_t token,
enum dpni_queue_type qtype,
- uint8_t tc,
- uint8_t index,
+ uint8_t tc,
+ uint8_t index,
uint8_t options,
- const struct dpni_queue *queue)
+ const struct dpni_queue *queue)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_queue *cmd_params;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_QUEUE,
cmd_flags,
token);
- DPNI_CMD_SET_QUEUE(cmd, qtype, tc, index, options, queue);
-
- /* send command to mc*/
+ cmd_params = (struct dpni_cmd_set_queue *)cmd.params;
+ cmd_params->qtype = qtype;
+ cmd_params->tc = tc;
+ cmd_params->index = index;
+ cmd_params->options = options;
+ cmd_params->dest_id = cpu_to_le32(queue->destination.id);
+ cmd_params->dest_prio = queue->destination.priority;
+ dpni_set_field(cmd_params->flags, DEST_TYPE, queue->destination.type);
+ dpni_set_field(cmd_params->flags, STASH_CTRL, queue->flc.stash_control);
+ dpni_set_field(cmd_params->flags, HOLD_ACTIVE,
+ queue->destination.hold_active);
+ cmd_params->flc = cpu_to_le64(queue->flc.value);
+ cmd_params->user_context = cpu_to_le64(queue->user_context);
+
+ /* send command to mc */
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_get_queue() - Get queue parameters
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @qtype: Type of queue - all queue types are supported
+ * @tc: Traffic class, in range 0 to NUM_TCS - 1
+ * @index: Selects the specific queue out of the set allocated for the
+ * same TC. Value must be in range 0 to NUM_QUEUES - 1
+ * @queue: Queue configuration structure
+ * @qid: Queue identification
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_get_queue(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
- uint16_t token,
+ uint16_t token,
enum dpni_queue_type qtype,
- uint8_t tc,
- uint8_t index,
+ uint8_t tc,
+ uint8_t index,
struct dpni_queue *queue,
struct dpni_queue_id *qid)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_get_queue *cmd_params;
+ struct dpni_rsp_get_queue *rsp_params;
int err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_QUEUE,
cmd_flags,
token);
- DPNI_CMD_GET_QUEUE(cmd, qtype, tc, index);
+ cmd_params = (struct dpni_cmd_get_queue *)cmd.params;
+ cmd_params->qtype = qtype;
+ cmd_params->tc = tc;
+ cmd_params->index = index;
- /* send command to mc*/
+ /* send command to mc */
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
/* retrieve response parameters */
- DPNI_RSP_GET_QUEUE(cmd, queue, qid);
+ rsp_params = (struct dpni_rsp_get_queue *)cmd.params;
+ queue->destination.id = le32_to_cpu(rsp_params->dest_id);
+ queue->destination.priority = rsp_params->dest_prio;
+ queue->destination.type = dpni_get_field(rsp_params->flags,
+ DEST_TYPE);
+ queue->flc.stash_control = dpni_get_field(rsp_params->flags,
+ STASH_CTRL);
+ queue->destination.hold_active = dpni_get_field(rsp_params->flags,
+ HOLD_ACTIVE);
+ queue->flc.value = le64_to_cpu(rsp_params->flc);
+ queue->user_context = le64_to_cpu(rsp_params->user_context);
+ qid->fqid = le32_to_cpu(rsp_params->fqid);
+ qid->qdbin = le16_to_cpu(rsp_params->qdbin);
return 0;
}
+/**
+ * dpni_get_statistics() - Get DPNI statistics
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @page: Selects the statistics page to retrieve, see
+ * DPNI_GET_STATISTICS output. Pages are numbered 0 to 2.
+ * @param: Custom parameter for some pages used to select
+ * a certain statistic source, for example the TC.
+ * @stat: Structure containing the statistics
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_get_statistics(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
uint8_t page,
+ uint8_t param,
union dpni_statistics *stat)
{
struct mc_command cmd = { 0 };
- int err;
+ struct dpni_cmd_get_statistics *cmd_params;
+ struct dpni_rsp_get_statistics *rsp_params;
+ int i, err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_STATISTICS,
cmd_flags,
token);
- DPNI_CMD_GET_STATISTICS(cmd, page);
+ cmd_params = (struct dpni_cmd_get_statistics *)cmd.params;
+ cmd_params->page_number = page;
+ cmd_params->param = param;
- /* send command to mc*/
+ /* send command to mc */
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
/* retrieve response parameters */
- DPNI_RSP_GET_STATISTICS(cmd, stat);
+ rsp_params = (struct dpni_rsp_get_statistics *)cmd.params;
+ for (i = 0; i < DPNI_STATISTICS_CNT; i++)
+ stat->raw.counter[i] = le64_to_cpu(rsp_params->counter[i]);
return 0;
}
+/**
+ * dpni_reset_statistics() - Clears DPNI statistics
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_reset_statistics(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token)
@@ -987,52 +1627,117 @@ int dpni_reset_statistics(struct fsl_mc_io *mc_io,
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_set_taildrop() - Set taildrop per queue or TC
+ *
+ * Setting a per-TC taildrop (cg_point = DPNI_CP_GROUP) will reset any current
+ * congestion notification or early drop (WRED) configuration previously applied
+ * to the same TC.
+ *
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @cg_point: Congestion point, DPNI_CP_QUEUE is only supported in
+ * combination with DPNI_QUEUE_RX.
+ * @q_type: Queue type, can be DPNI_QUEUE_RX or DPNI_QUEUE_TX.
+ * @tc: Traffic class to apply this taildrop to
+ * @q_index: Index of the queue if the DPNI supports multiple queues for
+ * traffic distribution.
+ * Ignored if CONGESTION_POINT is not DPNI_CP_QUEUE.
+ * @taildrop: Taildrop structure
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_set_taildrop(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
enum dpni_congestion_point cg_point,
- enum dpni_queue_type q_type,
+ enum dpni_queue_type qtype,
uint8_t tc,
- uint8_t q_index,
+ uint8_t index,
struct dpni_taildrop *taildrop)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_taildrop *cmd_params;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_TAILDROP,
cmd_flags,
token);
- DPNI_CMD_SET_TAILDROP(cmd, cg_point, q_type, tc, q_index, taildrop);
-
- /* send command to mc*/
+ cmd_params = (struct dpni_cmd_set_taildrop *)cmd.params;
+ cmd_params->congestion_point = cg_point;
+ cmd_params->qtype = qtype;
+ cmd_params->tc = tc;
+ cmd_params->index = index;
+ cmd_params->units = taildrop->units;
+ cmd_params->threshold = cpu_to_le32(taildrop->threshold);
+ dpni_set_field(cmd_params->enable_oal_lo, ENABLE, taildrop->enable);
+ dpni_set_field(cmd_params->enable_oal_lo, OAL_LO, taildrop->oal);
+ dpni_set_field(cmd_params->oal_hi,
+ OAL_HI,
+ taildrop->oal >> DPNI_OAL_LO_SIZE);
+
+ /* send command to mc */
return mc_send_command(mc_io, &cmd);
}
+/**
+ * dpni_get_taildrop() - Get taildrop information
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @cg_point: Congestion point
+ * @q_type: Queue type on which the taildrop is configured.
+ * Only Rx queues are supported for now
+ * @tc: Traffic class to apply this taildrop to
+ * @q_index: Index of the queue if the DPNI supports multiple queues for
+ * traffic distribution. Ignored if CONGESTION_POINT is not 0.
+ * @taildrop: Taildrop structure
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
int dpni_get_taildrop(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
- uint16_t token,
- enum dpni_congestion_point cg_point,
- enum dpni_queue_type q_type,
- uint8_t tc,
- uint8_t q_index,
- struct dpni_taildrop *taildrop)
+ uint16_t token,
+ enum dpni_congestion_point cg_point,
+ enum dpni_queue_type qtype,
+ uint8_t tc,
+ uint8_t index,
+ struct dpni_taildrop *taildrop)
{
struct mc_command cmd = { 0 };
+ struct dpni_cmd_get_taildrop *cmd_params;
+ struct dpni_rsp_get_taildrop *rsp_params;
+ uint8_t oal_lo, oal_hi;
int err;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_TAILDROP,
cmd_flags,
token);
- DPNI_CMD_GET_TAILDROP(cmd, cg_point, q_type, tc, q_index);
+ cmd_params = (struct dpni_cmd_get_taildrop *)cmd.params;
+ cmd_params->congestion_point = cg_point;
+ cmd_params->qtype = qtype;
+ cmd_params->tc = tc;
+ cmd_params->index = index;
- /* send command to mc*/
+ /* send command to mc */
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
/* retrieve response parameters */
- DPNI_RSP_GET_TAILDROP(cmd, taildrop);
+ rsp_params = (struct dpni_rsp_get_taildrop *)cmd.params;
+ taildrop->enable = dpni_get_field(rsp_params->enable_oal_lo, ENABLE);
+ taildrop->units = rsp_params->units;
+ taildrop->threshold = le32_to_cpu(rsp_params->threshold);
+ oal_lo = dpni_get_field(rsp_params->enable_oal_lo, OAL_LO);
+ oal_hi = dpni_get_field(rsp_params->oal_hi, OAL_HI);
+ taildrop->oal = oal_hi << DPNI_OAL_LO_SIZE | oal_lo;
+
+ /* Fill the first 4 bits, 'oal' is a 2's complement value of 12 bits */
+ if (taildrop->oal >= 0x0800)
+ taildrop->oal |= 0xF000;
return 0;
}
diff --git a/drivers/net/dpaa2/mc/fsl_dpkg.h b/drivers/net/dpaa2/mc/fsl_dpkg.h
index 2391e40..7f46baf 100644
--- a/drivers/net/dpaa2/mc/fsl_dpkg.h
+++ b/drivers/net/dpaa2/mc/fsl_dpkg.h
@@ -5,7 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2015 Freescale Semiconductor Inc.
- * Copyright 2016 NXP.
+ * Copyright 2016-2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -93,6 +93,15 @@ struct dpkg_mask {
uint8_t offset;
};
+/* Macros for accessing command fields smaller than 1byte */
+#define DPKG_MASK(field) \
+ GENMASK(DPKG_##field##_SHIFT + DPKG_##field##_SIZE - 1, \
+ DPKG_##field##_SHIFT)
+#define dpkg_set_field(var, field, val) \
+ ((var) |= (((val) << DPKG_##field##_SHIFT) & DPKG_MASK(field)))
+#define dpkg_get_field(var, field) \
+ (((var) & DPKG_MASK(field)) >> DPKG_##field##_SHIFT)
+
/**
* struct dpkg_extract - A structure for defining a single extraction
* @type: Determines how the union below is interpreted:
@@ -136,12 +145,12 @@ struct dpkg_extract {
*/
struct {
- enum net_prot prot;
+ enum net_prot prot;
enum dpkg_extract_from_hdr_type type;
- uint32_t field;
- uint8_t size;
- uint8_t offset;
- uint8_t hdr_index;
+ uint32_t field;
+ uint8_t size;
+ uint8_t offset;
+ uint8_t hdr_index;
} from_hdr;
/**
* struct from_data
@@ -166,8 +175,8 @@ struct dpkg_extract {
} from_parse;
} extract;
- uint8_t num_of_byte_masks;
- struct dpkg_mask masks[DPKG_NUM_OF_MASKS];
+ uint8_t num_of_byte_masks;
+ struct dpkg_mask masks[DPKG_NUM_OF_MASKS];
};
/**
@@ -181,4 +190,48 @@ struct dpkg_profile_cfg {
struct dpkg_extract extracts[DPKG_MAX_NUM_OF_EXTRACTS];
};
+/* dpni_set_rx_tc_dist extension (structure of the DMA-able memory at
+ * key_cfg_iova)
+ */
+struct dpni_mask_cfg {
+ uint8_t mask;
+ uint8_t offset;
+};
+
+#define DPKG_EFH_TYPE_SHIFT 0
+#define DPKG_EFH_TYPE_SIZE 4
+#define DPKG_EXTRACT_TYPE_SHIFT 0
+#define DPKG_EXTRACT_TYPE_SIZE 4
+
+struct dpni_dist_extract {
+ /* word 0 */
+ uint8_t prot;
+ /* EFH type stored in the 4 least significant bits */
+ uint8_t efh_type;
+ uint8_t size;
+ uint8_t offset;
+ uint32_t field;
+ /* word 1 */
+ uint8_t hdr_index;
+ uint8_t constant;
+ uint8_t num_of_repeats;
+ uint8_t num_of_byte_masks;
+ /* Extraction type is stored in the 4 LSBs */
+ uint8_t extract_type;
+ uint8_t pad[3];
+ /* word 2 */
+ struct dpni_mask_cfg masks[4];
+};
+
+struct dpni_ext_set_rx_tc_dist {
+ /* extension word 0 */
+ uint8_t num_extracts;
+ uint8_t pad[7];
+ /* words 1..25 */
+ struct dpni_dist_extract extracts[10];
+};
+
+int dpkg_prepare_key_cfg(const struct dpkg_profile_cfg *cfg,
+ uint8_t *key_cfg_buf);
+
#endif /* __FSL_DPKG_H_ */
diff --git a/drivers/net/dpaa2/mc/fsl_dpni.h b/drivers/net/dpaa2/mc/fsl_dpni.h
index 64db70d..092d3b3 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni.h
@@ -5,7 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP.
+ * Copyright 2016-2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -110,47 +110,19 @@ struct fsl_mc_io;
*/
#define DPNI_OPT_NO_FS 0x000020
-/**
- * dpni_open() - Open a control session for the specified object
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @dpni_id: DPNI unique ID
- * @token: Returned token; use in subsequent API calls
- *
- * This function can be used to open a control session for an
- * already created object; an object may have been declared in
- * the DPL or by calling the dpni_create() function.
- * This function returns a unique authentication token,
- * associated with the specific object ID and the specific MC
- * portal; this token must be used in all subsequent commands for
- * this specific object.
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_open(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- int dpni_id,
- uint16_t *token);
+int dpni_open(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ int dpni_id,
+ uint16_t *token);
-/**
- * dpni_close() - Close the control session of the object
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- *
- * After this function is called, no further operations are
- * allowed on the object without opening a new control session.
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_close(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpni_close(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
/**
* struct dpni_cfg - Structure representing DPNI configuration
- * @mac_addr: Primary MAC address
- * @adv: Advanced parameters; default is all zeros;
+ * @mac_addr: Primary MAC address
+ * @adv: Advanced parameters; default is all zeros;
* use this structure to change default settings
*/
struct dpni_cfg {
@@ -217,141 +189,62 @@ struct dpni_cfg {
uint8_t qos_entries;
};
-/**
- * dpni_create() - Create the DPNI object
- * @mc_io: Pointer to MC portal's I/O object
- * @dprc_token: Parent container token; '0' for default container
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @cfg: Configuration structure
- * @obj_id: returned object id
- *
- * Create the DPNI object, allocate required resources and
- * perform required initialization.
- *
- * The object can be created either by declaring it in the
- * DPL file, or by calling this function.
- *
- * The function accepts an authentication token of a parent
- * container that this object should be assigned to. The token
- * can be '0' so the object will be assigned to the default container.
- * The newly created object can be opened with the returned
- * object id and using the container's associated tokens and MC portals.
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_create(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- const struct dpni_cfg *cfg,
- uint32_t *obj_id);
+int dpni_create(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ const struct dpni_cfg *cfg,
+ uint32_t *obj_id);
-/**
- * dpni_destroy() - Destroy the DPNI object and release all its resources.
- * @mc_io: Pointer to MC portal's I/O object
- * @dprc_token: Parent container token; '0' for default container
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @object_id: The object id; it must be a valid id within the container that
- * created this object;
- *
- * The function accepts the authentication token of the parent container that
- * created the object (not the one that currently owns the object). The object
- * is searched within parent using the provided 'object_id'.
- * All tokens to the object must be closed before calling destroy.
- *
- * Return: '0' on Success; error code otherwise.
- */
-int dpni_destroy(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- uint32_t object_id);
+int dpni_destroy(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ uint32_t object_id);
/**
* struct dpni_pools_cfg - Structure representing buffer pools configuration
- * @num_dpbp: Number of DPBPs
- * @pools: Array of buffer pools parameters; The number of valid entries
- * must match 'num_dpbp' value
+ * @num_dpbp: Number of DPBPs
+ * @pools: Array of buffer pools parameters; The number of valid entries
+ * must match 'num_dpbp' value
*/
struct dpni_pools_cfg {
- uint8_t num_dpbp;
+ uint8_t num_dpbp;
/**
* struct pools - Buffer pools parameters
* @dpbp_id: DPBP object ID
+ * @priority: priority mask that indicates TC's used with this buffer.
+ * I set to 0x00 MC will assume value 0xff.
* @buffer_size: Buffer size
* @backup_pool: Backup pool
*/
struct {
int dpbp_id;
+ uint8_t priority_mask;
uint16_t buffer_size;
int backup_pool;
} pools[DPNI_MAX_DPBP];
};
-/**
- * dpni_set_pools() - Set buffer pools configuration
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @cfg: Buffer pools configuration
- *
- * mandatory for DPNI operation
- * warning:Allowed only when DPNI is disabled
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_set_pools(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- const struct dpni_pools_cfg *cfg);
+int dpni_set_pools(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ const struct dpni_pools_cfg *cfg);
-/**
- * dpni_enable() - Enable the DPNI, allow sending and receiving frames.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_enable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpni_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
-/**
- * dpni_disable() - Disable the DPNI, stop sending and receiving frames.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_disable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpni_disable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
-/**
- * dpni_is_enabled() - Check if the DPNI is enabled.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @en: Returns '1' if object is enabled; '0' otherwise
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_is_enabled(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- int *en);
+int dpni_is_enabled(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int *en);
-/**
- * dpni_reset() - Reset the DPNI, returns the object to initial state.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_reset(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpni_reset(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
/**
* struct dpni_attr - Structure representing DPNI attributes
@@ -363,7 +256,8 @@ int dpni_reset(struct fsl_mc_io *mc_io,
* DPNI_OPT_HAS_KEY_MASKING
* DPNI_OPT_NO_FS
* @num_queues: Number of Tx and Rx queues used for traffic distribution.
- * @num_tcs: Number of traffic classes (TCs), reserved for the DPNI.
+ * @num_rx_tcs: Number of RX traffic classes (TCs), reserved for the DPNI.
+ * @num_tx_tcs: Number of TX traffic classes (TCs), reserved for the DPNI.
* @mac_filter_entries: Number of entries in the MAC address filtering
* table.
* @vlan_filter_entries: Number of entries in the VLAN address filtering
@@ -390,7 +284,8 @@ int dpni_reset(struct fsl_mc_io *mc_io,
struct dpni_attr {
uint32_t options;
uint8_t num_queues;
- uint8_t num_tcs;
+ uint8_t num_rx_tcs;
+ uint8_t num_tx_tcs;
uint8_t mac_filter_entries;
uint8_t vlan_filter_entries;
uint8_t qos_entries;
@@ -400,19 +295,10 @@ struct dpni_attr {
uint16_t wriop_version;
};
-/**
- * dpni_get_attributes() - Retrieve DPNI attributes.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @attr: Object's attributes
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_get_attributes(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- struct dpni_attr *attr);
+int dpni_get_attributes(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpni_attr *attr);
/**
* DPNI errors
@@ -457,33 +343,22 @@ enum dpni_error_action {
/**
* struct dpni_error_cfg - Structure representing DPNI errors treatment
- * @errors: Errors mask; use 'DPNI_ERROR__<X>
- * @error_action: The desired action for the errors mask
- * @set_frame_annotation: Set to '1' to mark the errors in frame annotation
- * status (FAS); relevant only for the non-discard action
+ * @errors: Errors mask; use 'DPNI_ERROR__<X>
+ * @error_action: The desired action for the errors mask
+ * @set_frame_annotation: Set to '1' to mark the errors in frame
+ * annotation status (FAS); relevant only
+ * for the non-discard action
*/
struct dpni_error_cfg {
- uint32_t errors;
- enum dpni_error_action error_action;
- int set_frame_annotation;
+ uint32_t errors;
+ enum dpni_error_action error_action;
+ int set_frame_annotation;
};
-/**
- * dpni_set_errors_behavior() - Set errors behavior
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @cfg: Errors configuration
- *
- * this function may be called numerous times with different
- * error masks
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_set_errors_behavior(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- struct dpni_error_cfg *cfg);
+int dpni_set_errors_behavior(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpni_error_cfg *cfg);
/**
* DPNI buffer layout modification options
@@ -520,25 +395,26 @@ int dpni_set_errors_behavior(struct fsl_mc_io *mc_io,
/**
* struct dpni_buffer_layout - Structure representing DPNI buffer layout
- * @options: Flags representing the suggested modifications to the buffer
- * layout; Use any combination of 'DPNI_BUF_LAYOUT_OPT_<X>' flags
- * @pass_timestamp: Pass timestamp value
- * @pass_parser_result: Pass parser results
- * @pass_frame_status: Pass frame status
- * @private_data_size: Size kept for private data (in bytes)
- * @data_align: Data alignment
- * @data_head_room: Data head room
- * @data_tail_room: Data tail room
+ * @options: Flags representing the suggested modifications to the
+ * buffer layout;
+ * Use any combination of 'DPNI_BUF_LAYOUT_OPT_<X>' flags
+ * @pass_timestamp: Pass timestamp value
+ * @pass_parser_result: Pass parser results
+ * @pass_frame_status: Pass frame status
+ * @private_data_size: Size kept for private data (in bytes)
+ * @data_align: Data alignment
+ * @data_head_room: Data head room
+ * @data_tail_room: Data tail room
*/
struct dpni_buffer_layout {
- uint32_t options;
- int pass_timestamp;
- int pass_parser_result;
- int pass_frame_status;
- uint16_t private_data_size;
- uint16_t data_align;
- uint16_t data_head_room;
- uint16_t data_tail_room;
+ uint32_t options;
+ int pass_timestamp;
+ int pass_parser_result;
+ int pass_frame_status;
+ uint16_t private_data_size;
+ uint16_t data_align;
+ uint16_t data_head_room;
+ uint16_t data_tail_room;
};
/**
@@ -547,45 +423,24 @@ struct dpni_buffer_layout {
* @DPNI_QUEUE_TX: Tx queue
* @DPNI_QUEUE_TX_CONFIRM: Tx confirmation queue
* @DPNI_QUEUE_RX_ERR: Rx error queue
- */enum dpni_queue_type {
+ */
+enum dpni_queue_type {
DPNI_QUEUE_RX,
DPNI_QUEUE_TX,
DPNI_QUEUE_TX_CONFIRM,
DPNI_QUEUE_RX_ERR,
};
-/**
- * dpni_get_buffer_layout() - Retrieve buffer layout attributes.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @qtype: Type of queue to get the layout from
- * @layout: Returns buffer layout attributes
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_get_buffer_layout(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- enum dpni_queue_type qtype,
- struct dpni_buffer_layout *layout);
+int dpni_get_buffer_layout(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ enum dpni_queue_type qtype,
+ struct dpni_buffer_layout *layout);
-/**
- * dpni_set_buffer_layout() - Set buffer layout configuration.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @qtype: Type of queue to set layout on
- * @layout: Buffer layout configuration
- *
- * Return: '0' on Success; Error code otherwise.
- *
- * @warning Allowed only when DPNI is disabled
- */
-int dpni_set_buffer_layout(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- enum dpni_queue_type qtype,
+int dpni_set_buffer_layout(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ enum dpni_queue_type qtype,
const struct dpni_buffer_layout *layout);
/**
@@ -594,72 +449,39 @@ int dpni_set_buffer_layout(struct fsl_mc_io *mc_io,
* @DPNI_OFF_RX_L4_CSUM: Rx L4 checksum validation
* @DPNI_OFF_TX_L3_CSUM: Tx L3 checksum generation
* @DPNI_OFF_TX_L4_CSUM: Tx L4 checksum generation
+ * @DPNI_OPT_FLCTYPE_HASH: flow context will be generated by WRIOP for AIOP or
+ * for CPU
*/
enum dpni_offload {
DPNI_OFF_RX_L3_CSUM,
DPNI_OFF_RX_L4_CSUM,
DPNI_OFF_TX_L3_CSUM,
DPNI_OFF_TX_L4_CSUM,
+ DPNI_FLCTYPE_HASH,
};
-/**
- * dpni_set_offload() - Set DPNI offload configuration.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @type: Type of DPNI offload
- * @config: Offload configuration.
- * For checksum offloads, non-zero value enables
- * the offload.
- *
- * Return: '0' on Success; Error code otherwise.
- *
- * @warning Allowed only when DPNI is disabled
- */
int dpni_set_offload(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
enum dpni_offload type,
uint32_t config);
-/**
- * dpni_get_offload() - Get DPNI offload configuration.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @type: Type of DPNI offload
- * @config: Offload configuration.
- * For checksum offloads, a value of 1 indicates that the
- * offload is enabled.
- *
- * Return: '0' on Success; Error code otherwise.
- *
- * @warning Allowed only when DPNI is disabled
- */
int dpni_get_offload(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
enum dpni_offload type,
uint32_t *config);
-/**
- * dpni_get_qdid() - Get the Queuing Destination ID (QDID) that should be used
- * for enqueue operations
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @qtype: Type of queue to get QDID for. For applications lookig to
- * transmit traffic this should be set to DPNI_QUEUE_TX
- * @qdid: Returned virtual QDID value that should be used as an argument
- * in all enqueue operations
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_get_qdid(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- enum dpni_queue_type qtype,
- uint16_t *qdid);
+int dpni_get_qdid(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ enum dpni_queue_type qtype,
+ uint16_t *qdid);
+
+int dpni_get_tx_data_offset(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint16_t *data_offset);
#define DPNI_STATISTICS_CNT 7
@@ -715,6 +537,23 @@ union dpni_statistics {
uint64_t egress_confirmed_frames;
} page_2;
/**
+ * struct page_3 - Page_3 statistics structure with values for the
+ * selected TC
+ * @ceetm_dequeue_bytes: Cumulative count of the number of bytes
+ * dequeued
+ * @ceetm_dequeue_frames: Cumulative count of the number of frames
+ * dequeued
+ * @ceetm_reject_bytes: Cumulative count of the number of bytes in all
+ * frames whose enqueue was rejected
+ * @ceetm_reject_frames: Cumulative count of all frame enqueues rejected
+ */
+ struct {
+ uint64_t ceetm_dequeue_bytes;
+ uint64_t ceetm_dequeue_frames;
+ uint64_t ceetm_reject_bytes;
+ uint64_t ceetm_reject_frames;
+ } page_3;
+ /**
* struct raw - raw statistics structure, used to index counters
*/
struct {
@@ -738,6 +577,10 @@ union dpni_statistics {
* Enable a-symmetric pause frames
*/
#define DPNI_LINK_OPT_ASYM_PAUSE 0x0000000000000008ULL
+/**
+ * Enable priority flow control pause frames
+ */
+#define DPNI_LINK_OPT_PFC_PAUSE 0x0000000000000010ULL
/**
* struct - Structure representing DPNI link configuration
@@ -749,278 +592,117 @@ struct dpni_link_cfg {
uint64_t options;
};
-/**
- * dpni_set_link_cfg() - set the link configuration.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @cfg: Link configuration
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_set_link_cfg(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- const struct dpni_link_cfg *cfg);
+int dpni_set_link_cfg(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ const struct dpni_link_cfg *cfg);
/**
* struct dpni_link_state - Structure representing DPNI link state
- * @rate: Rate
- * @options: Mask of available options; use 'DPNI_LINK_OPT_<X>' values
- * @up: Link state; '0' for down, '1' for up
+ * @rate: Rate
+ * @options: Mask of available options; use 'DPNI_LINK_OPT_<X>' values
+ * @up: Link state; '0' for down, '1' for up
*/
struct dpni_link_state {
- uint32_t rate;
- uint64_t options;
- int up;
+ uint32_t rate;
+ uint64_t options;
+ int up;
};
-/**
- * dpni_get_link_state() - Return the link state (either up or down)
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @state: Returned link state;
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_get_link_state(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- struct dpni_link_state *state);
-
-/**
- * dpni_set_max_frame_length() - Set the maximum received frame length.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @max_frame_length: Maximum received frame length (in
- * bytes); frame is discarded if its
- * length exceeds this value
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_set_max_frame_length(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint16_t max_frame_length);
-
-/**
- * dpni_get_max_frame_length() - Get the maximum received frame length.
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @max_frame_length: Maximum received frame length (in
- * bytes); frame is discarded if its
- * length exceeds this value
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_get_max_frame_length(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint16_t *max_frame_length);
-
-/**
- * dpni_set_multicast_promisc() - Enable/disable multicast promiscuous mode
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @en: Set to '1' to enable; '0' to disable
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_set_multicast_promisc(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- int en);
-
-/**
- * dpni_get_multicast_promisc() - Get multicast promiscuous mode
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @en: Returns '1' if enabled; '0' otherwise
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_get_multicast_promisc(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- int *en);
-
-/**
- * dpni_set_unicast_promisc() - Enable/disable unicast promiscuous mode
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @en: Set to '1' to enable; '0' to disable
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_set_unicast_promisc(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- int en);
-
-/**
- * dpni_get_unicast_promisc() - Get unicast promiscuous mode
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @en: Returns '1' if enabled; '0' otherwise
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_get_unicast_promisc(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- int *en);
-
-/**
- * dpni_set_primary_mac_addr() - Set the primary MAC address
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @mac_addr: MAC address to set as primary address
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- const uint8_t mac_addr[6]);
-
-/**
- * dpni_get_primary_mac_addr() - Get the primary MAC address
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @mac_addr: Returned MAC address
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_get_primary_mac_addr(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t mac_addr[6]);
-
-/**
- * dpni_add_mac_addr() - Add MAC address filter
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @mac_addr: MAC address to add
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_add_mac_addr(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- const uint8_t mac_addr[6]);
-
-/**
- * dpni_remove_mac_addr() - Remove MAC address filter
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @mac_addr: MAC address to remove
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_remove_mac_addr(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- const uint8_t mac_addr[6]);
-
-/**
- * dpni_clear_mac_filters() - Clear all unicast and/or multicast MAC filters
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @unicast: Set to '1' to clear unicast addresses
- * @multicast: Set to '1' to clear multicast addresses
- *
- * The primary MAC address is not cleared by this operation.
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_clear_mac_filters(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- int unicast,
- int multicast);
-
-/**
- * dpni_get_port_mac_addr() - Retrieve MAC address associated to the physical
- * port the DPNI is attached to
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @mac_addr: MAC address of the physical port, if any, otherwise 0
- *
- * The primary MAC address is not modified by this operation.
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_get_port_mac_addr(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t mac_addr[6]);
-
-/**
- * dpni_enable_vlan_filter() - Enable/disable VLAN filtering mode
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @en: Set to '1' to enable; '0' to disable
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_enable_vlan_filter(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- int en);
+int dpni_get_link_state(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpni_link_state *state);
+
+int dpni_set_max_frame_length(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint16_t max_frame_length);
+
+int dpni_get_max_frame_length(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint16_t *max_frame_length);
+
+int dpni_set_mtu(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint16_t mtu);
+
+int dpni_get_mtu(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint16_t *mtu);
+
+int dpni_set_multicast_promisc(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int en);
+
+int dpni_get_multicast_promisc(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int *en);
+
+int dpni_set_unicast_promisc(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int en);
+
+int dpni_get_unicast_promisc(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int *en);
+
+int dpni_set_primary_mac_addr(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ const uint8_t mac_addr[6]);
+
+int dpni_get_primary_mac_addr(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t mac_addr[6]);
+
+int dpni_add_mac_addr(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ const uint8_t mac_addr[6]);
-/**
- * dpni_add_vlan_id() - Add VLAN ID filter
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @vlan_id: VLAN ID to add
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_add_vlan_id(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint16_t vlan_id);
+int dpni_remove_mac_addr(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ const uint8_t mac_addr[6]);
+
+int dpni_clear_mac_filters(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int unicast,
+ int multicast);
+
+int dpni_get_port_mac_addr(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t mac_addr[6]);
+
+int dpni_enable_vlan_filter(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ int en);
+
+int dpni_add_vlan_id(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint16_t vlan_id);
-/**
- * dpni_remove_vlan_id() - Remove VLAN ID filter
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @vlan_id: VLAN ID to remove
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_remove_vlan_id(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint16_t vlan_id);
+int dpni_remove_vlan_id(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint16_t vlan_id);
-/**
- * dpni_clear_vlan_filters() - Clear all VLAN filters
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_clear_vlan_filters(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpni_clear_vlan_filters(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
/**
* enum dpni_dist_mode - DPNI distribution mode
@@ -1050,27 +732,16 @@ enum dpni_fs_miss_action {
/**
* struct dpni_fs_tbl_cfg - Flow Steering table configuration
- * @miss_action: Miss action selection
- * @default_flow_id: Used when 'miss_action = DPNI_FS_MISS_EXPLICIT_FLOWID'
+ * @miss_action: Miss action selection
+ * @default_flow_id: Used when 'miss_action = DPNI_FS_MISS_EXPLICIT_FLOWID'
*/
struct dpni_fs_tbl_cfg {
- enum dpni_fs_miss_action miss_action;
- uint16_t default_flow_id;
+ enum dpni_fs_miss_action miss_action;
+ uint16_t default_flow_id;
+ char keep_hash_key;
};
/**
- * dpni_prepare_key_cfg() - function prepare extract parameters
- * @cfg: defining a full Key Generation profile (rule)
- * @key_cfg_buf: Zeroed 256 bytes of memory before mapping it to DMA
- *
- * This function has to be called before the following functions:
- * - dpni_set_rx_tc_dist()
- * - dpni_set_qos_table()
- */
-int dpni_prepare_key_cfg(const struct dpkg_profile_cfg *cfg,
- uint8_t *key_cfg_buf);
-
-/**
* struct dpni_rx_tc_dist_cfg - Rx traffic class distribution configuration
* @dist_size: Set the distribution size;
* supported values: 1,2,3,4,6,7,8,12,14,16,24,28,32,48,56,64,96,
@@ -1078,36 +749,24 @@ int dpni_prepare_key_cfg(const struct dpkg_profile_cfg *cfg,
* @dist_mode: Distribution mode
* @key_cfg_iova: I/O virtual address of 256 bytes DMA-able memory filled with
* the extractions to be used for the distribution key by calling
- * dpni_prepare_key_cfg() relevant only when
+ * dpkg_prepare_key_cfg() relevant only when
* 'dist_mode != DPNI_DIST_MODE_NONE', otherwise it can be '0'
* @fs_cfg: Flow Steering table configuration; only relevant if
* 'dist_mode = DPNI_DIST_MODE_FS'
*/
struct dpni_rx_tc_dist_cfg {
- uint16_t dist_size;
- enum dpni_dist_mode dist_mode;
- uint64_t key_cfg_iova;
- struct dpni_fs_tbl_cfg fs_cfg;
+ uint16_t dist_size;
+ enum dpni_dist_mode dist_mode;
+ uint64_t key_cfg_iova;
+ struct dpni_fs_tbl_cfg fs_cfg;
};
-/**
- * dpni_set_rx_tc_dist() - Set Rx traffic class distribution configuration
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @tc_id: Traffic class selection (0-7)
- * @cfg: Traffic class distribution configuration
- *
- * warning: if 'dist_mode != DPNI_DIST_MODE_NONE', call dpni_prepare_key_cfg()
- * first to prepare the key_cfg_iova parameter
- *
- * Return: '0' on Success; error code otherwise.
- */
-int dpni_set_rx_tc_dist(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t tc_id,
- const struct dpni_rx_tc_dist_cfg *cfg);
+int dpni_set_rx_tc_dist(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t tc_id,
+ const struct dpni_rx_tc_dist_cfg *cfg);
+
/**
* enum dpni_congestion_unit - DPNI congestion units
* @DPNI_CONGESTION_UNIT_BYTES: bytes units
@@ -1147,9 +806,9 @@ enum dpni_dest {
* channel; not relevant for 'DPNI_DEST_NONE' option
*/
struct dpni_dest_cfg {
- enum dpni_dest dest_type;
- int dest_id;
- uint8_t priority;
+ enum dpni_dest dest_type;
+ int dest_id;
+ uint8_t priority;
};
/* DPNI congestion options */
@@ -1186,6 +845,11 @@ struct dpni_dest_cfg {
* sw-portal's DQRR, the DQRI interrupt is asserted immediately (if enabled)
*/
#define DPNI_CONG_OPT_INTR_COALESCING_DISABLED 0x00000020
+/**
+ * This congestion will trigger flow control or priority flow control. This
+ * will have effect only if flow control is enabled with dpni_set_link_cfg()
+ */
+#define DPNI_CONG_OPT_FLOW_CONTROL 0x00000040
/**
* struct dpni_congestion_notification_cfg - congestion notification
@@ -1203,54 +867,35 @@ struct dpni_dest_cfg {
*/
struct dpni_congestion_notification_cfg {
- enum dpni_congestion_unit units;
- uint32_t threshold_entry;
- uint32_t threshold_exit;
- uint64_t message_ctx;
- uint64_t message_iova;
- struct dpni_dest_cfg dest_cfg;
- uint16_t notification_mode;
+ enum dpni_congestion_unit units;
+ uint32_t threshold_entry;
+ uint32_t threshold_exit;
+ uint64_t message_ctx;
+ uint64_t message_iova;
+ struct dpni_dest_cfg dest_cfg;
+ uint16_t notification_mode;
};
-/**
- * dpni_set_congestion_notification() - Set traffic class congestion
- * notification configuration
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @qtype: Type of queue - Rx, Tx and Tx confirm types are supported
- * @tc_id: Traffic class selection (0-7)
- * @cfg: congestion notification configuration
- *
- * Return: '0' on Success; error code otherwise.
- */
-int dpni_set_congestion_notification(
- struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- enum dpni_queue_type qtype,
- uint8_t tc_id,
+int dpni_set_congestion_notification(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ enum dpni_queue_type qtype,
+ uint8_t tc_id,
const struct dpni_congestion_notification_cfg *cfg);
-/**
- * dpni_get_congestion_notification() - Get traffic class congestion
- * notification configuration
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @qtype: Type of queue - Rx, Tx and Tx confirm types are supported
- * @tc_id: Traffic class selection (0-7)
- * @cfg: congestion notification configuration
- *
- * Return: '0' on Success; error code otherwise.
- */
-int dpni_get_congestion_notification(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- enum dpni_queue_type qtype,
- uint8_t tc_id,
+int dpni_get_congestion_notification(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ enum dpni_queue_type qtype,
+ uint8_t tc_id,
struct dpni_congestion_notification_cfg *cfg);
+/* DPNI FLC stash options */
+
+/**
+ * stashes the whole annotation area (up to 192 bytes)
+ */
+#define DPNI_FLC_STASH_FRAME_ANNOTATION 0x00000001
/**
* struct dpni_queue - Queue structure
@@ -1291,9 +936,25 @@ struct dpni_queue {
uint64_t user_context;
/**
* struct flc - FD FLow Context structure
- * @value: FLC value to set
- * @stash_control: Boolean, indicates whether the 6 lowest
- * significant bits are used for stash control.
+ * @value: Default FLC value for traffic dequeued from
+ * this queue. Please check description of FD
+ * structure for more information.
+ * Note that FLC values set using dpni_add_fs_entry,
+ * if any, take precedence over values per queue.
+ * @stash_control: Boolean, indicates whether the 6 lowest
+ * - significant bits are used for stash control.
+ * significant bits are used for stash control. If set, the 6
+ * least significant bits in value are interpreted as follows:
+ * - bits 0-1: indicates the number of 64 byte units of context
+ * that are stashed. FLC value is interpreted as a memory address
+ * in this case, excluding the 6 LS bits.
+ * - bits 2-3: indicates the number of 64 byte units of frame
+ * annotation to be stashed. Annotation is placed at FD[ADDR].
+ * - bits 4-5: indicates the number of 64 byte units of frame
+ * data to be stashed. Frame data is placed at FD[ADDR] +
+ * FD[OFFSET].
+ * For more details check the Frame Descriptor section in the
+ * hardware documentation.
*/
struct {
uint64_t value;
@@ -1331,41 +992,16 @@ enum dpni_confirmation_mode {
DPNI_CONF_DISABLE,
};
-/**
- * dpni_set_tx_confirmation_mode() - Tx confirmation mode
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @mode: Tx confirmation mode
- *
- * This function is useful only when 'DPNI_OPT_TX_CONF_DISABLED' is not
- * selected at DPNI creation.
- * Calling this function with 'mode' set to DPNI_CONF_DISABLE disables all
- * transmit confirmation (including the private confirmation queues), regardless
- * of previous settings; Note that in this case, Tx error frames are still
- * enqueued to the general transmit errors queue.
- * Calling this function with 'mode' set to DPNI_CONF_SINGLE switches all
- * Tx confirmations to a shared Tx conf queue. The ID of the queue when
- * calling dpni_set/get_queue is -1.
- * Tx confirmation mode can only be changed while the DPNI is disabled.
- * Executing this command while the DPNI is enabled will return an error.
- *
- * Return: '0' on Success; Error code otherwise.
- */
-int dpni_set_tx_confirmation_mode(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- enum dpni_confirmation_mode mode);
+int dpni_set_tx_confirmation_mode(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ enum dpni_confirmation_mode mode);
+
+int dpni_get_tx_confirmation_mode(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ enum dpni_confirmation_mode *mode);
-/**
- * dpni_get_api_version() - Get Data Path Network Interface API version
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @major_ver: Major version of data path network interface API
- * @minor_ver: Minor version of data path network interface API
- *
- * Return: '0' on Success; Error code otherwise.
- */
int dpni_get_api_version(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t *major_ver,
@@ -1396,23 +1032,6 @@ int dpni_get_api_version(struct fsl_mc_io *mc_io,
*/
#define DPNI_QUEUE_OPT_HOLD_ACTIVE 0x00000008
-/**
- * dpni_set_queue() - Set queue parameters
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @qtype: Type of queue - all queue types are supported, although
- * the command is ignored for Tx
- * @tc: Traffic class, in range 0 to NUM_TCS - 1
- * @index: Selects the specific queue out of the set
- * allocated for the same TC.Value must be in
- * range 0 to NUM_QUEUES - 1
- * @options: A combination of DPNI_QUEUE_OPT_ values that control
- * what configuration options are set on the queue
- * @queue: Queue configuration structure
- *
- * Return: '0' on Success; Error code otherwise.
- */
int dpni_set_queue(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
@@ -1422,31 +1041,6 @@ int dpni_set_queue(struct fsl_mc_io *mc_io,
uint8_t options,
const struct dpni_queue *queue);
-/**
- * dpni_get_queue() - Get queue parameters
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @qtype: Type of queue - all queue types are supported
- * @tc: Traffic class, in range 0 to NUM_TCS - 1
- * @index: Selects the specific queue out of the set allocated
- * for the same TC. Value must be in range 0 to
- * NUM_QUEUES - 1
- * @queue: Queue configuration structure
- * @qid: Queue identification
- *
- * This function returns current queue configuration which can be changed by
- * calling dpni_set_queue, and queue identification information.
- * Returned qid.fqid and/or qid.qdbin values can be used to:
- * - enqueue traffic for Tx queues,
- * - perform volatile dequeue for Rx and, if applicable, Tx confirmation
- * clean-up,
- * - retrieve queue state.
- *
- * All these operations are supported through the DPIO run-time API.
- *
- * Return: '0' on Success; Error code otherwise.
- */
int dpni_get_queue(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
@@ -1456,32 +1050,13 @@ int dpni_get_queue(struct fsl_mc_io *mc_io,
struct dpni_queue *queue,
struct dpni_queue_id *qid);
-/**
- * dpni_get_statistics() - Get DPNI statistics
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @page: Selects the statistics page to retrieve, see
- * DPNI_GET_STATISTICS output.
- * Pages are numbered 0 to 2.
- * @stat: Structure containing the statistics
- *
- * Return: '0' on Success; Error code otherwise.
- */
int dpni_get_statistics(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
uint8_t page,
+ uint8_t param,
union dpni_statistics *stat);
-/**
- * dpni_reset_statistics() - Clears DPNI statistics
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- *
- * Return: '0' on Success; Error code otherwise.
- */
int dpni_reset_statistics(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token);
@@ -1505,40 +1080,25 @@ enum dpni_congestion_point {
* struct dpni_taildrop - Structure representing the taildrop
* @enable: Indicates whether the taildrop is active or not.
* @units: Indicates the unit of THRESHOLD. Queue taildrop only
- * supports byte units, this field is ignored and
- * assumed = 0 if CONGESTION_POINT is 0.
+ * supports byte units, this field is ignored and
+ * assumed = 0 if CONGESTION_POINT is 0.
* @threshold: Threshold value, in units identified by UNITS field. Value 0
- * cannot be used as a valid taildrop threshold,
- * THRESHOLD must be > 0 if the taildrop is
- * enabled.
+ * cannot be used as a valid taildrop threshold,
+ * THRESHOLD must be > 0 if the taildrop is
+ * enabled.
+ * @oal : Overhead Accounting Length, a 12-bit, 2's complement value
+ * with range (-2048 to +2047) representing a fixed per-frame
+ * overhead to be added to the actual length of a frame when
+ * performing WRED and tail drop calculations and threshold
+ * comparisons.
*/
struct dpni_taildrop {
char enable;
enum dpni_congestion_unit units;
uint32_t threshold;
+ int16_t oal;
};
-/**
- * dpni_set_taildrop() - Set taildrop per queue or TC
- *
- * Setting a per-TC taildrop (cg_point = DPNI_CP_GROUP) will reset any current
- * congestion notification or early drop (WRED) configuration previously applied
- * to the same TC.
- *
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @cg_point: Congestion point. DPNI_CP_QUEUE is only supported in
- * combination with DPNI_QUEUE_RX.
- * @q_type: Queue type, can be DPNI_QUEUE_RX or DPNI_QUEUE_TX.
- * @tc: Traffic class to apply this taildrop to
- * @q_index: Index of the queue if the DPNI supports multiple queues for
- * traffic distribution.
- * Ignored if CONGESTION_POINT is not DPNI_CP_QUEUE.
- * @taildrop: Taildrop structure
- *
- * Return: '0' on Success; Error code otherwise.
- */
int dpni_set_taildrop(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
@@ -1548,21 +1108,6 @@ int dpni_set_taildrop(struct fsl_mc_io *mc_io,
uint8_t q_index,
struct dpni_taildrop *taildrop);
-/**
- * dpni_get_taildrop() - Get taildrop information
- * @mc_io: Pointer to MC portal's I/O object
- * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
- * @token: Token of DPNI object
- * @cg_point: Congestion point
- * @q_type:
- * @tc: Traffic class to apply this taildrop to
- * @q_index: Index of the queue if the DPNI supports multiple queues for
- * traffic distribution. Ignored if CONGESTION_POINT
- * is not 0.
- * @taildrop: Taildrop structure
- *
- * Return: '0' on Success; Error code otherwise.
- */
int dpni_get_taildrop(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
diff --git a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
index 2ac397c..81226aa 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
@@ -5,7 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP.
+ * Copyright 2016-2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -42,435 +42,547 @@
/* DPNI Version */
#define DPNI_VER_MAJOR 7
-#define DPNI_VER_MINOR 0
+#define DPNI_VER_MINOR 3
+
+#define DPNI_CMD_BASE_VERSION 1
+#define DPNI_CMD_VERSION_2 2
+#define DPNI_CMD_ID_OFFSET 4
+
+#define DPNI_CMD(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_BASE_VERSION)
+#define DPNI_CMD_V2(id) (((id) << DPNI_CMD_ID_OFFSET) | DPNI_CMD_VERSION_2)
/* Command IDs */
-#define DPNI_CMDID_OPEN ((0x801 << 4) | (0x1))
-#define DPNI_CMDID_CLOSE ((0x800 << 4) | (0x1))
-#define DPNI_CMDID_CREATE ((0x901 << 4) | (0x1))
-#define DPNI_CMDID_DESTROY ((0x981 << 4) | (0x1))
-#define DPNI_CMDID_GET_API_VERSION ((0xa01 << 4) | (0x1))
-
-#define DPNI_CMDID_ENABLE ((0x002 << 4) | (0x1))
-#define DPNI_CMDID_DISABLE ((0x003 << 4) | (0x1))
-#define DPNI_CMDID_GET_ATTR ((0x004 << 4) | (0x1))
-#define DPNI_CMDID_RESET ((0x005 << 4) | (0x1))
-#define DPNI_CMDID_IS_ENABLED ((0x006 << 4) | (0x1))
-
-#define DPNI_CMDID_SET_POOLS ((0x200 << 4) | (0x1))
-#define DPNI_CMDID_SET_ERRORS_BEHAVIOR ((0x20B << 4) | (0x1))
-
-#define DPNI_CMDID_GET_QDID ((0x210 << 4) | (0x1))
-#define DPNI_CMDID_GET_LINK_STATE ((0x215 << 4) | (0x1))
-#define DPNI_CMDID_SET_MAX_FRAME_LENGTH ((0x216 << 4) | (0x1))
-#define DPNI_CMDID_GET_MAX_FRAME_LENGTH ((0x217 << 4) | (0x1))
-#define DPNI_CMDID_SET_LINK_CFG ((0x21a << 4) | (0x1))
-
-#define DPNI_CMDID_SET_MCAST_PROMISC ((0x220 << 4) | (0x1))
-#define DPNI_CMDID_GET_MCAST_PROMISC ((0x221 << 4) | (0x1))
-#define DPNI_CMDID_SET_UNICAST_PROMISC ((0x222 << 4) | (0x1))
-#define DPNI_CMDID_GET_UNICAST_PROMISC ((0x223 << 4) | (0x1))
-#define DPNI_CMDID_SET_PRIM_MAC ((0x224 << 4) | (0x1))
-#define DPNI_CMDID_GET_PRIM_MAC ((0x225 << 4) | (0x1))
-#define DPNI_CMDID_ADD_MAC_ADDR ((0x226 << 4) | (0x1))
-#define DPNI_CMDID_REMOVE_MAC_ADDR ((0x227 << 4) | (0x1))
-#define DPNI_CMDID_CLR_MAC_FILTERS ((0x228 << 4) | (0x1))
-
-#define DPNI_CMDID_ENABLE_VLAN_FILTER ((0x230 << 4) | (0x1))
-#define DPNI_CMDID_ADD_VLAN_ID ((0x231 << 4) | (0x1))
-#define DPNI_CMDID_REMOVE_VLAN_ID ((0x232 << 4) | (0x1))
-#define DPNI_CMDID_CLR_VLAN_FILTERS ((0x233 << 4) | (0x1))
-
-#define DPNI_CMDID_SET_RX_TC_DIST ((0x235 << 4) | (0x1))
-
-#define DPNI_CMDID_GET_STATISTICS ((0x25D << 4) | (0x1))
-#define DPNI_CMDID_RESET_STATISTICS ((0x25E << 4) | (0x1))
-#define DPNI_CMDID_GET_QUEUE ((0x25F << 4) | (0x1))
-#define DPNI_CMDID_SET_QUEUE ((0x260 << 4) | (0x1))
-#define DPNI_CMDID_GET_TAILDROP ((0x261 << 4) | (0x1))
-#define DPNI_CMDID_SET_TAILDROP ((0x262 << 4) | (0x1))
-
-#define DPNI_CMDID_GET_PORT_MAC_ADDR ((0x263 << 4) | (0x1))
-
-#define DPNI_CMDID_GET_BUFFER_LAYOUT ((0x264 << 4) | (0x1))
-#define DPNI_CMDID_SET_BUFFER_LAYOUT ((0x265 << 4) | (0x1))
-
-#define DPNI_CMDID_SET_CONGESTION_NOTIFICATION ((0x267 << 4) | (0x1))
-#define DPNI_CMDID_GET_CONGESTION_NOTIFICATION ((0x268 << 4) | (0x1))
-#define DPNI_CMDID_GET_OFFLOAD ((0x26B << 4) | (0x1))
-#define DPNI_CMDID_SET_OFFLOAD ((0x26C << 4) | (0x1))
-#define DPNI_CMDID_SET_TX_CONFIRMATION_MODE ((0x266 << 4) | (0x1))
-#define DPNI_CMDID_GET_TX_CONFIRMATION_MODE ((0x26D << 4) | (0x1))
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_OPEN(cmd, dpni_id) \
- MC_CMD_OP(cmd, 0, 0, 32, int, dpni_id)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_CREATE(cmd, cfg) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 32, uint32_t, (cfg)->options); \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, (cfg)->num_queues); \
- MC_CMD_OP(cmd, 0, 40, 8, uint8_t, (cfg)->num_tcs); \
- MC_CMD_OP(cmd, 0, 48, 8, uint8_t, (cfg)->mac_filter_entries); \
- MC_CMD_OP(cmd, 1, 0, 8, uint8_t, (cfg)->vlan_filter_entries); \
- MC_CMD_OP(cmd, 1, 16, 8, uint8_t, (cfg)->qos_entries); \
- MC_CMD_OP(cmd, 1, 32, 16, uint16_t, (cfg)->fs_entries); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_SET_POOLS(cmd, cfg) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 8, uint8_t, cfg->num_dpbp); \
- MC_CMD_OP(cmd, 0, 8, 1, int, cfg->pools[0].backup_pool); \
- MC_CMD_OP(cmd, 0, 9, 1, int, cfg->pools[1].backup_pool); \
- MC_CMD_OP(cmd, 0, 10, 1, int, cfg->pools[2].backup_pool); \
- MC_CMD_OP(cmd, 0, 11, 1, int, cfg->pools[3].backup_pool); \
- MC_CMD_OP(cmd, 0, 12, 1, int, cfg->pools[4].backup_pool); \
- MC_CMD_OP(cmd, 0, 13, 1, int, cfg->pools[5].backup_pool); \
- MC_CMD_OP(cmd, 0, 14, 1, int, cfg->pools[6].backup_pool); \
- MC_CMD_OP(cmd, 0, 15, 1, int, cfg->pools[7].backup_pool); \
- MC_CMD_OP(cmd, 0, 32, 32, int, cfg->pools[0].dpbp_id); \
- MC_CMD_OP(cmd, 4, 32, 16, uint16_t, cfg->pools[0].buffer_size);\
- MC_CMD_OP(cmd, 1, 0, 32, int, cfg->pools[1].dpbp_id); \
- MC_CMD_OP(cmd, 4, 48, 16, uint16_t, cfg->pools[1].buffer_size);\
- MC_CMD_OP(cmd, 1, 32, 32, int, cfg->pools[2].dpbp_id); \
- MC_CMD_OP(cmd, 5, 0, 16, uint16_t, cfg->pools[2].buffer_size);\
- MC_CMD_OP(cmd, 2, 0, 32, int, cfg->pools[3].dpbp_id); \
- MC_CMD_OP(cmd, 5, 16, 16, uint16_t, cfg->pools[3].buffer_size);\
- MC_CMD_OP(cmd, 2, 32, 32, int, cfg->pools[4].dpbp_id); \
- MC_CMD_OP(cmd, 5, 32, 16, uint16_t, cfg->pools[4].buffer_size);\
- MC_CMD_OP(cmd, 3, 0, 32, int, cfg->pools[5].dpbp_id); \
- MC_CMD_OP(cmd, 5, 48, 16, uint16_t, cfg->pools[5].buffer_size);\
- MC_CMD_OP(cmd, 3, 32, 32, int, cfg->pools[6].dpbp_id); \
- MC_CMD_OP(cmd, 6, 0, 16, uint16_t, cfg->pools[6].buffer_size);\
- MC_CMD_OP(cmd, 4, 0, 32, int, cfg->pools[7].dpbp_id); \
- MC_CMD_OP(cmd, 6, 16, 16, uint16_t, cfg->pools[7].buffer_size);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_RSP_IS_ENABLED(cmd, en) \
- MC_RSP_OP(cmd, 0, 0, 1, int, en)
-
-/* DPNI_CMD_GET_ATTR is not used, no input parameters */
-
-#define DPNI_RSP_GET_ATTR(cmd, attr) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 32, uint32_t, (attr)->options); \
- MC_RSP_OP(cmd, 0, 32, 8, uint8_t, (attr)->num_queues); \
- MC_RSP_OP(cmd, 0, 40, 8, uint8_t, (attr)->num_tcs); \
- MC_RSP_OP(cmd, 0, 48, 8, uint8_t, (attr)->mac_filter_entries); \
- MC_RSP_OP(cmd, 1, 0, 8, uint8_t, (attr)->vlan_filter_entries); \
- MC_RSP_OP(cmd, 1, 16, 8, uint8_t, (attr)->qos_entries); \
- MC_RSP_OP(cmd, 1, 32, 16, uint16_t, (attr)->fs_entries); \
- MC_RSP_OP(cmd, 2, 0, 8, uint8_t, (attr)->qos_key_size); \
- MC_RSP_OP(cmd, 2, 8, 8, uint8_t, (attr)->fs_key_size); \
- MC_RSP_OP(cmd, 2, 16, 16, uint16_t, (attr)->wriop_version); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_SET_ERRORS_BEHAVIOR(cmd, cfg) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 32, uint32_t, cfg->errors); \
- MC_CMD_OP(cmd, 0, 32, 4, enum dpni_error_action, cfg->error_action); \
- MC_CMD_OP(cmd, 0, 36, 1, int, cfg->set_frame_annotation); \
-} while (0)
-
-#define DPNI_CMD_GET_BUFFER_LAYOUT(cmd, qtype) \
- MC_CMD_OP(cmd, 0, 0, 8, enum dpni_queue_type, qtype)
-
-#define DPNI_RSP_GET_BUFFER_LAYOUT(cmd, layout) \
-do { \
- MC_RSP_OP(cmd, 0, 48, 1, char, (layout)->pass_timestamp); \
- MC_RSP_OP(cmd, 0, 49, 1, char, (layout)->pass_parser_result); \
- MC_RSP_OP(cmd, 0, 50, 1, char, (layout)->pass_frame_status); \
- MC_RSP_OP(cmd, 1, 0, 16, uint16_t, (layout)->private_data_size); \
- MC_RSP_OP(cmd, 1, 16, 16, uint16_t, (layout)->data_align); \
- MC_RSP_OP(cmd, 1, 32, 16, uint16_t, (layout)->data_head_room); \
- MC_RSP_OP(cmd, 1, 48, 16, uint16_t, (layout)->data_tail_room); \
-} while (0)
-
-#define DPNI_CMD_SET_BUFFER_LAYOUT(cmd, qtype, layout) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 8, enum dpni_queue_type, qtype); \
- MC_CMD_OP(cmd, 0, 32, 16, uint16_t, (layout)->options); \
- MC_CMD_OP(cmd, 0, 48, 1, char, (layout)->pass_timestamp); \
- MC_CMD_OP(cmd, 0, 49, 1, char, (layout)->pass_parser_result); \
- MC_CMD_OP(cmd, 0, 50, 1, char, (layout)->pass_frame_status); \
- MC_CMD_OP(cmd, 1, 0, 16, uint16_t, (layout)->private_data_size); \
- MC_CMD_OP(cmd, 1, 16, 16, uint16_t, (layout)->data_align); \
- MC_CMD_OP(cmd, 1, 32, 16, uint16_t, (layout)->data_head_room); \
- MC_CMD_OP(cmd, 1, 48, 16, uint16_t, (layout)->data_tail_room); \
-} while (0)
-
-#define DPNI_CMD_SET_OFFLOAD(cmd, type, config) \
-do { \
- MC_CMD_OP(cmd, 0, 24, 8, enum dpni_offload, type); \
- MC_CMD_OP(cmd, 0, 32, 32, uint32_t, config); \
-} while (0)
-
-#define DPNI_CMD_GET_OFFLOAD(cmd, type) \
- MC_CMD_OP(cmd, 0, 24, 8, enum dpni_offload, type)
-
-#define DPNI_RSP_GET_OFFLOAD(cmd, config) \
- MC_RSP_OP(cmd, 0, 32, 32, uint32_t, config)
-
-#define DPNI_CMD_GET_QDID(cmd, qtype) \
- MC_CMD_OP(cmd, 0, 0, 8, enum dpni_queue_type, qtype)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_RSP_GET_QDID(cmd, qdid) \
- MC_RSP_OP(cmd, 0, 0, 16, uint16_t, qdid)
-
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_GET_STATISTICS(cmd, page) \
- MC_CMD_OP(cmd, 0, 0, 8, uint8_t, page)
-
-#define DPNI_RSP_GET_STATISTICS(cmd, stat) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 64, uint64_t, (stat)->raw.counter[0]); \
- MC_RSP_OP(cmd, 1, 0, 64, uint64_t, (stat)->raw.counter[1]); \
- MC_RSP_OP(cmd, 2, 0, 64, uint64_t, (stat)->raw.counter[2]); \
- MC_RSP_OP(cmd, 3, 0, 64, uint64_t, (stat)->raw.counter[3]); \
- MC_RSP_OP(cmd, 4, 0, 64, uint64_t, (stat)->raw.counter[4]); \
- MC_RSP_OP(cmd, 5, 0, 64, uint64_t, (stat)->raw.counter[5]); \
- MC_RSP_OP(cmd, 6, 0, 64, uint64_t, (stat)->raw.counter[6]); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_SET_LINK_CFG(cmd, cfg) \
-do { \
- MC_CMD_OP(cmd, 1, 0, 32, uint32_t, cfg->rate);\
- MC_CMD_OP(cmd, 2, 0, 64, uint64_t, cfg->options);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_RSP_GET_LINK_STATE(cmd, state) \
-do { \
- MC_RSP_OP(cmd, 0, 32, 1, int, state->up);\
- MC_RSP_OP(cmd, 1, 0, 32, uint32_t, state->rate);\
- MC_RSP_OP(cmd, 2, 0, 64, uint64_t, state->options);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_SET_MAX_FRAME_LENGTH(cmd, max_frame_length) \
- MC_CMD_OP(cmd, 0, 0, 16, uint16_t, max_frame_length)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_RSP_GET_MAX_FRAME_LENGTH(cmd, max_frame_length) \
- MC_RSP_OP(cmd, 0, 0, 16, uint16_t, max_frame_length)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_SET_MULTICAST_PROMISC(cmd, en) \
- MC_CMD_OP(cmd, 0, 0, 1, int, en)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_RSP_GET_MULTICAST_PROMISC(cmd, en) \
- MC_RSP_OP(cmd, 0, 0, 1, int, en)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_SET_UNICAST_PROMISC(cmd, en) \
- MC_CMD_OP(cmd, 0, 0, 1, int, en)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_RSP_GET_UNICAST_PROMISC(cmd, en) \
- MC_RSP_OP(cmd, 0, 0, 1, int, en)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_SET_PRIMARY_MAC_ADDR(cmd, mac_addr) \
-do { \
- MC_CMD_OP(cmd, 0, 16, 8, uint8_t, mac_addr[5]); \
- MC_CMD_OP(cmd, 0, 24, 8, uint8_t, mac_addr[4]); \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, mac_addr[3]); \
- MC_CMD_OP(cmd, 0, 40, 8, uint8_t, mac_addr[2]); \
- MC_CMD_OP(cmd, 0, 48, 8, uint8_t, mac_addr[1]); \
- MC_CMD_OP(cmd, 0, 56, 8, uint8_t, mac_addr[0]); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_RSP_GET_PRIMARY_MAC_ADDR(cmd, mac_addr) \
-do { \
- MC_RSP_OP(cmd, 0, 16, 8, uint8_t, mac_addr[5]); \
- MC_RSP_OP(cmd, 0, 24, 8, uint8_t, mac_addr[4]); \
- MC_RSP_OP(cmd, 0, 32, 8, uint8_t, mac_addr[3]); \
- MC_RSP_OP(cmd, 0, 40, 8, uint8_t, mac_addr[2]); \
- MC_RSP_OP(cmd, 0, 48, 8, uint8_t, mac_addr[1]); \
- MC_RSP_OP(cmd, 0, 56, 8, uint8_t, mac_addr[0]); \
-} while (0)
-
-#define DPNI_RSP_GET_PORT_MAC_ADDR(cmd, mac_addr) \
-do { \
- MC_RSP_OP(cmd, 0, 16, 8, uint8_t, mac_addr[5]); \
- MC_RSP_OP(cmd, 0, 24, 8, uint8_t, mac_addr[4]); \
- MC_RSP_OP(cmd, 0, 32, 8, uint8_t, mac_addr[3]); \
- MC_RSP_OP(cmd, 0, 40, 8, uint8_t, mac_addr[2]); \
- MC_RSP_OP(cmd, 0, 48, 8, uint8_t, mac_addr[1]); \
- MC_RSP_OP(cmd, 0, 56, 8, uint8_t, mac_addr[0]); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_ADD_MAC_ADDR(cmd, mac_addr) \
-do { \
- MC_CMD_OP(cmd, 0, 16, 8, uint8_t, mac_addr[5]); \
- MC_CMD_OP(cmd, 0, 24, 8, uint8_t, mac_addr[4]); \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, mac_addr[3]); \
- MC_CMD_OP(cmd, 0, 40, 8, uint8_t, mac_addr[2]); \
- MC_CMD_OP(cmd, 0, 48, 8, uint8_t, mac_addr[1]); \
- MC_CMD_OP(cmd, 0, 56, 8, uint8_t, mac_addr[0]); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_REMOVE_MAC_ADDR(cmd, mac_addr) \
-do { \
- MC_CMD_OP(cmd, 0, 16, 8, uint8_t, mac_addr[5]); \
- MC_CMD_OP(cmd, 0, 24, 8, uint8_t, mac_addr[4]); \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, mac_addr[3]); \
- MC_CMD_OP(cmd, 0, 40, 8, uint8_t, mac_addr[2]); \
- MC_CMD_OP(cmd, 0, 48, 8, uint8_t, mac_addr[1]); \
- MC_CMD_OP(cmd, 0, 56, 8, uint8_t, mac_addr[0]); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_CLEAR_MAC_FILTERS(cmd, unicast, multicast) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 1, int, unicast); \
- MC_CMD_OP(cmd, 0, 1, 1, int, multicast); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_ENABLE_VLAN_FILTER(cmd, en) \
- MC_CMD_OP(cmd, 0, 0, 1, int, en)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_ADD_VLAN_ID(cmd, vlan_id) \
- MC_CMD_OP(cmd, 0, 32, 16, uint16_t, vlan_id)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_REMOVE_VLAN_ID(cmd, vlan_id) \
- MC_CMD_OP(cmd, 0, 32, 16, uint16_t, vlan_id)
-
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_CMD_SET_RX_TC_DIST(cmd, tc_id, cfg) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 16, uint16_t, cfg->dist_size); \
- MC_CMD_OP(cmd, 0, 16, 8, uint8_t, tc_id); \
- MC_CMD_OP(cmd, 0, 24, 4, enum dpni_dist_mode, cfg->dist_mode); \
- MC_CMD_OP(cmd, 0, 28, 4, enum dpni_fs_miss_action, \
- cfg->fs_cfg.miss_action); \
- MC_CMD_OP(cmd, 0, 48, 16, uint16_t, cfg->fs_cfg.default_flow_id); \
- MC_CMD_OP(cmd, 6, 0, 64, uint64_t, cfg->key_cfg_iova); \
-} while (0)
-
-#define DPNI_CMD_GET_QUEUE(cmd, qtype, tc, index) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 8, enum dpni_queue_type, qtype); \
- MC_CMD_OP(cmd, 0, 8, 8, uint8_t, tc); \
- MC_CMD_OP(cmd, 0, 16, 8, uint8_t, index); \
-} while (0)
-
-#define DPNI_RSP_GET_QUEUE(cmd, queue, queue_id) \
-do { \
- MC_RSP_OP(cmd, 1, 0, 32, uint32_t, (queue)->destination.id); \
- MC_RSP_OP(cmd, 1, 48, 8, uint8_t, (queue)->destination.priority); \
- MC_RSP_OP(cmd, 1, 56, 4, enum dpni_dest, (queue)->destination.type); \
- MC_RSP_OP(cmd, 1, 62, 1, char, (queue)->flc.stash_control); \
- MC_RSP_OP(cmd, 1, 63, 1, char, (queue)->destination.hold_active); \
- MC_RSP_OP(cmd, 2, 0, 64, uint64_t, (queue)->flc.value); \
- MC_RSP_OP(cmd, 3, 0, 64, uint64_t, (queue)->user_context); \
- MC_RSP_OP(cmd, 4, 0, 32, uint32_t, (queue_id)->fqid); \
- MC_RSP_OP(cmd, 4, 32, 16, uint16_t, (queue_id)->qdbin); \
-} while (0)
-
-#define DPNI_CMD_SET_QUEUE(cmd, qtype, tc, index, options, queue) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 8, enum dpni_queue_type, qtype); \
- MC_CMD_OP(cmd, 0, 8, 8, uint8_t, tc); \
- MC_CMD_OP(cmd, 0, 16, 8, uint8_t, index); \
- MC_CMD_OP(cmd, 0, 24, 8, uint8_t, options); \
- MC_CMD_OP(cmd, 1, 0, 32, uint32_t, (queue)->destination.id); \
- MC_CMD_OP(cmd, 1, 48, 8, uint8_t, (queue)->destination.priority); \
- MC_CMD_OP(cmd, 1, 56, 4, enum dpni_dest, (queue)->destination.type); \
- MC_CMD_OP(cmd, 1, 62, 1, char, (queue)->flc.stash_control); \
- MC_CMD_OP(cmd, 1, 63, 1, char, (queue)->destination.hold_active); \
- MC_CMD_OP(cmd, 2, 0, 64, uint64_t, (queue)->flc.value); \
- MC_CMD_OP(cmd, 3, 0, 64, uint64_t, (queue)->user_context); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPNI_RSP_GET_API_VERSION(cmd, major, minor) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 16, uint16_t, major);\
- MC_RSP_OP(cmd, 0, 16, 16, uint16_t, minor);\
-} while (0)
-
-#define DPNI_CMD_GET_TAILDROP(cmd, cp, q_type, tc, q_index) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 8, enum dpni_congestion_point, cp); \
- MC_CMD_OP(cmd, 0, 8, 8, enum dpni_queue_type, q_type); \
- MC_CMD_OP(cmd, 0, 16, 8, uint8_t, tc); \
- MC_CMD_OP(cmd, 0, 24, 8, uint8_t, q_index); \
-} while (0)
-
-#define DPNI_RSP_GET_TAILDROP(cmd, taildrop) \
-do { \
- MC_RSP_OP(cmd, 1, 0, 1, char, (taildrop)->enable); \
- MC_RSP_OP(cmd, 1, 16, 8, enum dpni_congestion_unit, \
- (taildrop)->units); \
- MC_RSP_OP(cmd, 1, 32, 32, uint32_t, (taildrop)->threshold); \
-} while (0)
-
-#define DPNI_CMD_SET_TAILDROP(cmd, cp, q_type, tc, q_index, taildrop) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 8, enum dpni_congestion_point, cp); \
- MC_CMD_OP(cmd, 0, 8, 8, enum dpni_queue_type, q_type); \
- MC_CMD_OP(cmd, 0, 16, 8, uint8_t, tc); \
- MC_CMD_OP(cmd, 0, 24, 8, uint8_t, q_index); \
- MC_CMD_OP(cmd, 1, 0, 1, char, (taildrop)->enable); \
- MC_CMD_OP(cmd, 1, 16, 8, enum dpni_congestion_unit, \
- (taildrop)->units); \
- MC_CMD_OP(cmd, 1, 32, 32, uint32_t, (taildrop)->threshold); \
-} while (0)
-
-#define DPNI_CMD_SET_TX_CONFIRMATION_MODE(cmd, mode) \
- MC_CMD_OP(cmd, 0, 32, 8, enum dpni_confirmation_mode, mode)
-
-#define DPNI_RSP_GET_TX_CONFIRMATION_MODE(cmd, mode) \
- MC_RSP_OP(cmd, 0, 32, 8, enum dpni_confirmation_mode, mode)
-
-#define DPNI_CMD_SET_CONGESTION_NOTIFICATION(cmd, qtype, tc, cfg) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 8, enum dpni_queue_type, qtype); \
- MC_CMD_OP(cmd, 0, 8, 8, uint8_t, tc); \
- MC_CMD_OP(cmd, 1, 0, 32, uint32_t, (cfg)->dest_cfg.dest_id); \
- MC_CMD_OP(cmd, 1, 32, 16, uint16_t, (cfg)->notification_mode); \
- MC_CMD_OP(cmd, 1, 48, 8, uint8_t, (cfg)->dest_cfg.priority); \
- MC_CMD_OP(cmd, 1, 56, 4, enum dpni_dest, (cfg)->dest_cfg.dest_type); \
- MC_CMD_OP(cmd, 1, 60, 2, enum dpni_congestion_unit, (cfg)->units); \
- MC_CMD_OP(cmd, 2, 0, 64, uint64_t, (cfg)->message_iova); \
- MC_CMD_OP(cmd, 3, 0, 64, uint64_t, (cfg)->message_ctx); \
- MC_CMD_OP(cmd, 4, 0, 32, uint32_t, (cfg)->threshold_entry); \
- MC_CMD_OP(cmd, 4, 32, 32, uint32_t, (cfg)->threshold_exit); \
-} while (0)
-
-#define DPNI_CMD_GET_CONGESTION_NOTIFICATION(cmd, qtype, tc) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 8, enum dpni_queue_type, qtype); \
- MC_CMD_OP(cmd, 0, 8, 8, uint8_t, tc); \
-} while (0)
-
-#define DPNI_RSP_GET_CONGESTION_NOTIFICATION(cmd, cfg) \
-do { \
- MC_RSP_OP(cmd, 1, 0, 32, uint32_t, (cfg)->dest_cfg.dest_id); \
- MC_RSP_OP(cmd, 1, 0, 16, uint16_t, (cfg)->notification_mode); \
- MC_RSP_OP(cmd, 1, 48, 8, uint8_t, (cfg)->dest_cfg.priority); \
- MC_RSP_OP(cmd, 1, 56, 4, enum dpni_dest, (cfg)->dest_cfg.dest_type); \
- MC_RSP_OP(cmd, 1, 60, 2, enum dpni_congestion_unit, (cfg)->units); \
- MC_RSP_OP(cmd, 2, 0, 64, uint64_t, (cfg)->message_iova); \
- MC_RSP_OP(cmd, 3, 0, 64, uint64_t, (cfg)->message_ctx); \
- MC_RSP_OP(cmd, 4, 0, 32, uint32_t, (cfg)->threshold_entry); \
- MC_RSP_OP(cmd, 4, 32, 32, uint32_t, (cfg)->threshold_exit); \
-} while (0)
+#define DPNI_CMDID_OPEN DPNI_CMD(0x801)
+#define DPNI_CMDID_CLOSE DPNI_CMD(0x800)
+#define DPNI_CMDID_CREATE DPNI_CMD(0x901)
+#define DPNI_CMDID_DESTROY DPNI_CMD(0x981)
+#define DPNI_CMDID_GET_API_VERSION DPNI_CMD(0xa01)
+
+#define DPNI_CMDID_ENABLE DPNI_CMD(0x002)
+#define DPNI_CMDID_DISABLE DPNI_CMD(0x003)
+#define DPNI_CMDID_GET_ATTR DPNI_CMD_V2(0x004)
+#define DPNI_CMDID_RESET DPNI_CMD(0x005)
+#define DPNI_CMDID_IS_ENABLED DPNI_CMD(0x006)
+
+#define DPNI_CMDID_SET_POOLS DPNI_CMD_V2(0x200)
+#define DPNI_CMDID_SET_ERRORS_BEHAVIOR DPNI_CMD(0x20B)
+
+#define DPNI_CMDID_GET_QDID DPNI_CMD(0x210)
+#define DPNI_CMDID_GET_SP_INFO DPNI_CMD(0x211)
+#define DPNI_CMDID_GET_TX_DATA_OFFSET DPNI_CMD(0x212)
+#define DPNI_CMDID_GET_LINK_STATE DPNI_CMD(0x215)
+#define DPNI_CMDID_SET_MAX_FRAME_LENGTH DPNI_CMD(0x216)
+#define DPNI_CMDID_GET_MAX_FRAME_LENGTH DPNI_CMD(0x217)
+#define DPNI_CMDID_SET_LINK_CFG DPNI_CMD(0x21A)
+#define DPNI_CMDID_SET_TX_SHAPING DPNI_CMD_V2(0x21B)
+
+#define DPNI_CMDID_SET_MCAST_PROMISC DPNI_CMD(0x220)
+#define DPNI_CMDID_GET_MCAST_PROMISC DPNI_CMD(0x221)
+#define DPNI_CMDID_SET_UNICAST_PROMISC DPNI_CMD(0x222)
+#define DPNI_CMDID_GET_UNICAST_PROMISC DPNI_CMD(0x223)
+#define DPNI_CMDID_SET_PRIM_MAC DPNI_CMD(0x224)
+#define DPNI_CMDID_GET_PRIM_MAC DPNI_CMD(0x225)
+#define DPNI_CMDID_ADD_MAC_ADDR DPNI_CMD(0x226)
+#define DPNI_CMDID_REMOVE_MAC_ADDR DPNI_CMD(0x227)
+#define DPNI_CMDID_CLR_MAC_FILTERS DPNI_CMD(0x228)
+
+#define DPNI_CMDID_ENABLE_VLAN_FILTER DPNI_CMD(0x230)
+#define DPNI_CMDID_ADD_VLAN_ID DPNI_CMD(0x231)
+#define DPNI_CMDID_REMOVE_VLAN_ID DPNI_CMD(0x232)
+#define DPNI_CMDID_CLR_VLAN_FILTERS DPNI_CMD(0x233)
+
+#define DPNI_CMDID_SET_RX_TC_DIST DPNI_CMD_V2(0x235)
+
+#define DPNI_CMDID_GET_STATISTICS DPNI_CMD_V2(0x25D)
+#define DPNI_CMDID_RESET_STATISTICS DPNI_CMD(0x25E)
+#define DPNI_CMDID_GET_QUEUE DPNI_CMD(0x25F)
+#define DPNI_CMDID_SET_QUEUE DPNI_CMD(0x260)
+#define DPNI_CMDID_GET_TAILDROP DPNI_CMD_V2(0x261)
+#define DPNI_CMDID_SET_TAILDROP DPNI_CMD_V2(0x262)
+
+#define DPNI_CMDID_GET_PORT_MAC_ADDR DPNI_CMD(0x263)
+
+#define DPNI_CMDID_GET_BUFFER_LAYOUT DPNI_CMD(0x264)
+#define DPNI_CMDID_SET_BUFFER_LAYOUT DPNI_CMD(0x265)
+
+#define DPNI_CMDID_SET_CONGESTION_NOTIFICATION DPNI_CMD(0x267)
+#define DPNI_CMDID_GET_CONGESTION_NOTIFICATION DPNI_CMD(0x268)
+#define DPNI_CMDID_SET_EARLY_DROP DPNI_CMD_V2(0x269)
+#define DPNI_CMDID_GET_EARLY_DROP DPNI_CMD_V2(0x26A)
+#define DPNI_CMDID_GET_OFFLOAD DPNI_CMD(0x26B)
+#define DPNI_CMDID_SET_OFFLOAD DPNI_CMD(0x26C)
+#define DPNI_CMDID_SET_TX_CONFIRMATION_MODE DPNI_CMD(0x266)
+#define DPNI_CMDID_GET_TX_CONFIRMATION_MODE DPNI_CMD(0x26D)
+
+/* Macros for accessing command fields smaller than 1byte */
+#define DPNI_MASK(field) \
+ GENMASK(DPNI_##field##_SHIFT + DPNI_##field##_SIZE - 1, \
+ DPNI_##field##_SHIFT)
+#define dpni_set_field(var, field, val) \
+ ((var) |= (((val) << DPNI_##field##_SHIFT) & DPNI_MASK(field)))
+#define dpni_get_field(var, field) \
+ (((var) & DPNI_MASK(field)) >> DPNI_##field##_SHIFT)
+
+#pragma pack(push, 1)
+struct dpni_cmd_open {
+ uint32_t dpni_id;
+};
+
+struct dpni_cmd_create {
+ uint32_t options;
+ uint8_t num_queues;
+ uint8_t num_tcs;
+ uint8_t mac_filter_entries;
+ uint8_t pad1;
+ uint8_t vlan_filter_entries;
+ uint8_t pad2;
+ uint8_t qos_entries;
+ uint8_t pad3;
+ uint16_t fs_entries;
+};
+
+struct dpni_cmd_destroy {
+ uint32_t dpsw_id;
+};
+
+#define DPNI_BACKUP_POOL(val, order) (((val) & 0x1) << (order))
+
+struct dpni_cmd_pool {
+ uint16_t dpbp_id;
+ uint8_t priority_mask;
+ uint8_t pad;
+};
+
+struct dpni_cmd_set_pools {
+ uint8_t num_dpbp;
+ uint8_t backup_pool_mask;
+ uint16_t pad;
+ struct dpni_cmd_pool pool[8];
+ uint16_t buffer_size[8];
+};
+
+/* The enable indication is always the least significant bit */
+#define DPNI_ENABLE_SHIFT 0
+#define DPNI_ENABLE_SIZE 1
+
+struct dpni_rsp_is_enabled {
+ uint8_t enabled;
+};
+
+struct dpni_rsp_get_attr {
+ /* response word 0 */
+ uint32_t options;
+ uint8_t num_queues;
+ uint8_t num_rx_tcs;
+ uint8_t mac_filter_entries;
+ uint8_t num_tx_tcs;
+ /* response word 1 */
+ uint8_t vlan_filter_entries;
+ uint8_t pad1;
+ uint8_t qos_entries;
+ uint8_t pad2;
+ uint16_t fs_entries;
+ uint16_t pad3;
+ /* response word 2 */
+ uint8_t qos_key_size;
+ uint8_t fs_key_size;
+ uint16_t wriop_version;
+};
+
+#define DPNI_ERROR_ACTION_SHIFT 0
+#define DPNI_ERROR_ACTION_SIZE 4
+#define DPNI_FRAME_ANN_SHIFT 4
+#define DPNI_FRAME_ANN_SIZE 1
+
+struct dpni_cmd_set_errors_behavior {
+ uint32_t errors;
+ /* from least significant bit: error_action:4, set_frame_annotation:1 */
+ uint8_t flags;
+};
+
+/* There are 3 separate commands for configuring Rx, Tx and Tx confirmation
+ * buffer layouts, but they all share the same parameters.
+ * If one of the functions changes, below structure needs to be split.
+ */
+#define DPNI_PASS_TS_SHIFT 0
+#define DPNI_PASS_TS_SIZE 1
+#define DPNI_PASS_PR_SHIFT 1
+#define DPNI_PASS_PR_SIZE 1
+#define DPNI_PASS_FS_SHIFT 2
+#define DPNI_PASS_FS_SIZE 1
+
+struct dpni_cmd_get_buffer_layout {
+ uint8_t qtype;
+};
+
+struct dpni_rsp_get_buffer_layout {
+ /* response word 0 */
+ uint8_t pad0[6];
+ /* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
+ uint8_t flags;
+ uint8_t pad1;
+ /* response word 1 */
+ uint16_t private_data_size;
+ uint16_t data_align;
+ uint16_t head_room;
+ uint16_t tail_room;
+};
+
+struct dpni_cmd_set_buffer_layout {
+ /* cmd word 0 */
+ uint8_t qtype;
+ uint8_t pad0[3];
+ uint16_t options;
+ /* from LSB: pass_timestamp:1, parser_result:1, frame_status:1 */
+ uint8_t flags;
+ uint8_t pad1;
+ /* cmd word 1 */
+ uint16_t private_data_size;
+ uint16_t data_align;
+ uint16_t head_room;
+ uint16_t tail_room;
+};
+
+struct dpni_cmd_set_offload {
+ uint8_t pad[3];
+ uint8_t dpni_offload;
+ uint32_t config;
+};
+
+struct dpni_cmd_get_offload {
+ uint8_t pad[3];
+ uint8_t dpni_offload;
+};
+
+struct dpni_rsp_get_offload {
+ uint32_t pad;
+ uint32_t config;
+};
+
+struct dpni_cmd_get_qdid {
+ uint8_t qtype;
+};
+
+struct dpni_rsp_get_qdid {
+ uint16_t qdid;
+};
+
+struct dpni_rsp_get_sp_info {
+ uint16_t spids[2];
+};
+
+struct dpni_rsp_get_tx_data_offset {
+ uint16_t data_offset;
+};
+
+struct dpni_cmd_get_statistics {
+ uint8_t page_number;
+ uint8_t param;
+};
+
+struct dpni_rsp_get_statistics {
+ uint64_t counter[7];
+};
+
+struct dpni_cmd_set_link_cfg {
+ uint64_t pad0;
+ uint32_t rate;
+ uint32_t pad1;
+ uint64_t options;
+};
+
+#define DPNI_LINK_STATE_SHIFT 0
+#define DPNI_LINK_STATE_SIZE 1
+
+struct dpni_rsp_get_link_state {
+ uint32_t pad0;
+ /* from LSB: up:1 */
+ uint8_t flags;
+ uint8_t pad1[3];
+ uint32_t rate;
+ uint32_t pad2;
+ uint64_t options;
+};
+
+struct dpni_cmd_set_max_frame_length {
+ uint16_t max_frame_length;
+};
+
+struct dpni_rsp_get_max_frame_length {
+ uint16_t max_frame_length;
+};
+
+struct dpni_cmd_set_multicast_promisc {
+ uint8_t enable;
+};
+
+struct dpni_rsp_get_multicast_promisc {
+ uint8_t enabled;
+};
+
+struct dpni_cmd_set_unicast_promisc {
+ uint8_t enable;
+};
+
+struct dpni_rsp_get_unicast_promisc {
+ uint8_t enabled;
+};
+
+struct dpni_cmd_set_primary_mac_addr {
+ uint16_t pad;
+ uint8_t mac_addr[6];
+};
+
+struct dpni_rsp_get_primary_mac_addr {
+ uint16_t pad;
+ uint8_t mac_addr[6];
+};
+
+struct dpni_rsp_get_port_mac_addr {
+ uint16_t pad;
+ uint8_t mac_addr[6];
+};
+
+struct dpni_cmd_add_mac_addr {
+ uint16_t pad;
+ uint8_t mac_addr[6];
+};
+
+struct dpni_cmd_remove_mac_addr {
+ uint16_t pad;
+ uint8_t mac_addr[6];
+};
+
+#define DPNI_UNICAST_FILTERS_SHIFT 0
+#define DPNI_UNICAST_FILTERS_SIZE 1
+#define DPNI_MULTICAST_FILTERS_SHIFT 1
+#define DPNI_MULTICAST_FILTERS_SIZE 1
+
+struct dpni_cmd_clear_mac_filters {
+ /* from LSB: unicast:1, multicast:1 */
+ uint8_t flags;
+};
+
+struct dpni_cmd_enable_vlan_filter {
+ /* only the LSB */
+ uint8_t en;
+};
+
+struct dpni_cmd_vlan_id {
+ uint32_t pad;
+ uint16_t vlan_id;
+};
+
+#define DPNI_SEPARATE_GRP_SHIFT 0
+#define DPNI_SEPARATE_GRP_SIZE 1
+#define DPNI_MODE_1_SHIFT 0
+#define DPNI_MODE_1_SIZE 4
+#define DPNI_MODE_2_SHIFT 4
+#define DPNI_MODE_2_SIZE 4
+
+struct dpni_cmd_set_tx_priorities {
+ uint16_t flags;
+ uint8_t prio_group_A;
+ uint8_t prio_group_B;
+ uint32_t pad0;
+ uint8_t modes[4];
+ uint32_t pad1;
+ uint64_t pad2;
+ uint16_t delta_bandwidth[8];
+};
+
+#define DPNI_DIST_MODE_SHIFT 0
+#define DPNI_DIST_MODE_SIZE 4
+#define DPNI_MISS_ACTION_SHIFT 4
+#define DPNI_MISS_ACTION_SIZE 4
+#define DPNI_KEEP_HASH_KEY_SHIFT 7
+#define DPNI_KEEP_HASH_KEY_SIZE 1
+
+struct dpni_cmd_set_rx_tc_dist {
+ uint16_t dist_size;
+ uint8_t tc_id;
+ /* from LSB: dist_mode:4, miss_action:4 */
+ uint8_t flags;
+ uint8_t pad0;
+ /* only the LSB */
+ uint8_t keep_hash_key;
+ uint16_t default_flow_id;
+ uint64_t pad1[5];
+ uint64_t key_cfg_iova;
+};
+
+struct dpni_cmd_get_queue {
+ uint8_t qtype;
+ uint8_t tc;
+ uint8_t index;
+};
+
+#define DPNI_DEST_TYPE_SHIFT 0
+#define DPNI_DEST_TYPE_SIZE 4
+#define DPNI_STASH_CTRL_SHIFT 6
+#define DPNI_STASH_CTRL_SIZE 1
+#define DPNI_HOLD_ACTIVE_SHIFT 7
+#define DPNI_HOLD_ACTIVE_SIZE 1
+
+struct dpni_rsp_get_queue {
+ /* response word 0 */
+ uint64_t pad0;
+ /* response word 1 */
+ uint32_t dest_id;
+ uint16_t pad1;
+ uint8_t dest_prio;
+ /* From LSB: dest_type:4, pad:2, flc_stash_ctrl:1, hold_active:1 */
+ uint8_t flags;
+ /* response word 2 */
+ uint64_t flc;
+ /* response word 3 */
+ uint64_t user_context;
+ /* response word 4 */
+ uint32_t fqid;
+ uint16_t qdbin;
+};
+
+struct dpni_cmd_set_queue {
+ /* cmd word 0 */
+ uint8_t qtype;
+ uint8_t tc;
+ uint8_t index;
+ uint8_t options;
+ uint32_t pad0;
+ /* cmd word 1 */
+ uint32_t dest_id;
+ uint16_t pad1;
+ uint8_t dest_prio;
+ uint8_t flags;
+ /* cmd word 2 */
+ uint64_t flc;
+ /* cmd word 3 */
+ uint64_t user_context;
+};
+
+#define DPNI_DROP_ENABLE_SHIFT 0
+#define DPNI_DROP_ENABLE_SIZE 1
+#define DPNI_DROP_UNITS_SHIFT 2
+#define DPNI_DROP_UNITS_SIZE 2
+
+struct dpni_early_drop {
+ /* from LSB: enable:1 units:2 */
+ uint8_t flags;
+ uint8_t pad0[3];
+ uint32_t pad1;
+ uint8_t green_drop_probability;
+ uint8_t pad2[7];
+ uint64_t green_max_threshold;
+ uint64_t green_min_threshold;
+ uint64_t pad3;
+ uint8_t yellow_drop_probability;
+ uint8_t pad4[7];
+ uint64_t yellow_max_threshold;
+ uint64_t yellow_min_threshold;
+ uint64_t pad5;
+ uint8_t red_drop_probability;
+ uint8_t pad6[7];
+ uint64_t red_max_threshold;
+ uint64_t red_min_threshold;
+};
+
+struct dpni_cmd_early_drop {
+ uint8_t qtype;
+ uint8_t tc;
+ uint8_t pad[6];
+ uint64_t early_drop_iova;
+};
+
+struct dpni_rsp_get_api_version {
+ uint16_t major;
+ uint16_t minor;
+};
+
+struct dpni_cmd_get_taildrop {
+ uint8_t congestion_point;
+ uint8_t qtype;
+ uint8_t tc;
+ uint8_t index;
+};
+
+struct dpni_rsp_get_taildrop {
+ /* cmd word 0 */
+ uint64_t pad0;
+ /* cmd word 1 */
+ /* from LSB: enable:1 oal_lo:7 */
+ uint8_t enable_oal_lo;
+ /* from LSB: oal_hi:5 */
+ uint8_t oal_hi;
+ uint8_t units;
+ uint8_t pad2;
+ uint32_t threshold;
+};
+
+#define DPNI_OAL_LO_SHIFT 1
+#define DPNI_OAL_LO_SIZE 7
+#define DPNI_OAL_HI_SHIFT 0
+#define DPNI_OAL_HI_SIZE 5
+
+struct dpni_cmd_set_taildrop {
+ /* cmd word 0 */
+ uint8_t congestion_point;
+ uint8_t qtype;
+ uint8_t tc;
+ uint8_t index;
+ uint32_t pad0;
+ /* cmd word 1 */
+ /* from LSB: enable:1 oal_lo:7 */
+ uint8_t enable_oal_lo;
+ /* from LSB: oal_hi:5 */
+ uint8_t oal_hi;
+ uint8_t units;
+ uint8_t pad2;
+ uint32_t threshold;
+};
+
+struct dpni_tx_confirmation_mode {
+ uint32_t pad;
+ uint8_t confirmation_mode;
+};
+
+#define DPNI_DEST_TYPE_SHIFT 0
+#define DPNI_DEST_TYPE_SIZE 4
+#define DPNI_CONG_UNITS_SHIFT 4
+#define DPNI_CONG_UNITS_SIZE 2
+
+struct dpni_cmd_set_congestion_notification {
+ uint8_t qtype;
+ uint8_t tc;
+ uint8_t pad[6];
+ uint32_t dest_id;
+ uint16_t notification_mode;
+ uint8_t dest_priority;
+ /* from LSB: dest_type: 4 units:2 */
+ uint8_t type_units;
+ uint64_t message_iova;
+ uint64_t message_ctx;
+ uint32_t threshold_entry;
+ uint32_t threshold_exit;
+};
+
+struct dpni_cmd_get_congestion_notification {
+ uint8_t qtype;
+ uint8_t tc;
+};
+
+struct dpni_rsp_get_congestion_notification {
+ uint64_t pad;
+ uint32_t dest_id;
+ uint16_t notification_mode;
+ uint8_t dest_priority;
+ /* from LSB: dest_type: 4 units:2 */
+ uint8_t type_units;
+ uint64_t message_iova;
+ uint64_t message_ctx;
+ uint32_t threshold_entry;
+ uint32_t threshold_exit;
+};
+
+#pragma pack(pop)
#endif /* _FSL_DPNI_CMD_H */
diff --git a/drivers/net/dpaa2/mc/fsl_net.h b/drivers/net/dpaa2/mc/fsl_net.h
index ef7e4da..dbec306 100644
--- a/drivers/net/dpaa2/mc/fsl_net.h
+++ b/drivers/net/dpaa2/mc/fsl_net.h
@@ -213,7 +213,7 @@
#define NH_FLD_SCTP_CHUNK_DATA_STREAM_SQN (NH_FLD_SCTP_CHUNK_DATA_TYPE << 5)
#define NH_FLD_SCTP_CHUNK_DATA_PAYLOAD_PID (NH_FLD_SCTP_CHUNK_DATA_TYPE << 6)
#define NH_FLD_SCTP_CHUNK_DATA_UNORDERED (NH_FLD_SCTP_CHUNK_DATA_TYPE << 7)
-#define NH_FLD_SCTP_CHUNK_DATA_BEGINNING (NH_FLD_SCTP_CHUNK_DATA_TYPE << 8)
+#define NH_FLD_SCTP_CHUNK_DATA_BEGGINNING (NH_FLD_SCTP_CHUNK_DATA_TYPE << 8)
#define NH_FLD_SCTP_CHUNK_DATA_END (NH_FLD_SCTP_CHUNK_DATA_TYPE << 9)
#define NH_FLD_SCTP_CHUNK_DATA_ALL_FIELDS \
((NH_FLD_SCTP_CHUNK_DATA_TYPE << 10) - 1)
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 11/30] crypto/dpaa2_sec: update MC to 10.3.x
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (9 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 10/30] net/dpaa2: " Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-15 12:37 ` Ferruh Yigit
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 12/30] config/dpaa2: change max lores to 16 Hemant Agrawal
` (19 subsequent siblings)
30 siblings, 1 reply; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Shreyansh Jain <shreyansh.jain@nxp.com>
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
---
drivers/crypto/dpaa2_sec/mc/dpseci.c | 676 +++++++++++++----------
drivers/crypto/dpaa2_sec/mc/fsl_dpseci.h | 782 ++++++++-------------------
drivers/crypto/dpaa2_sec/mc/fsl_dpseci_cmd.h | 387 ++++++-------
3 files changed, 808 insertions(+), 1037 deletions(-)
diff --git a/drivers/crypto/dpaa2_sec/mc/dpseci.c b/drivers/crypto/dpaa2_sec/mc/dpseci.c
index 4a10962..2a216af 100644
--- a/drivers/crypto/dpaa2_sec/mc/dpseci.c
+++ b/drivers/crypto/dpaa2_sec/mc/dpseci.c
@@ -37,18 +37,34 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
-
#include <fsl_mc_sys.h>
#include <fsl_mc_cmd.h>
#include <fsl_dpseci.h>
#include <fsl_dpseci_cmd.h>
-int
-dpseci_open(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- int dpseci_id,
- uint16_t *token)
+/**
+ * dpseci_open() - Open a control session for the specified object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @dpseci_id: DPSECI unique ID
+ * @token: Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dpseci_create() function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpseci_open(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ int dpseci_id,
+ uint16_t *token)
{
+ struct dpseci_cmd_open *cmd_params;
struct mc_command cmd = { 0 };
int err;
@@ -56,23 +72,34 @@ dpseci_open(struct fsl_mc_io *mc_io,
cmd.header = mc_encode_cmd_header(DPSECI_CMDID_OPEN,
cmd_flags,
0);
- DPSECI_CMD_OPEN(cmd, dpseci_id);
+ cmd_params = (struct dpseci_cmd_open *)cmd.params;
+ cmd_params->dpseci_id = cpu_to_le32(dpseci_id);
- /* send command to mc */
+ /* send command to mc*/
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
/* retrieve response parameters */
- *token = MC_CMD_HDR_READ_TOKEN(cmd.header);
+ *token = mc_cmd_hdr_read_token(&cmd);
return 0;
}
-int
-dpseci_close(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token)
+/**
+ * dpseci_close() - Close the control session of the object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPSECI object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpseci_close(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token)
{
struct mc_command cmd = { 0 };
@@ -81,478 +108,569 @@ dpseci_close(struct fsl_mc_io *mc_io,
cmd_flags,
token);
- /* send command to mc */
+ /* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
-int
-dpseci_create(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- const struct dpseci_cfg *cfg,
- uint32_t *obj_id)
+/**
+ * dpseci_create() - Create the DPSECI object
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token: Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @cfg: Configuration structure
+ * @obj_id: Returned object id
+ *
+ * Create the DPSECI object, allocate required resources and
+ * perform required initialization.
+ *
+ * The object can be created either by declaring it in the
+ * DPL file, or by calling this function.
+ *
+ * The function accepts an authentication token of a parent
+ * container that this object should be assigned to. The token
+ * can be '0' so the object will be assigned to the default container.
+ * The newly created object can be opened with the returned
+ * object id and using the container's associated tokens and MC portals.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpseci_create(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ const struct dpseci_cfg *cfg,
+ uint32_t *obj_id)
{
+ struct dpseci_cmd_create *cmd_params;
struct mc_command cmd = { 0 };
- int err;
+ int err, i;
/* prepare command */
cmd.header = mc_encode_cmd_header(DPSECI_CMDID_CREATE,
cmd_flags,
dprc_token);
- DPSECI_CMD_CREATE(cmd, cfg);
-
- /* send command to mc */
+ cmd_params = (struct dpseci_cmd_create *)cmd.params;
+ for (i = 0; i < DPSECI_PRIO_NUM; i++)
+ cmd_params->priorities[i] = cfg->priorities[i];
+ cmd_params->num_tx_queues = cfg->num_tx_queues;
+ cmd_params->num_rx_queues = cfg->num_rx_queues;
+ cmd_params->options = cfg->options;
+
+ /* send command to mc*/
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
/* retrieve response parameters */
- CMD_CREATE_RSP_GET_OBJ_ID_PARAM0(cmd, *obj_id);
+ *obj_id = mc_cmd_read_object_id(&cmd);
return 0;
}
-int
-dpseci_destroy(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- uint32_t object_id)
+/**
+ * dpseci_destroy() - Destroy the DPSECI object and release all its resources.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @dprc_token: Parent container token; '0' for default container
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @object_id: The object id; it must be a valid id within the container that
+ * created this object;
+ *
+ * The function accepts the authentication token of the parent container that
+ * created the object (not the one that currently owns the object). The object
+ * is searched within parent using the provided 'object_id'.
+ * All tokens to the object must be closed before calling destroy.
+ *
+ * Return: '0' on Success; error code otherwise.
+ */
+int dpseci_destroy(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ uint32_t object_id)
{
+ struct dpseci_cmd_destroy *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
cmd.header = mc_encode_cmd_header(DPSECI_CMDID_DESTROY,
cmd_flags,
dprc_token);
- /* set object id to destroy */
- CMD_DESTROY_SET_OBJ_ID_PARAM0(cmd, object_id);
- /* send command to mc */
- return mc_send_command(mc_io, &cmd);
-}
-
-int
-dpseci_enable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token)
-{
- struct mc_command cmd = { 0 };
+ cmd_params = (struct dpseci_cmd_destroy *)cmd.params;
+ cmd_params->dpseci_id = cpu_to_le32(object_id);
- /* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_ENABLE,
- cmd_flags,
- token);
-
- /* send command to mc */
+ /* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
-int
-dpseci_disable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token)
-{
- struct mc_command cmd = { 0 };
-
- /* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_DISABLE,
- cmd_flags,
- token);
-
- /* send command to mc */
- return mc_send_command(mc_io, &cmd);
-}
-
-int
-dpseci_is_enabled(struct fsl_mc_io *mc_io,
+/**
+ * dpseci_enable() - Enable the DPSECI, allow sending and receiving frames.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPSECI object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpseci_enable(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
- uint16_t token,
- int *en)
-{
- struct mc_command cmd = { 0 };
- int err;
- /* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_IS_ENABLED,
- cmd_flags,
- token);
-
- /* send command to mc */
- err = mc_send_command(mc_io, &cmd);
- if (err)
- return err;
-
- /* retrieve response parameters */
- DPSECI_RSP_IS_ENABLED(cmd, *en);
-
- return 0;
-}
-
-int
-dpseci_reset(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token)
+ uint16_t token)
{
struct mc_command cmd = { 0 };
/* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_RESET,
+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_ENABLE,
cmd_flags,
token);
- /* send command to mc */
+ /* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
-int
-dpseci_get_irq(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t irq_index,
- int *type,
- struct dpseci_irq_cfg *irq_cfg)
-{
- struct mc_command cmd = { 0 };
- int err;
-
- /* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ,
- cmd_flags,
- token);
- DPSECI_CMD_GET_IRQ(cmd, irq_index);
-
- /* send command to mc */
- err = mc_send_command(mc_io, &cmd);
- if (err)
- return err;
-
- /* retrieve response parameters */
- DPSECI_RSP_GET_IRQ(cmd, *type, irq_cfg);
-
- return 0;
-}
-
-int
-dpseci_set_irq(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t irq_index,
- struct dpseci_irq_cfg *irq_cfg)
+/**
+ * dpseci_disable() - Disable the DPSECI, stop sending and receiving frames.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPSECI object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpseci_disable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token)
{
struct mc_command cmd = { 0 };
/* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_SET_IRQ,
+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_DISABLE,
cmd_flags,
token);
- DPSECI_CMD_SET_IRQ(cmd, irq_index, irq_cfg);
- /* send command to mc */
+ /* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
-int
-dpseci_get_irq_enable(struct fsl_mc_io *mc_io,
+/**
+ * dpseci_is_enabled() - Check if the DPSECI is enabled.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPSECI object
+ * @en: Returns '1' if object is enabled; '0' otherwise
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpseci_is_enabled(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
- uint8_t irq_index,
- uint8_t *en)
+ int *en)
{
+ struct dpseci_rsp_is_enabled *rsp_params;
struct mc_command cmd = { 0 };
int err;
/* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ_ENABLE,
+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_IS_ENABLED,
cmd_flags,
token);
- DPSECI_CMD_GET_IRQ_ENABLE(cmd, irq_index);
- /* send command to mc */
+ /* send command to mc*/
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
/* retrieve response parameters */
- DPSECI_RSP_GET_IRQ_ENABLE(cmd, *en);
+ rsp_params = (struct dpseci_rsp_is_enabled *)cmd.params;
+ *en = dpseci_get_field(rsp_params->en, ENABLE);
return 0;
}
-int
-dpseci_set_irq_enable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t irq_index,
- uint8_t en)
+/**
+ * dpseci_reset() - Reset the DPSECI, returns the object to initial state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPSECI object
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpseci_reset(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token)
{
struct mc_command cmd = { 0 };
/* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_SET_IRQ_ENABLE,
+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_RESET,
cmd_flags,
token);
- DPSECI_CMD_SET_IRQ_ENABLE(cmd, irq_index, en);
- /* send command to mc */
+ /* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
-int
-dpseci_get_irq_mask(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t irq_index,
- uint32_t *mask)
+/**
+ * dpseci_get_attributes() - Retrieve DPSECI attributes.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPSECI object
+ * @attr: Returned object's attributes
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpseci_get_attributes(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpseci_attr *attr)
{
+ struct dpseci_rsp_get_attr *rsp_params;
struct mc_command cmd = { 0 };
int err;
/* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ_MASK,
+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_ATTR,
cmd_flags,
token);
- DPSECI_CMD_GET_IRQ_MASK(cmd, irq_index);
- /* send command to mc */
+ /* send command to mc*/
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
/* retrieve response parameters */
- DPSECI_RSP_GET_IRQ_MASK(cmd, *mask);
+ rsp_params = (struct dpseci_rsp_get_attr *)cmd.params;
+ attr->id = le32_to_cpu(rsp_params->id);
+ attr->options = rsp_params->options;
+ attr->num_tx_queues = rsp_params->num_tx_queues;
+ attr->num_rx_queues = rsp_params->num_rx_queues;
return 0;
}
-int
-dpseci_set_irq_mask(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t irq_index,
- uint32_t mask)
+/**
+ * dpseci_set_rx_queue() - Set Rx queue configuration
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPSECI object
+ * @queue: Select the queue relative to number of
+ * priorities configured at DPSECI creation; use
+ * DPSECI_ALL_QUEUES to configure all Rx queues identically.
+ * @cfg: Rx queue configuration
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpseci_set_rx_queue(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t queue,
+ const struct dpseci_rx_queue_cfg *cfg)
{
+ struct dpseci_cmd_set_rx_queue *cmd_params;
struct mc_command cmd = { 0 };
/* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_SET_IRQ_MASK,
+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_SET_RX_QUEUE,
cmd_flags,
token);
- DPSECI_CMD_SET_IRQ_MASK(cmd, irq_index, mask);
-
- /* send command to mc */
+ cmd_params = (struct dpseci_cmd_set_rx_queue *)cmd.params;
+ cmd_params->dest_id = cpu_to_le32(cfg->dest_cfg.dest_id);
+ cmd_params->dest_priority = cfg->dest_cfg.priority;
+ cmd_params->queue = queue;
+ cmd_params->user_ctx = cpu_to_le64(cfg->user_ctx);
+ cmd_params->options = cpu_to_le32(cfg->options);
+ dpseci_set_field(cmd_params->dest_type,
+ DEST_TYPE,
+ cfg->dest_cfg.dest_type);
+ dpseci_set_field(cmd_params->order_preservation_en,
+ ORDER_PRESERVATION,
+ cfg->order_preservation_en);
+
+ /* send command to mc*/
return mc_send_command(mc_io, &cmd);
}
-int
-dpseci_get_irq_status(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t irq_index,
- uint32_t *status)
+/**
+ * dpseci_get_rx_queue() - Retrieve Rx queue attributes.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPSECI object
+ * @queue: Select the queue relative to number of
+ * priorities configured at DPSECI creation
+ * @attr: Returned Rx queue attributes
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpseci_get_rx_queue(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t queue,
+ struct dpseci_rx_queue_attr *attr)
{
+ struct dpseci_rsp_get_rx_queue *rsp_params;
+ struct dpseci_cmd_get_queue *cmd_params;
struct mc_command cmd = { 0 };
int err;
/* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_IRQ_STATUS,
+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_RX_QUEUE,
cmd_flags,
token);
- DPSECI_CMD_GET_IRQ_STATUS(cmd, irq_index, *status);
+ cmd_params = (struct dpseci_cmd_get_queue *)cmd.params;
+ cmd_params->queue = queue;
- /* send command to mc */
+ /* send command to mc*/
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
/* retrieve response parameters */
- DPSECI_RSP_GET_IRQ_STATUS(cmd, *status);
+ rsp_params = (struct dpseci_rsp_get_rx_queue *)cmd.params;
+ attr->user_ctx = le64_to_cpu(rsp_params->user_ctx);
+ attr->fqid = le32_to_cpu(rsp_params->fqid);
+ attr->dest_cfg.dest_id = le32_to_cpu(rsp_params->dest_id);
+ attr->dest_cfg.priority = rsp_params->dest_priority;
+ attr->dest_cfg.dest_type =
+ dpseci_get_field(rsp_params->dest_type,
+ DEST_TYPE);
+ attr->order_preservation_en =
+ dpseci_get_field(rsp_params->order_preservation_en,
+ ORDER_PRESERVATION);
return 0;
}
-int
-dpseci_clear_irq_status(struct fsl_mc_io *mc_io,
+/**
+ * dpseci_get_tx_queue() - Retrieve Tx queue attributes.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPSECI object
+ * @queue: Select the queue relative to number of
+ * priorities configured at DPSECI creation
+ * @attr: Returned Tx queue attributes
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpseci_get_tx_queue(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
- uint8_t irq_index,
- uint32_t status)
-{
- struct mc_command cmd = { 0 };
-
- /* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_CLEAR_IRQ_STATUS,
- cmd_flags,
- token);
- DPSECI_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status);
-
- /* send command to mc */
- return mc_send_command(mc_io, &cmd);
-}
-
-int
-dpseci_get_attributes(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- struct dpseci_attr *attr)
+ uint8_t queue,
+ struct dpseci_tx_queue_attr *attr)
{
+ struct dpseci_rsp_get_tx_queue *rsp_params;
+ struct dpseci_cmd_get_queue *cmd_params;
struct mc_command cmd = { 0 };
int err;
/* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_ATTR,
+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_TX_QUEUE,
cmd_flags,
token);
+ cmd_params = (struct dpseci_cmd_get_queue *)cmd.params;
+ cmd_params->queue = queue;
- /* send command to mc */
+ /* send command to mc*/
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
/* retrieve response parameters */
- DPSECI_RSP_GET_ATTR(cmd, attr);
+ rsp_params = (struct dpseci_rsp_get_tx_queue *)cmd.params;
+ attr->fqid = le32_to_cpu(rsp_params->fqid);
+ attr->priority = rsp_params->priority;
return 0;
}
-int
-dpseci_set_rx_queue(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t queue,
- const struct dpseci_rx_queue_cfg *cfg)
-{
- struct mc_command cmd = { 0 };
-
- /* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_SET_RX_QUEUE,
- cmd_flags,
- token);
- DPSECI_CMD_SET_RX_QUEUE(cmd, queue, cfg);
-
- /* send command to mc */
- return mc_send_command(mc_io, &cmd);
-}
-
-int
-dpseci_get_rx_queue(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t queue,
- struct dpseci_rx_queue_attr *attr)
+/**
+ * dpseci_get_sec_attr() - Retrieve SEC accelerator attributes.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPSECI object
+ * @attr: Returned SEC attributes
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpseci_get_sec_attr(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpseci_sec_attr *attr)
{
+ struct dpseci_rsp_get_sec_attr *rsp_params;
struct mc_command cmd = { 0 };
int err;
/* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_RX_QUEUE,
+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_SEC_ATTR,
cmd_flags,
token);
- DPSECI_CMD_GET_RX_QUEUE(cmd, queue);
- /* send command to mc */
+ /* send command to mc*/
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
/* retrieve response parameters */
- DPSECI_RSP_GET_RX_QUEUE(cmd, attr);
+ rsp_params = (struct dpseci_rsp_get_sec_attr *)cmd.params;
+ attr->ip_id = le16_to_cpu(rsp_params->ip_id);
+ attr->major_rev = rsp_params->major_rev;
+ attr->minor_rev = rsp_params->minor_rev;
+ attr->era = rsp_params->era;
+ attr->deco_num = rsp_params->deco_num;
+ attr->zuc_auth_acc_num = rsp_params->zuc_auth_acc_num;
+ attr->zuc_enc_acc_num = rsp_params->zuc_enc_acc_num;
+ attr->snow_f8_acc_num = rsp_params->snow_f8_acc_num;
+ attr->snow_f9_acc_num = rsp_params->snow_f9_acc_num;
+ attr->crc_acc_num = rsp_params->crc_acc_num;
+ attr->pk_acc_num = rsp_params->pk_acc_num;
+ attr->kasumi_acc_num = rsp_params->kasumi_acc_num;
+ attr->rng_acc_num = rsp_params->rng_acc_num;
+ attr->md_acc_num = rsp_params->md_acc_num;
+ attr->arc4_acc_num = rsp_params->arc4_acc_num;
+ attr->des_acc_num = rsp_params->des_acc_num;
+ attr->aes_acc_num = rsp_params->aes_acc_num;
return 0;
}
-int
-dpseci_get_tx_queue(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t queue,
- struct dpseci_tx_queue_attr *attr)
+/**
+ * dpseci_get_sec_counters() - Retrieve SEC accelerator counters.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPSECI object
+ * @counters: Returned SEC counters
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpseci_get_sec_counters(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpseci_sec_counters *counters)
{
+ struct dpseci_rsp_get_sec_counters *rsp_params;
struct mc_command cmd = { 0 };
int err;
/* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_TX_QUEUE,
+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_SEC_COUNTERS,
cmd_flags,
token);
- DPSECI_CMD_GET_TX_QUEUE(cmd, queue);
- /* send command to mc */
+ /* send command to mc*/
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
/* retrieve response parameters */
- DPSECI_RSP_GET_TX_QUEUE(cmd, attr);
+ rsp_params = (struct dpseci_rsp_get_sec_counters *)cmd.params;
+ counters->dequeued_requests =
+ le64_to_cpu(rsp_params->dequeued_requests);
+ counters->ob_enc_requests = le64_to_cpu(rsp_params->ob_enc_requests);
+ counters->ib_dec_requests = le64_to_cpu(rsp_params->ib_dec_requests);
+ counters->ob_enc_bytes = le64_to_cpu(rsp_params->ob_enc_bytes);
+ counters->ob_prot_bytes = le64_to_cpu(rsp_params->ob_prot_bytes);
+ counters->ib_dec_bytes = le64_to_cpu(rsp_params->ib_dec_bytes);
+ counters->ib_valid_bytes = le64_to_cpu(rsp_params->ib_valid_bytes);
return 0;
}
-int
-dpseci_get_sec_attr(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- struct dpseci_sec_attr *attr)
+/**
+ * dpseci_get_api_version() - Get Data Path SEC Interface API version
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @major_ver: Major version of data path sec API
+ * @minor_ver: Minor version of data path sec API
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpseci_get_api_version(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t *major_ver,
+ uint16_t *minor_ver)
{
+ struct dpseci_rsp_get_api_version *rsp_params;
struct mc_command cmd = { 0 };
int err;
- /* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_SEC_ATTR,
- cmd_flags,
- token);
+ cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_API_VERSION,
+ cmd_flags,
+ 0);
- /* send command to mc */
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
- /* retrieve response parameters */
- DPSECI_RSP_GET_SEC_ATTR(cmd, attr);
+ rsp_params = (struct dpseci_rsp_get_api_version *)cmd.params;
+ *major_ver = le16_to_cpu(rsp_params->major);
+ *minor_ver = le16_to_cpu(rsp_params->minor);
return 0;
}
-int
-dpseci_get_sec_counters(struct fsl_mc_io *mc_io,
+int dpseci_set_congestion_notification(
+ struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
- struct dpseci_sec_counters *counters)
+ const struct dpseci_congestion_notification_cfg *cfg)
{
+ struct dpseci_cmd_set_congestion_notification *cmd_params;
struct mc_command cmd = { 0 };
- int err;
/* prepare command */
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_SEC_COUNTERS,
- cmd_flags,
- token);
-
- /* send command to mc */
- err = mc_send_command(mc_io, &cmd);
- if (err)
- return err;
-
- /* retrieve response parameters */
- DPSECI_RSP_GET_SEC_COUNTERS(cmd, counters);
-
- return 0;
+ cmd.header = mc_encode_cmd_header(
+ DPSECI_CMDID_SET_CONGESTION_NOTIFICATION,
+ cmd_flags,
+ token);
+
+ cmd_params =
+ (struct dpseci_cmd_set_congestion_notification *)cmd.params;
+ cmd_params->dest_id = cfg->dest_cfg.dest_id;
+ cmd_params->dest_priority = cfg->dest_cfg.priority;
+ cmd_params->message_ctx = cfg->message_ctx;
+ cmd_params->message_iova = cfg->message_iova;
+ cmd_params->notification_mode = cfg->notification_mode;
+ cmd_params->threshold_entry = cfg->threshold_entry;
+ cmd_params->threshold_exit = cfg->threshold_exit;
+ dpseci_set_field(cmd_params->type_units,
+ DEST_TYPE,
+ cfg->dest_cfg.dest_type);
+ dpseci_set_field(cmd_params->type_units,
+ CG_UNITS,
+ cfg->units);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
}
-int
-dpseci_get_api_version(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t *major_ver,
- uint16_t *minor_ver)
+int dpseci_get_congestion_notification(
+ struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpseci_congestion_notification_cfg *cfg)
{
+ struct dpseci_cmd_set_congestion_notification *rsp_params;
struct mc_command cmd = { 0 };
int err;
- cmd.header = mc_encode_cmd_header(DPSECI_CMDID_GET_API_VERSION,
- cmd_flags,
- 0);
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(
+ DPSECI_CMDID_GET_CONGESTION_NOTIFICATION,
+ cmd_flags,
+ token);
+ /* send command to mc*/
err = mc_send_command(mc_io, &cmd);
if (err)
return err;
- DPSECI_RSP_GET_API_VERSION(cmd, *major_ver, *minor_ver);
+ rsp_params =
+ (struct dpseci_cmd_set_congestion_notification *)cmd.params;
+
+ cfg->dest_cfg.dest_id = le32_to_cpu(rsp_params->dest_id);
+ cfg->dest_cfg.priority = rsp_params->dest_priority;
+ cfg->notification_mode = le16_to_cpu(rsp_params->notification_mode);
+ cfg->message_ctx = le64_to_cpu(rsp_params->message_ctx);
+ cfg->message_iova = le64_to_cpu(rsp_params->message_iova);
+ cfg->threshold_entry = le32_to_cpu(rsp_params->threshold_entry);
+ cfg->threshold_exit = le32_to_cpu(rsp_params->threshold_exit);
+ cfg->units = dpseci_get_field(rsp_params->type_units, CG_UNITS);
+ cfg->dest_cfg.dest_type = dpseci_get_field(rsp_params->type_units,
+ DEST_TYPE);
return 0;
}
diff --git a/drivers/crypto/dpaa2_sec/mc/fsl_dpseci.h b/drivers/crypto/dpaa2_sec/mc/fsl_dpseci.h
index 6cc14a6..4acb595 100644
--- a/drivers/crypto/dpaa2_sec/mc/fsl_dpseci.h
+++ b/drivers/crypto/dpaa2_sec/mc/fsl_dpseci.h
@@ -5,7 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP.
+ * Copyright 2016-2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -37,7 +37,6 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
-
#ifndef __FSL_DPSECI_H
#define __FSL_DPSECI_H
@@ -61,394 +60,89 @@ struct fsl_mc_io;
*/
#define DPSECI_ALL_QUEUES (uint8_t)(-1)
-/**
- * dpseci_open() - Open a control session for the specified object
- * This function can be used to open a control session for an
- * already created object; an object may have been declared in
- * the DPL or by calling the dpseci_create() function.
- * This function returns a unique authentication token,
- * associated with the specific object ID and the specific MC
- * portal; this token must be used in all subsequent commands for
- * this specific object.
- *
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param dpseci_id DPSECI unique ID
- * @param token Returned token; use in subsequent API calls
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_open(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- int dpseci_id,
- uint16_t *token);
+int dpseci_open(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ int dpseci_id,
+ uint16_t *token);
+
+int dpseci_close(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
/**
- * dpseci_close() - Close the control session of the object
- * After this function is called, no further operations are
- * allowed on the object without opening a new control session.
- *
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
+ * Enable the Congestion Group support
*/
-int
-dpseci_close(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+#define DPSECI_OPT_HAS_CG 0x000020
/**
* struct dpseci_cfg - Structure representing DPSECI configuration
+ * @options: Any combination of the following options:
+ * DPSECI_OPT_HAS_CG
+ * DPSECI_OPT_HAS_OPR
+ * DPSECI_OPT_OPR_SHARED
+ * @num_tx_queues: num of queues towards the SEC
+ * @num_rx_queues: num of queues back from the SEC
+ * @priorities: Priorities for the SEC hardware processing;
+ * each place in the array is the priority of the tx queue
+ * towards the SEC,
+ * valid priorities are configured with values 1-8;
*/
struct dpseci_cfg {
- uint8_t num_tx_queues; /* num of queues towards the SEC */
- uint8_t num_rx_queues; /* num of queues back from the SEC */
+ uint32_t options;
+ uint8_t num_tx_queues;
+ uint8_t num_rx_queues;
uint8_t priorities[DPSECI_PRIO_NUM];
- /**< Priorities for the SEC hardware processing;
- * each place in the array is the priority of the tx queue
- * towards the SEC,
- * valid priorities are configured with values 1-8;
- */
};
-/**
- * dpseci_create() - Create the DPSECI object
- * Create the DPSECI object, allocate required resources and
- * perform required initialization.
- *
- * The object can be created either by declaring it in the
- * DPL file, or by calling this function.
- *
- * The function accepts an authentication token of a parent
- * container that this object should be assigned to. The token
- * can be '0' so the object will be assigned to the default container.
- * The newly created object can be opened with the returned
- * object id and using the container's associated tokens and MC portals.
- *
- * @param mc_io Pointer to MC portal's I/O object
- * @param dprc_token Parent container token; '0' for default container
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param cfg Configuration structure
- * @param obj_id returned object id
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_create(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- const struct dpseci_cfg *cfg,
- uint32_t *obj_id);
-
-/**
- * dpseci_destroy() - Destroy the DPSECI object and release all its resources.
- * The function accepts the authentication token of the parent container that
- * created the object (not the one that currently owns the object). The object
- * is searched within parent using the provided 'object_id'.
- * All tokens to the object must be closed before calling destroy.
- *
- * @param mc_io Pointer to MC portal's I/O object
- * @param dprc_token Parent container token; '0' for default container
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param object_id The object id; it must be a valid id within the
- * container that created this object;
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_destroy(struct fsl_mc_io *mc_io,
- uint16_t dprc_token,
- uint32_t cmd_flags,
- uint32_t object_id);
-
-/**
- * dpseci_enable() - Enable the DPSECI, allow sending and receiving frames.
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_enable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
-
-/**
- * dpseci_disable() - Disable the DPSECI, stop sending and receiving frames.
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_disable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
-
-/**
- * dpseci_is_enabled() - Check if the DPSECI is enabled.
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- * @param en Returns '1' if object is enabled; '0' otherwise
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_is_enabled(struct fsl_mc_io *mc_io,
+int dpseci_create(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
uint32_t cmd_flags,
- uint16_t token,
- int *en);
+ const struct dpseci_cfg *cfg,
+ uint32_t *obj_id);
-/**
- * dpseci_reset() - Reset the DPSECI, returns the object to initial state.
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_reset(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token);
+int dpseci_destroy(struct fsl_mc_io *mc_io,
+ uint16_t dprc_token,
+ uint32_t cmd_flags,
+ uint32_t object_id);
-/**
- * struct dpseci_irq_cfg - IRQ configuration
- */
-struct dpseci_irq_cfg {
- uint64_t addr;
- /* Address that must be written to signal a message-based interrupt */
- uint32_t val;
- /* Value to write into irq_addr address */
- int irq_num;
- /* A user defined number associated with this IRQ */
-};
+int dpseci_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
-/**
- * dpseci_set_irq() - Set IRQ information for the DPSECI to trigger an interrupt
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- * @param irq_index Identifies the interrupt index to configure
- * @param irq_cfg IRQ configuration
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_set_irq(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t irq_index,
- struct dpseci_irq_cfg *irq_cfg);
+int dpseci_disable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
-/**
- * dpseci_get_irq() - Get IRQ information from the DPSECI
- *
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- * @param irq_index The interrupt index to configure
- * @param type Interrupt type: 0 represents message interrupt
- * type (both irq_addr and irq_val are valid)
- * @param irq_cfg IRQ attributes
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_get_irq(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t irq_index,
- int *type,
- struct dpseci_irq_cfg *irq_cfg);
-
-/**
- * dpseci_set_irq_enable() - Set overall interrupt state.
- * Allows GPP software to control when interrupts are generated.
- * Each interrupt can have up to 32 causes. The enable/disable control's the
- * overall interrupt state. if the interrupt is disabled no causes will cause
- * an interrupt
- *
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- * @param irq_index The interrupt index to configure
- * @param en Interrupt state - enable = 1, disable = 0
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_set_irq_enable(struct fsl_mc_io *mc_io,
+int dpseci_is_enabled(struct fsl_mc_io *mc_io,
uint32_t cmd_flags,
uint16_t token,
- uint8_t irq_index,
- uint8_t en);
+ int *en);
-/**
- * dpseci_get_irq_enable() - Get overall interrupt state
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- * @param irq_index The interrupt index to configure
- * @param en Returned Interrupt state - enable = 1,
- * disable = 0
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_get_irq_enable(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t irq_index,
- uint8_t *en);
-
-/**
- * dpseci_set_irq_mask() - Set interrupt mask.
- * Every interrupt can have up to 32 causes and the interrupt model supports
- * masking/unmasking each cause independently
- *
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- * @param irq_index The interrupt index to configure
- * @param mask event mask to trigger interrupt;
- * each bit:
- * 0 = ignore event
- * 1 = consider event for asserting IRQ
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_set_irq_mask(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t irq_index,
- uint32_t mask);
-
-/**
- * dpseci_get_irq_mask() - Get interrupt mask.
- * Every interrupt can have up to 32 causes and the interrupt model supports
- * masking/unmasking each cause independently
- *
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- * @param irq_index The interrupt index to configure
- * @param mask Returned event mask to trigger interrupt
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_get_irq_mask(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t irq_index,
- uint32_t *mask);
-
-/**
- * dpseci_get_irq_status() - Get the current status of any pending interrupts
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- * @param irq_index The interrupt index to configure
- * @param status Returned interrupts status - one bit per cause:
- * 0 = no interrupt pending
- * 1 = interrupt pending
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_get_irq_status(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t irq_index,
- uint32_t *status);
-
-/**
- * dpseci_clear_irq_status() - Clear a pending interrupt's status
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- * @param irq_index The interrupt index to configure
- * @param status bits to clear (W1C) - one bit per cause:
- * 0 = don't change
- * 1 = clear status bit
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_clear_irq_status(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t irq_index,
- uint32_t status);
+int dpseci_reset(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token);
/**
* struct dpseci_attr - Structure representing DPSECI attributes
- * @param id: DPSECI object ID
- * @param num_tx_queues: number of queues towards the SEC
- * @param num_rx_queues: number of queues back from the SEC
+ * @id: DPSECI object ID
+ * @num_tx_queues: number of queues towards the SEC
+ * @num_rx_queues: number of queues back from the SEC
+ * @options: Any combination of the following options:
+ * DPSECI_OPT_HAS_CG
+ * DPSECI_OPT_HAS_OPR
+ * DPSECI_OPT_OPR_SHARED
*/
struct dpseci_attr {
- int id; /* DPSECI object ID */
- uint8_t num_tx_queues; /* number of queues towards the SEC */
- uint8_t num_rx_queues; /* number of queues back from the SEC */
+ int id;
+ uint8_t num_tx_queues;
+ uint8_t num_rx_queues;
+ uint32_t options;
};
-/**
- * dpseci_get_attributes() - Retrieve DPSECI attributes.
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- * @param attr Returned object's attributes
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_get_attributes(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- struct dpseci_attr *attr);
+int dpseci_get_attributes(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpseci_attr *attr);
/**
* enum dpseci_dest - DPSECI destination types
@@ -471,16 +165,16 @@ enum dpseci_dest {
/**
* struct dpseci_dest_cfg - Structure representing DPSECI destination parameters
+ * @dest_type: Destination type
+ * @dest_id: Either DPIO ID or DPCON ID, depending on the destination type
+ * @priority: Priority selection within the DPIO or DPCON channel; valid values
+ * are 0-1 or 0-7, depending on the number of priorities in that
+ * channel; not relevant for 'DPSECI_DEST_NONE' option
*/
struct dpseci_dest_cfg {
- enum dpseci_dest dest_type; /* Destination type */
+ enum dpseci_dest dest_type;
int dest_id;
- /* Either DPIO ID or DPCON ID, depending on the destination type */
uint8_t priority;
- /* Priority selection within the DPIO or DPCON channel; valid values
- * are 0-1 or 0-7, depending on the number of priorities in that
- * channel; not relevant for 'DPSECI_DEST_NONE' option
- */
};
/**
@@ -504,243 +198,235 @@ struct dpseci_dest_cfg {
/**
* struct dpseci_rx_queue_cfg - DPSECI RX queue configuration
+ * @options: Flags representing the suggested modifications to the queue;
+ * Use any combination of 'DPSECI_QUEUE_OPT_<X>' flags
+ * @order_preservation_en: order preservation configuration for the rx queue
+ * valid only if 'DPSECI_QUEUE_OPT_ORDER_PRESERVATION' is contained in 'options'
+ * @user_ctx: User context value provided in the frame descriptor of each
+ * dequeued frame;
+ * valid only if 'DPSECI_QUEUE_OPT_USER_CTX' is contained in 'options'
+ * @dest_cfg: Queue destination parameters;
+ * valid only if 'DPSECI_QUEUE_OPT_DEST' is contained in 'options'
*/
struct dpseci_rx_queue_cfg {
uint32_t options;
- /* Flags representing the suggested modifications to the queue;
- * Use any combination of 'DPSECI_QUEUE_OPT_<X>' flags
- */
int order_preservation_en;
- /* order preservation configuration for the rx queue
- * valid only if 'DPSECI_QUEUE_OPT_ORDER_PRESERVATION' is contained in
- * 'options'
- */
uint64_t user_ctx;
- /* User context value provided in the frame descriptor of each
- * dequeued frame;
- * valid only if 'DPSECI_QUEUE_OPT_USER_CTX' is contained in 'options'
- */
struct dpseci_dest_cfg dest_cfg;
- /* Queue destination parameters;
- * valid only if 'DPSECI_QUEUE_OPT_DEST' is contained in 'options'
- */
};
-/**
- * dpseci_set_rx_queue() - Set Rx queue configuration
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- * @param queue Select the queue relative to number of
- * priorities configured at DPSECI creation; use
- * DPSECI_ALL_QUEUES to configure all Rx queues
- * identically.
- * @param cfg Rx queue configuration
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_set_rx_queue(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t queue,
- const struct dpseci_rx_queue_cfg *cfg);
+int dpseci_set_rx_queue(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t queue,
+ const struct dpseci_rx_queue_cfg *cfg);
/**
* struct dpseci_rx_queue_attr - Structure representing attributes of Rx queues
+ * @user_ctx: User context value provided in the frame descriptor of each
+ * dequeued frame
+ * @order_preservation_en: Status of the order preservation configuration
+ * on the queue
+ * @dest_cfg: Queue destination configuration
+ * @fqid: Virtual FQID value to be used for dequeue operations
*/
struct dpseci_rx_queue_attr {
uint64_t user_ctx;
- /* User context value provided in the frame descriptor of
- * each dequeued frame
- */
int order_preservation_en;
- /* Status of the order preservation configuration on the queue */
- struct dpseci_dest_cfg dest_cfg;
- /* Queue destination configuration */
+ struct dpseci_dest_cfg dest_cfg;
uint32_t fqid;
- /* Virtual FQID value to be used for dequeue operations */
};
-/**
- * dpseci_get_rx_queue() - Retrieve Rx queue attributes.
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- * @param queue Select the queue relative to number of
- * priorities configured at DPSECI creation
- * @param attr Returned Rx queue attributes
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_get_rx_queue(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t queue,
- struct dpseci_rx_queue_attr *attr);
+int dpseci_get_rx_queue(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t queue,
+ struct dpseci_rx_queue_attr *attr);
/**
* struct dpseci_tx_queue_attr - Structure representing attributes of Tx queues
+ * @fqid: Virtual FQID to be used for sending frames to SEC hardware
+ * @priority: SEC hardware processing priority for the queue
*/
struct dpseci_tx_queue_attr {
uint32_t fqid;
- /* Virtual FQID to be used for sending frames to SEC hardware */
uint8_t priority;
- /* SEC hardware processing priority for the queue */
};
-/**
- * dpseci_get_tx_queue() - Retrieve Tx queue attributes.
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- * @param queue Select the queue relative to number of
- * priorities configured at DPSECI creation
- * @param attr Returned Tx queue attributes
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_get_tx_queue(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- uint8_t queue,
- struct dpseci_tx_queue_attr *attr);
+int dpseci_get_tx_queue(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t queue,
+ struct dpseci_tx_queue_attr *attr);
/**
* struct dpseci_sec_attr - Structure representing attributes of the SEC
- * hardware accelerator
- */
+ * hardware accelerator
+ * @ip_id: ID for SEC.
+ * @major_rev: Major revision number for SEC.
+ * @minor_rev: Minor revision number for SEC.
+ * @era: SEC Era.
+ * @deco_num: The number of copies of the DECO that are implemented
+ * in this version of SEC.
+ * @zuc_auth_acc_num: The number of copies of ZUCA that are implemented
+ * in this version of SEC.
+ * @zuc_enc_acc_num: The number of copies of ZUCE that are implemented
+ * in this version of SEC.
+ * @snow_f8_acc_num: The number of copies of the SNOW-f8 module that are
+ * implemented in this version of SEC.
+ * @snow_f9_acc_num: The number of copies of the SNOW-f9 module that are
+ * implemented in this version of SEC.
+ * @crc_acc_num: The number of copies of the CRC module that are
+ * implemented in this version of SEC.
+ * @pk_acc_num: The number of copies of the Public Key module that are
+ * implemented in this version of SEC.
+ * @kasumi_acc_num: The number of copies of the Kasumi module that are
+ * implemented in this version of SEC.
+ * @rng_acc_num: The number of copies of the Random Number Generator that
+ * are implemented in this version of SEC.
+ * @md_acc_num: The number of copies of the MDHA (Hashing module) that
+ * are implemented in this version of SEC.
+ * @arc4_acc_num: The number of copies of the ARC4 module that are
+ * implemented in this version of SEC.
+ * @des_acc_num: The number of copies of the DES module that are
+ * implemented in this version of SEC.
+ * @aes_acc_num: The number of copies of the AES module that are
+ * implemented in this version of SEC.
+ **/
struct dpseci_sec_attr {
- uint16_t ip_id; /* ID for SEC */
- uint8_t major_rev; /* Major revision number for SEC */
- uint8_t minor_rev; /* Minor revision number for SEC */
- uint8_t era; /* SEC Era */
+ uint16_t ip_id;
+ uint8_t major_rev;
+ uint8_t minor_rev;
+ uint8_t era;
uint8_t deco_num;
- /* The number of copies of the DECO that are implemented in
- * this version of SEC
- */
uint8_t zuc_auth_acc_num;
- /* The number of copies of ZUCA that are implemented in this
- * version of SEC
- */
uint8_t zuc_enc_acc_num;
- /* The number of copies of ZUCE that are implemented in this
- * version of SEC
- */
uint8_t snow_f8_acc_num;
- /* The number of copies of the SNOW-f8 module that are
- * implemented in this version of SEC
- */
uint8_t snow_f9_acc_num;
- /* The number of copies of the SNOW-f9 module that are
- * implemented in this version of SEC
- */
uint8_t crc_acc_num;
- /* The number of copies of the CRC module that are implemented
- * in this version of SEC
- */
uint8_t pk_acc_num;
- /* The number of copies of the Public Key module that are
- * implemented in this version of SEC
- */
uint8_t kasumi_acc_num;
- /* The number of copies of the Kasumi module that are
- * implemented in this version of SEC
- */
uint8_t rng_acc_num;
- /* The number of copies of the Random Number Generator that are
- * implemented in this version of SEC
- */
uint8_t md_acc_num;
- /* The number of copies of the MDHA (Hashing module) that are
- * implemented in this version of SEC
- */
uint8_t arc4_acc_num;
- /* The number of copies of the ARC4 module that are implemented
- * in this version of SEC
- */
uint8_t des_acc_num;
- /* The number of copies of the DES module that are implemented
- * in this version of SEC
- */
uint8_t aes_acc_num;
- /* The number of copies of the AES module that are implemented
- * in this version of SEC
- */
};
-/**
- * dpseci_get_sec_attr() - Retrieve SEC accelerator attributes.
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- * @param attr Returned SEC attributes
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
- */
-int
-dpseci_get_sec_attr(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- struct dpseci_sec_attr *attr);
+int dpseci_get_sec_attr(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpseci_sec_attr *attr);
/**
* struct dpseci_sec_counters - Structure representing global SEC counters and
* not per dpseci counters
+ * @dequeued_requests: Number of Requests Dequeued
+ * @ob_enc_requests: Number of Outbound Encrypt Requests
+ * @ib_dec_requests: Number of Inbound Decrypt Requests
+ * @ob_enc_bytes: Number of Outbound Bytes Encrypted
+ * @ob_prot_bytes: Number of Outbound Bytes Protected
+ * @ib_dec_bytes: Number of Inbound Bytes Decrypted
+ * @ib_valid_bytes: Number of Inbound Bytes Validated
*/
struct dpseci_sec_counters {
- uint64_t dequeued_requests; /* Number of Requests Dequeued */
- uint64_t ob_enc_requests; /* Number of Outbound Encrypt Requests */
- uint64_t ib_dec_requests; /* Number of Inbound Decrypt Requests */
- uint64_t ob_enc_bytes; /* Number of Outbound Bytes Encrypted */
- uint64_t ob_prot_bytes; /* Number of Outbound Bytes Protected */
- uint64_t ib_dec_bytes; /* Number of Inbound Bytes Decrypted */
- uint64_t ib_valid_bytes; /* Number of Inbound Bytes Validated */
+ uint64_t dequeued_requests;
+ uint64_t ob_enc_requests;
+ uint64_t ib_dec_requests;
+ uint64_t ob_enc_bytes;
+ uint64_t ob_prot_bytes;
+ uint64_t ib_dec_bytes;
+ uint64_t ib_valid_bytes;
};
+int dpseci_get_sec_counters(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpseci_sec_counters *counters);
+
+int dpseci_get_api_version(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t *major_ver,
+ uint16_t *minor_ver);
/**
- * dpseci_get_sec_counters() - Retrieve SEC accelerator counters.
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param token Token of DPSECI object
- * @param counters Returned SEC counters
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
+ * enum dpseci_congestion_unit - DPSECI congestion units
+ * @DPSECI_CONGESTION_UNIT_BYTES: bytes units
+ * @DPSECI_CONGESTION_UNIT_FRAMES: frames units
*/
-int
-dpseci_get_sec_counters(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t token,
- struct dpseci_sec_counters *counters);
+enum dpseci_congestion_unit {
+ DPSECI_CONGESTION_UNIT_BYTES = 0,
+ DPSECI_CONGESTION_UNIT_FRAMES
+};
/**
- * dpseci_get_api_version() - Get Data Path SEC Interface API version
- * @param mc_io Pointer to MC portal's I/O object
- * @param cmd_flags Command flags; one or more of 'MC_CMD_FLAG_'
- * @param major_ver Major version of data path sec API
- * @param minor_ver Minor version of data path sec API
- *
- * @return:
- * - Return '0' on Success.
- * - Return Error code otherwise.
+ * CSCN message is written to message_iova once entering a
+ * congestion state (see 'threshold_entry')
+ */
+#define DPSECI_CGN_MODE_WRITE_MEM_ON_ENTER 0x00000001
+/**
+ * CSCN message is written to message_iova once exiting a
+ * congestion state (see 'threshold_exit')
+ */
+#define DPSECI_CGN_MODE_WRITE_MEM_ON_EXIT 0x00000002
+/**
+ * CSCN write will attempt to allocate into a cache (coherent write);
+ * valid only if 'DPSECI_CGN_MODE_WRITE_MEM_<X>' is selected
*/
-int
-dpseci_get_api_version(struct fsl_mc_io *mc_io,
- uint32_t cmd_flags,
- uint16_t *major_ver,
- uint16_t *minor_ver);
+#define DPSECI_CGN_MODE_COHERENT_WRITE 0x00000004
+/**
+ * if 'dpseci_dest_cfg.dest_type != DPSECI_DEST_NONE' CSCN message is sent to
+ * DPIO/DPCON's WQ channel once entering a congestion state
+ * (see 'threshold_entry')
+ */
+#define DPSECI_CGN_MODE_NOTIFY_DEST_ON_ENTER 0x00000008
+/**
+ * if 'dpseci_dest_cfg.dest_type != DPSECI_DEST_NONE' CSCN message is sent to
+ * DPIO/DPCON's WQ channel once exiting a congestion state
+ * (see 'threshold_exit')
+ */
+#define DPSECI_CGN_MODE_NOTIFY_DEST_ON_EXIT 0x00000010
+/**
+ * if 'dpseci_dest_cfg.dest_type != DPSECI_DEST_NONE' when the CSCN is written
+ * to the sw-portal's DQRR, the DQRI interrupt is asserted immediately
+ * (if enabled)
+ */
+#define DPSECI_CGN_MODE_INTR_COALESCING_DISABLED 0x00000020
+
+/**
+ * struct dpseci_congestion_notification_cfg - congestion notification
+ * configuration
+ * @units: units type
+ * @threshold_entry: above this threshold we enter a congestion state.
+ * set it to '0' to disable it
+ * @threshold_exit: below this threshold we exit the congestion state.
+ * @message_ctx: The context that will be part of the CSCN message
+ * @message_iova: I/O virtual address (must be in DMA-able memory),
+ * must be 16B aligned;
+ * @dest_cfg: CSCN can be send to either DPIO or DPCON WQ channel
+ * @notification_mode: Mask of available options; use 'DPSECI_CGN_MODE_<X>'
+ * values
+ */
+struct dpseci_congestion_notification_cfg {
+ enum dpseci_congestion_unit units;
+ uint32_t threshold_entry;
+ uint32_t threshold_exit;
+ uint64_t message_ctx;
+ uint64_t message_iova;
+ struct dpseci_dest_cfg dest_cfg;
+ uint16_t notification_mode;
+};
+
+int dpseci_set_congestion_notification(
+ struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ const struct dpseci_congestion_notification_cfg *cfg);
+
+int dpseci_get_congestion_notification(
+ struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ struct dpseci_congestion_notification_cfg *cfg);
#endif /* __FSL_DPSECI_H */
diff --git a/drivers/crypto/dpaa2_sec/mc/fsl_dpseci_cmd.h b/drivers/crypto/dpaa2_sec/mc/fsl_dpseci_cmd.h
index 3f9f474..a100a0e 100644
--- a/drivers/crypto/dpaa2_sec/mc/fsl_dpseci_cmd.h
+++ b/drivers/crypto/dpaa2_sec/mc/fsl_dpseci_cmd.h
@@ -5,7 +5,7 @@
* BSD LICENSE
*
* Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016 NXP.
+ * Copyright 2016-2017 NXP.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -37,220 +37,187 @@
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
-
#ifndef _FSL_DPSECI_CMD_H
#define _FSL_DPSECI_CMD_H
/* DPSECI Version */
-#define DPSECI_VER_MAJOR 5
-#define DPSECI_VER_MINOR 0
-
-/* Command IDs */
-#define DPSECI_CMDID_CLOSE ((0x800 << 4) | (0x1))
-#define DPSECI_CMDID_OPEN ((0x809 << 4) | (0x1))
-#define DPSECI_CMDID_CREATE ((0x909 << 4) | (0x1))
-#define DPSECI_CMDID_DESTROY ((0x989 << 4) | (0x1))
-#define DPSECI_CMDID_GET_API_VERSION ((0xa09 << 4) | (0x1))
-
-#define DPSECI_CMDID_ENABLE ((0x002 << 4) | (0x1))
-#define DPSECI_CMDID_DISABLE ((0x003 << 4) | (0x1))
-#define DPSECI_CMDID_GET_ATTR ((0x004 << 4) | (0x1))
-#define DPSECI_CMDID_RESET ((0x005 << 4) | (0x1))
-#define DPSECI_CMDID_IS_ENABLED ((0x006 << 4) | (0x1))
-
-#define DPSECI_CMDID_SET_IRQ ((0x010 << 4) | (0x1))
-#define DPSECI_CMDID_GET_IRQ ((0x011 << 4) | (0x1))
-#define DPSECI_CMDID_SET_IRQ_ENABLE ((0x012 << 4) | (0x1))
-#define DPSECI_CMDID_GET_IRQ_ENABLE ((0x013 << 4) | (0x1))
-#define DPSECI_CMDID_SET_IRQ_MASK ((0x014 << 4) | (0x1))
-#define DPSECI_CMDID_GET_IRQ_MASK ((0x015 << 4) | (0x1))
-#define DPSECI_CMDID_GET_IRQ_STATUS ((0x016 << 4) | (0x1))
-#define DPSECI_CMDID_CLEAR_IRQ_STATUS ((0x017 << 4) | (0x1))
-
-#define DPSECI_CMDID_SET_RX_QUEUE ((0x194 << 4) | (0x1))
-#define DPSECI_CMDID_GET_RX_QUEUE ((0x196 << 4) | (0x1))
-#define DPSECI_CMDID_GET_TX_QUEUE ((0x197 << 4) | (0x1))
-#define DPSECI_CMDID_GET_SEC_ATTR ((0x198 << 4) | (0x1))
-#define DPSECI_CMDID_GET_SEC_COUNTERS ((0x199 << 4) | (0x1))
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_CMD_OPEN(cmd, dpseci_id) \
- MC_CMD_OP(cmd, 0, 0, 32, int, dpseci_id)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_CMD_CREATE(cmd, cfg) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 8, uint8_t, cfg->priorities[0]);\
- MC_CMD_OP(cmd, 0, 8, 8, uint8_t, cfg->priorities[1]);\
- MC_CMD_OP(cmd, 0, 16, 8, uint8_t, cfg->priorities[2]);\
- MC_CMD_OP(cmd, 0, 24, 8, uint8_t, cfg->priorities[3]);\
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, cfg->priorities[4]);\
- MC_CMD_OP(cmd, 0, 40, 8, uint8_t, cfg->priorities[5]);\
- MC_CMD_OP(cmd, 0, 48, 8, uint8_t, cfg->priorities[6]);\
- MC_CMD_OP(cmd, 0, 56, 8, uint8_t, cfg->priorities[7]);\
- MC_CMD_OP(cmd, 1, 0, 8, uint8_t, cfg->num_tx_queues);\
- MC_CMD_OP(cmd, 1, 8, 8, uint8_t, cfg->num_rx_queues);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_RSP_IS_ENABLED(cmd, en) \
- MC_RSP_OP(cmd, 0, 0, 1, int, en)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_CMD_SET_IRQ(cmd, irq_index, irq_cfg) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 8, uint8_t, irq_index);\
- MC_CMD_OP(cmd, 0, 32, 32, uint32_t, irq_cfg->val);\
- MC_CMD_OP(cmd, 1, 0, 64, uint64_t, irq_cfg->addr);\
- MC_CMD_OP(cmd, 2, 0, 32, int, irq_cfg->irq_num); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_CMD_GET_IRQ(cmd, irq_index) \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_RSP_GET_IRQ(cmd, type, irq_cfg) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 32, uint32_t, irq_cfg->val); \
- MC_RSP_OP(cmd, 1, 0, 64, uint64_t, irq_cfg->addr);\
- MC_RSP_OP(cmd, 2, 0, 32, int, irq_cfg->irq_num); \
- MC_RSP_OP(cmd, 2, 32, 32, int, type); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_CMD_SET_IRQ_ENABLE(cmd, irq_index, enable_state) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 8, uint8_t, enable_state); \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_CMD_GET_IRQ_ENABLE(cmd, irq_index) \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_RSP_GET_IRQ_ENABLE(cmd, enable_state) \
- MC_RSP_OP(cmd, 0, 0, 8, uint8_t, enable_state)
+#define DPSECI_VER_MAJOR 5
+#define DPSECI_VER_MINOR 1
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_CMD_SET_IRQ_MASK(cmd, irq_index, mask) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 32, uint32_t, mask); \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index); \
-} while (0)
+/* Command versioning */
+#define DPSECI_CMD_BASE_VERSION 1
+#define DPSECI_CMD_BASE_VERSION_V2 2
+#define DPSECI_CMD_ID_OFFSET 4
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_CMD_GET_IRQ_MASK(cmd, irq_index) \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_RSP_GET_IRQ_MASK(cmd, mask) \
- MC_RSP_OP(cmd, 0, 0, 32, uint32_t, mask)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_CMD_GET_IRQ_STATUS(cmd, irq_index, status) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 32, uint32_t, status);\
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_RSP_GET_IRQ_STATUS(cmd, status) \
- MC_RSP_OP(cmd, 0, 0, 32, uint32_t, status)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_CMD_CLEAR_IRQ_STATUS(cmd, irq_index, status) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 32, uint32_t, status); \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, irq_index); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_RSP_GET_ATTR(cmd, attr) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 32, int, attr->id); \
- MC_RSP_OP(cmd, 1, 0, 8, uint8_t, attr->num_tx_queues); \
- MC_RSP_OP(cmd, 1, 8, 8, uint8_t, attr->num_rx_queues); \
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_CMD_SET_RX_QUEUE(cmd, queue, cfg) \
-do { \
- MC_CMD_OP(cmd, 0, 0, 32, int, cfg->dest_cfg.dest_id); \
- MC_CMD_OP(cmd, 0, 32, 8, uint8_t, cfg->dest_cfg.priority); \
- MC_CMD_OP(cmd, 0, 40, 8, uint8_t, queue); \
- MC_CMD_OP(cmd, 0, 48, 4, enum dpseci_dest, cfg->dest_cfg.dest_type); \
- MC_CMD_OP(cmd, 1, 0, 64, uint64_t, cfg->user_ctx); \
- MC_CMD_OP(cmd, 2, 0, 32, uint32_t, cfg->options);\
- MC_CMD_OP(cmd, 2, 32, 1, int, cfg->order_preservation_en);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_CMD_GET_RX_QUEUE(cmd, queue) \
- MC_CMD_OP(cmd, 0, 40, 8, uint8_t, queue)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_RSP_GET_RX_QUEUE(cmd, attr) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 32, int, attr->dest_cfg.dest_id);\
- MC_RSP_OP(cmd, 0, 32, 8, uint8_t, attr->dest_cfg.priority);\
- MC_RSP_OP(cmd, 0, 48, 4, enum dpseci_dest, attr->dest_cfg.dest_type);\
- MC_RSP_OP(cmd, 1, 0, 8, uint64_t, attr->user_ctx);\
- MC_RSP_OP(cmd, 2, 0, 32, uint32_t, attr->fqid);\
- MC_RSP_OP(cmd, 2, 32, 1, int, attr->order_preservation_en);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_CMD_GET_TX_QUEUE(cmd, queue) \
- MC_CMD_OP(cmd, 0, 40, 8, uint8_t, queue)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_RSP_GET_TX_QUEUE(cmd, attr) \
-do { \
- MC_RSP_OP(cmd, 0, 32, 32, uint32_t, attr->fqid);\
- MC_RSP_OP(cmd, 1, 0, 8, uint8_t, attr->priority);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_RSP_GET_SEC_ATTR(cmd, attr) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 16, uint16_t, attr->ip_id);\
- MC_RSP_OP(cmd, 0, 16, 8, uint8_t, attr->major_rev);\
- MC_RSP_OP(cmd, 0, 24, 8, uint8_t, attr->minor_rev);\
- MC_RSP_OP(cmd, 0, 32, 8, uint8_t, attr->era);\
- MC_RSP_OP(cmd, 1, 0, 8, uint8_t, attr->deco_num);\
- MC_RSP_OP(cmd, 1, 8, 8, uint8_t, attr->zuc_auth_acc_num);\
- MC_RSP_OP(cmd, 1, 16, 8, uint8_t, attr->zuc_enc_acc_num);\
- MC_RSP_OP(cmd, 1, 32, 8, uint8_t, attr->snow_f8_acc_num);\
- MC_RSP_OP(cmd, 1, 40, 8, uint8_t, attr->snow_f9_acc_num);\
- MC_RSP_OP(cmd, 1, 48, 8, uint8_t, attr->crc_acc_num);\
- MC_RSP_OP(cmd, 2, 0, 8, uint8_t, attr->pk_acc_num);\
- MC_RSP_OP(cmd, 2, 8, 8, uint8_t, attr->kasumi_acc_num);\
- MC_RSP_OP(cmd, 2, 16, 8, uint8_t, attr->rng_acc_num);\
- MC_RSP_OP(cmd, 2, 32, 8, uint8_t, attr->md_acc_num);\
- MC_RSP_OP(cmd, 2, 40, 8, uint8_t, attr->arc4_acc_num);\
- MC_RSP_OP(cmd, 2, 48, 8, uint8_t, attr->des_acc_num);\
- MC_RSP_OP(cmd, 2, 56, 8, uint8_t, attr->aes_acc_num);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_RSP_GET_SEC_COUNTERS(cmd, counters) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 64, uint64_t, counters->dequeued_requests);\
- MC_RSP_OP(cmd, 1, 0, 64, uint64_t, counters->ob_enc_requests);\
- MC_RSP_OP(cmd, 2, 0, 64, uint64_t, counters->ib_dec_requests);\
- MC_RSP_OP(cmd, 3, 0, 64, uint64_t, counters->ob_enc_bytes);\
- MC_RSP_OP(cmd, 4, 0, 64, uint64_t, counters->ob_prot_bytes);\
- MC_RSP_OP(cmd, 5, 0, 64, uint64_t, counters->ib_dec_bytes);\
- MC_RSP_OP(cmd, 6, 0, 64, uint64_t, counters->ib_valid_bytes);\
-} while (0)
-
-/* cmd, param, offset, width, type, arg_name */
-#define DPSECI_RSP_GET_API_VERSION(cmd, major, minor) \
-do { \
- MC_RSP_OP(cmd, 0, 0, 16, uint16_t, major);\
- MC_RSP_OP(cmd, 0, 16, 16, uint16_t, minor);\
-} while (0)
+#define DPSECI_CMD_V1(id) \
+ ((id << DPSECI_CMD_ID_OFFSET) | DPSECI_CMD_BASE_VERSION)
+#define DPSECI_CMD_V2(id) \
+ ((id << DPSECI_CMD_ID_OFFSET) | DPSECI_CMD_BASE_VERSION_V2)
+/* Command IDs */
+#define DPSECI_CMDID_CLOSE DPSECI_CMD_V1(0x800)
+#define DPSECI_CMDID_OPEN DPSECI_CMD_V1(0x809)
+#define DPSECI_CMDID_CREATE DPSECI_CMD_V2(0x909)
+#define DPSECI_CMDID_DESTROY DPSECI_CMD_V1(0x989)
+#define DPSECI_CMDID_GET_API_VERSION DPSECI_CMD_V1(0xa09)
+
+#define DPSECI_CMDID_ENABLE DPSECI_CMD_V1(0x002)
+#define DPSECI_CMDID_DISABLE DPSECI_CMD_V1(0x003)
+#define DPSECI_CMDID_GET_ATTR DPSECI_CMD_V1(0x004)
+#define DPSECI_CMDID_RESET DPSECI_CMD_V1(0x005)
+#define DPSECI_CMDID_IS_ENABLED DPSECI_CMD_V1(0x006)
+
+#define DPSECI_CMDID_SET_RX_QUEUE DPSECI_CMD_V1(0x194)
+#define DPSECI_CMDID_GET_RX_QUEUE DPSECI_CMD_V1(0x196)
+#define DPSECI_CMDID_GET_TX_QUEUE DPSECI_CMD_V1(0x197)
+#define DPSECI_CMDID_GET_SEC_ATTR DPSECI_CMD_V1(0x198)
+#define DPSECI_CMDID_GET_SEC_COUNTERS DPSECI_CMD_V1(0x199)
+
+#define DPSECI_CMDID_SET_CONGESTION_NOTIFICATION DPSECI_CMD_V1(0x170)
+#define DPSECI_CMDID_GET_CONGESTION_NOTIFICATION DPSECI_CMD_V1(0x171)
+
+/* Macros for accessing command fields smaller than 1byte */
+#define DPSECI_MASK(field) \
+ GENMASK(DPSECI_##field##_SHIFT + DPSECI_##field##_SIZE - 1, \
+ DPSECI_##field##_SHIFT)
+#define dpseci_set_field(var, field, val) \
+ ((var) |= (((val) << DPSECI_##field##_SHIFT) & DPSECI_MASK(field)))
+#define dpseci_get_field(var, field) \
+ (((var) & DPSECI_MASK(field)) >> DPSECI_##field##_SHIFT)
+
+#pragma pack(push, 1)
+struct dpseci_cmd_open {
+ uint32_t dpseci_id;
+};
+
+struct dpseci_cmd_create {
+ uint8_t priorities[8];
+ uint8_t num_tx_queues;
+ uint8_t num_rx_queues;
+ uint8_t pad[6];
+ uint32_t options;
+};
+
+struct dpseci_cmd_destroy {
+ uint32_t dpseci_id;
+};
+
+#define DPSECI_ENABLE_SHIFT 0
+#define DPSECI_ENABLE_SIZE 1
+
+struct dpseci_rsp_is_enabled {
+ /* only the first LSB */
+ uint8_t en;
+};
+
+struct dpseci_rsp_get_attr {
+ uint32_t id;
+ uint32_t pad;
+ uint8_t num_tx_queues;
+ uint8_t num_rx_queues;
+ uint8_t pad1[6];
+ uint32_t options;
+};
+
+#define DPSECI_DEST_TYPE_SHIFT 0
+#define DPSECI_DEST_TYPE_SIZE 4
+
+#define DPSECI_ORDER_PRESERVATION_SHIFT 0
+#define DPSECI_ORDER_PRESERVATION_SIZE 1
+
+struct dpseci_cmd_set_rx_queue {
+ uint32_t dest_id;
+ uint8_t dest_priority;
+ uint8_t queue;
+ /* from LSB: dest_type:4 */
+ uint8_t dest_type;
+ uint8_t pad;
+ uint64_t user_ctx;
+ uint32_t options;
+ /* only the LSB */
+ uint8_t order_preservation_en;
+};
+
+struct dpseci_cmd_get_queue {
+ uint8_t pad[5];
+ uint8_t queue;
+};
+
+struct dpseci_rsp_get_rx_queue {
+ uint32_t dest_id;
+ uint8_t dest_priority;
+ uint8_t pad1;
+ /* from LSB: dest_type:4 */
+ uint8_t dest_type;
+ uint8_t pad2;
+ uint64_t user_ctx;
+ uint32_t fqid;
+ /* only the LSB */
+ uint8_t order_preservation_en;
+
+};
+
+struct dpseci_rsp_get_tx_queue {
+ uint32_t pad;
+ uint32_t fqid;
+ uint8_t priority;
+};
+
+struct dpseci_rsp_get_sec_attr {
+ uint16_t ip_id;
+ uint8_t major_rev;
+ uint8_t minor_rev;
+ uint8_t era;
+ uint8_t pad1[3];
+ uint8_t deco_num;
+ uint8_t zuc_auth_acc_num;
+ uint8_t zuc_enc_acc_num;
+ uint8_t pad2;
+ uint8_t snow_f8_acc_num;
+ uint8_t snow_f9_acc_num;
+ uint8_t crc_acc_num;
+ uint8_t pad3;
+ uint8_t pk_acc_num;
+ uint8_t kasumi_acc_num;
+ uint8_t rng_acc_num;
+ uint8_t pad4;
+ uint8_t md_acc_num;
+ uint8_t arc4_acc_num;
+ uint8_t des_acc_num;
+ uint8_t aes_acc_num;
+};
+
+struct dpseci_rsp_get_sec_counters {
+ uint64_t dequeued_requests;
+ uint64_t ob_enc_requests;
+ uint64_t ib_dec_requests;
+ uint64_t ob_enc_bytes;
+ uint64_t ob_prot_bytes;
+ uint64_t ib_dec_bytes;
+ uint64_t ib_valid_bytes;
+};
+
+struct dpseci_rsp_get_api_version {
+ uint16_t major;
+ uint16_t minor;
+};
+
+#define DPSECI_DEST_TYPE_SHIFT 0
+#define DPSECI_DEST_TYPE_SIZE 4
+#define DPSECI_CG_UNITS_SHIFT 4
+#define DPSECI_CG_UNITS_SIZE 2
+
+struct dpseci_cmd_set_congestion_notification {
+ uint32_t dest_id;
+ uint16_t notification_mode;
+ uint8_t dest_priority;
+ /* from LSB: dest_type: 4 units:2 */
+ uint8_t type_units;
+ uint64_t message_iova;
+ uint64_t message_ctx;
+ uint32_t threshold_entry;
+ uint32_t threshold_exit;
+};
+
+#pragma pack(pop)
#endif /* _FSL_DPSECI_CMD_H */
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [dpdk-dev] [PATCH v2 11/30] crypto/dpaa2_sec: update MC to 10.3.x
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 11/30] crypto/dpaa2_sec: " Hemant Agrawal
@ 2017-09-15 12:37 ` Ferruh Yigit
2017-09-15 12:45 ` Hemant Agrawal
0 siblings, 1 reply; 97+ messages in thread
From: Ferruh Yigit @ 2017-09-15 12:37 UTC (permalink / raw)
To: Hemant Agrawal, dev; +Cc: shreyansh.jain, Thomas Monjalon
On 9/8/2017 9:45 AM, Hemant Agrawal wrote:
> From: Shreyansh Jain <shreyansh.jain@nxp.com>
>
> Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
> ---
> drivers/crypto/dpaa2_sec/mc/dpseci.c | 676 +++++++++++++----------
> drivers/crypto/dpaa2_sec/mc/fsl_dpseci.h | 782 ++++++++-------------------
> drivers/crypto/dpaa2_sec/mc/fsl_dpseci_cmd.h | 387 ++++++-------
> 3 files changed, 808 insertions(+), 1037 deletions(-)
Having crypto patches together with network patches hard to manage with
current process, sub-trees.
Can this patch be separated from this set, if not only solution I can
think of is all set get by main tree directly, unless you have any other
solution?
Thanks,
ferruh
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [dpdk-dev] [PATCH v2 11/30] crypto/dpaa2_sec: update MC to 10.3.x
2017-09-15 12:37 ` Ferruh Yigit
@ 2017-09-15 12:45 ` Hemant Agrawal
0 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-15 12:45 UTC (permalink / raw)
To: Ferruh Yigit, dev; +Cc: shreyansh.jain, Thomas Monjalon
On 9/15/2017 6:07 PM, Ferruh Yigit wrote:
> On 9/8/2017 9:45 AM, Hemant Agrawal wrote:
>> From: Shreyansh Jain <shreyansh.jain@nxp.com>
>>
>> Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
>> ---
>> drivers/crypto/dpaa2_sec/mc/dpseci.c | 676 +++++++++++++----------
>> drivers/crypto/dpaa2_sec/mc/fsl_dpseci.h | 782 ++++++++-------------------
>> drivers/crypto/dpaa2_sec/mc/fsl_dpseci_cmd.h | 387 ++++++-------
>> 3 files changed, 808 insertions(+), 1037 deletions(-)
>
> Having crypto patches together with network patches hard to manage with
> current process, sub-trees.
>
> Can this patch be separated from this set, if not only solution I can
> think of is all set get by main tree directly, unless you have any other
> solution?
>
We can remove these 3 patches of MC upgrade from this patch series and
send it as independent patchset or add to Shreyansh other series of "NXP
DPAA2: Refactor bus scan/probe code" - which is intended for main tree.
> Thanks,
> ferruh
>
>
^ permalink raw reply [flat|nested] 97+ messages in thread
* [dpdk-dev] [PATCH v2 12/30] config/dpaa2: change max lores to 16
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (10 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 11/30] crypto/dpaa2_sec: " Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 13/30] bus/fslmc: add support for LX2160 platform Hemant Agrawal
` (18 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Ashish Jain <ashish.jain@nxp.com>
To support new LX2 series
Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
---
config/defconfig_arm64-dpaa2-linuxapp-gcc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc
index 8a42944..91f4993 100644
--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc
+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc
@@ -39,7 +39,7 @@ CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72"
#
# Compile Environment Abstraction Layer
#
-CONFIG_RTE_MAX_LCORE=8
+CONFIG_RTE_MAX_LCORE=16
CONFIG_RTE_MAX_NUMA_NODES=1
CONFIG_RTE_CACHE_LINE_SIZE=64
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 13/30] bus/fslmc: add support for LX2160 platform
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (11 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 12/30] config/dpaa2: change max lores to 16 Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 14/30] net/dpaa2: add support for congestion overhead Hemant Agrawal
` (17 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Ashish Jain <ashish.jain@nxp.com>
Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
---
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 22 ++++++++++++++--------
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 1 +
2 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index 7315555..8db1f6c 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -90,20 +90,22 @@ static int dpaa2_cluster_sz = 2;
* Cluster 1 (ID = x02) : CPU0, CPU1, CPU2, CPU3;
* Cluster 2 (ID = x03) : CPU4, CPU5, CPU6, CPU7;
*/
-
-/* Set the STASH Destination depending on Current CPU ID.
- * e.g. Valid values of SDEST are 4,5,6,7. Where,
- * CPU 0-1 will have SDEST 4
- * CPU 2-3 will have SDEST 5.....and so on.
+/* For LX2160 platform There are four clusters with following mapping:
+ * Cluster 1 (ID = x00) : CPU0, CPU1;
+ * Cluster 2 (ID = x01) : CPU2, CPU3;
+ * Cluster 3 (ID = x02) : CPU4, CPU5;
+ * Cluster 4 (ID = x03) : CPU6, CPU7;
+ * Cluster 1 (ID = x04) : CPU8, CPU9;
+ * Cluster 2 (ID = x05) : CPU10, CP11;
+ * Cluster 3 (ID = x06) : CPU12, CPU13;
+ * Cluster 4 (ID = x07) : CPU14, CPU15;
*/
+
static int
dpaa2_core_cluster_sdest(int cpu_id)
{
int x = cpu_id / dpaa2_cluster_sz;
- if (x > 3)
- x = 3;
-
return dpaa2_core_cluster_base + x;
}
@@ -278,6 +280,10 @@ dpaa2_configure_stashing(struct dpaa2_dpio_dev *dpio_dev, int cpu_id)
dpaa2_core_cluster_base = 0x02;
dpaa2_cluster_sz = 4;
PMD_INIT_LOG(DEBUG, "\tLS108x (A53) Platform Detected");
+ } else if ((mc_plat_info.svr & 0xffff0000) == SVR_LX2160A) {
+ dpaa2_core_cluster_base = 0x00;
+ dpaa2_cluster_sz = 2;
+ PMD_INIT_LOG(DEBUG, "\tLX2160 Platform Detected");
}
first_time = 1;
}
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 5d7a828..bb52a15 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -51,6 +51,7 @@
#define SVR_LS1080A 0x87030000
#define SVR_LS2080A 0x87010000
#define SVR_LS2088A 0x87090000
+#define SVR_LX2160A 0x87360000
#ifndef ETH_VLAN_HLEN
#define ETH_VLAN_HLEN 4 /** < Vlan Header Length */
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 14/30] net/dpaa2: add support for congestion overhead
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (12 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 13/30] bus/fslmc: add support for LX2160 platform Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 15/30] bus/fslmc: add support to check dpbp presence Hemant Agrawal
` (16 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 1 +
drivers/net/dpaa2/dpaa2_ethdev.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 945dcc7..d7950a5 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -419,6 +419,7 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
/*enabling per rx queue congestion control */
taildrop.threshold = CONG_THRESHOLD_RX_Q;
taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
+ taildrop.oal = CONG_RX_OAL;
PMD_INIT_LOG(DEBUG, "Enabling Early Drop on queue = %d",
rx_queue_id);
ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 07e1da6..6ee1a9f 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -61,6 +61,7 @@
* currently considering 32 KB packets
*/
#define CONG_THRESHOLD_RX_Q (64 * 1024)
+#define CONG_RX_OAL 128
/* Size of the input SMMU mapped memory required by MC */
#define DIST_PARAM_IOVA_SIZE 256
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 15/30] bus/fslmc: add support to check dpbp presence
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (13 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 14/30] net/dpaa2: add support for congestion overhead Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 16/30] bus/fslmc: cleanup the dpaa2 interrupt support Hemant Agrawal
` (15 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c | 7 +++++++
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 1 +
drivers/bus/fslmc/rte_bus_fslmc_version.map | 1 +
3 files changed, 9 insertions(+)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
index 1ddd280..7e96115 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
@@ -129,6 +129,13 @@ void dpaa2_free_dpbp_dev(struct dpaa2_dpbp_dev *dpbp)
}
}
+int dpaa2_dpbp_supported(void)
+{
+ if (TAILQ_EMPTY(&dpbp_dev_list))
+ return -1;
+ return 0;
+}
+
static struct rte_dpaa2_object rte_dpaa2_dpbp_obj = {
.dev_type = DPAA2_BPOOL,
.create = dpaa2_create_dpbp_device,
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index bb52a15..8f39cfb 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -366,6 +366,7 @@ void set_swp_active_dqs(uint16_t dpio_index, struct qbman_result *dqs)
}
struct dpaa2_dpbp_dev *dpaa2_alloc_dpbp_dev(void);
void dpaa2_free_dpbp_dev(struct dpaa2_dpbp_dev *dpbp);
+int dpaa2_dpbp_supported(void);
struct dpaa2_dpci_dev *rte_dpaa2_alloc_dpci_dev(void);
void rte_dpaa2_free_dpci_dev(struct dpaa2_dpci_dev *dpci);
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index 3cc7dad..7b25248 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -83,6 +83,7 @@ DPDK_17.08 {
DPDK_17.11 {
global:
+ dpaa2_dpbp_supported;
rte_dpaa2_dev_type;
} DPDK_17.08;
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 16/30] bus/fslmc: cleanup the dpaa2 interrupt support
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (14 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 15/30] bus/fslmc: add support to check dpbp presence Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 17/30] net/dpaa2: add support for link status event Hemant Agrawal
` (14 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/Makefile | 1 +
drivers/bus/fslmc/fslmc_vfio.c | 108 +++++++++++++++++++++++-----
drivers/bus/fslmc/fslmc_vfio.h | 8 ++-
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 18 +++--
drivers/bus/fslmc/rte_bus_fslmc_version.map | 2 +
5 files changed, 110 insertions(+), 27 deletions(-)
diff --git a/drivers/bus/fslmc/Makefile b/drivers/bus/fslmc/Makefile
index d1b790b..37da1b0 100644
--- a/drivers/bus/fslmc/Makefile
+++ b/drivers/bus/fslmc/Makefile
@@ -51,6 +51,7 @@ CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc
CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc/mc
CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc/qbman/include
CFLAGS += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal
+CFLAGS += -I$(RTE_SDK)/lib/librte_eal/common
# versioning export map
EXPORT_MAP := rte_bus_fslmc_version.map
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index cdc982b..ab1df36 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -46,6 +46,7 @@
#include <dirent.h>
#include <sys/eventfd.h>
+#include <eal_filesystem.h>
#include <rte_mbuf.h>
#include <rte_ethdev.h>
#include <rte_malloc.h>
@@ -335,36 +336,107 @@ static int64_t vfio_map_mcp_obj(struct fslmc_vfio_group *group, char *mcp_obj)
#define IRQ_SET_BUF_LEN (sizeof(struct vfio_irq_set) + sizeof(int))
-int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle,
- uint32_t index)
+int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle, int index)
{
- struct vfio_irq_set *irq_set;
+ int len, ret;
char irq_set_buf[IRQ_SET_BUF_LEN];
- int *fd_ptr, fd, ret;
+ struct vfio_irq_set *irq_set;
+ int *fd_ptr;
+
+ len = sizeof(irq_set_buf);
- /* Prepare vfio_irq_set structure and SET the IRQ in VFIO */
- /* Give the eventfd to VFIO */
- fd = eventfd(0, 0);
irq_set = (struct vfio_irq_set *)irq_set_buf;
- irq_set->argsz = sizeof(irq_set_buf);
+ irq_set->argsz = len;
irq_set->count = 1;
- irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
- VFIO_IRQ_SET_ACTION_TRIGGER;
+ irq_set->flags =
+ VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
irq_set->index = index;
irq_set->start = 0;
fd_ptr = (int *)&irq_set->data;
- *fd_ptr = fd;
+ *fd_ptr = intr_handle->fd;
ret = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
- if (ret < 0) {
- FSLMC_VFIO_LOG(ERR, "Unable to set IRQ in VFIO, ret: %d\n",
- ret);
- return -1;
+ if (ret) {
+ RTE_LOG(ERR, EAL, "Error:dpaa2 SET IRQs fd=%d, err = %d(%s)\n",
+ intr_handle->fd, errno, strerror(errno));
+ return ret;
}
- /* Set the FD and update the flags */
- intr_handle->fd = fd;
- return 0;
+ return ret;
+}
+
+int rte_dpaa2_intr_disable(struct rte_intr_handle *intr_handle, int index)
+{
+ struct vfio_irq_set *irq_set;
+ char irq_set_buf[IRQ_SET_BUF_LEN];
+ int len, ret;
+
+ len = sizeof(struct vfio_irq_set);
+
+ irq_set = (struct vfio_irq_set *)irq_set_buf;
+ irq_set->argsz = len;
+ irq_set->flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_TRIGGER;
+ irq_set->index = index;
+ irq_set->start = 0;
+ irq_set->count = 0;
+
+ ret = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
+ if (ret)
+ RTE_LOG(ERR, EAL,
+ "Error disabling dpaa2 interrupts for fd %d\n",
+ intr_handle->fd);
+
+ return ret;
+}
+
+/* set up interrupt support (but not enable interrupts) */
+int
+rte_dpaa2_vfio_setup_intr(struct rte_intr_handle *intr_handle,
+ int vfio_dev_fd,
+ int num_irqs)
+{
+ int i, ret;
+
+ /* start from MSI-X interrupt type */
+ for (i = 0; i < num_irqs; i++) {
+ struct vfio_irq_info irq_info = { .argsz = sizeof(irq_info) };
+ int fd = -1;
+
+ irq_info.index = i;
+
+ ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq_info);
+ if (ret < 0) {
+ FSLMC_VFIO_LOG(ERR,
+ "cannot get IRQ(%d) info, error %i (%s)",
+ i, errno, strerror(errno));
+ return -1;
+ }
+
+ /* if this vector cannot be used with eventfd,
+ * fail if we explicitly
+ * specified interrupt type, otherwise continue
+ */
+ if ((irq_info.flags & VFIO_IRQ_INFO_EVENTFD) == 0)
+ continue;
+
+ /* set up an eventfd for interrupts */
+ fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
+ if (fd < 0) {
+ FSLMC_VFIO_LOG(ERR,
+ "cannot set up eventfd, error %i (%s)\n",
+ errno, strerror(errno));
+ return -1;
+ }
+
+ intr_handle->fd = fd;
+ intr_handle->type = RTE_INTR_HANDLE_VFIO_MSI;
+ intr_handle->vfio_dev_fd = vfio_dev_fd;
+
+ return 0;
+ }
+
+ /* if we're here, we haven't found a suitable interrupt vector */
+ return -1;
}
/*
diff --git a/drivers/bus/fslmc/fslmc_vfio.h b/drivers/bus/fslmc/fslmc_vfio.h
index edb86d0..5470a41 100644
--- a/drivers/bus/fslmc/fslmc_vfio.h
+++ b/drivers/bus/fslmc/fslmc_vfio.h
@@ -64,8 +64,12 @@ typedef struct fslmc_vfio_container {
struct fslmc_vfio_group *group;
} fslmc_vfio_container;
-int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle,
- uint32_t index);
+int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle, int index);
+int rte_dpaa2_intr_disable(struct rte_intr_handle *intr_handle, int index);
+
+int rte_dpaa2_vfio_setup_intr(struct rte_intr_handle *intr_handle,
+ int vfio_dev_fd,
+ int num_irqs);
int fslmc_vfio_setup_group(void);
int fslmc_vfio_process_group(void);
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index 8db1f6c..ff41ce4 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -440,7 +440,6 @@ dpaa2_create_dpio_device(int vdev_fd,
{
struct dpaa2_dpio_dev *dpio_dev;
struct vfio_region_info reg_info = { .argsz = sizeof(reg_info)};
- int vfio_dev_fd;
if (obj_info->num_regions < NUM_DPIO_REGIONS) {
PMD_INIT_LOG(ERR, "ERROR, Not sufficient number "
@@ -457,14 +456,12 @@ dpaa2_create_dpio_device(int vdev_fd,
dpio_dev->dpio = NULL;
dpio_dev->hw_id = object_id;
- dpio_dev->intr_handle.vfio_dev_fd = vdev_fd;
rte_atomic16_init(&dpio_dev->ref_count);
/* Using single portal for all devices */
dpio_dev->mc_portal = rte_mcp_ptr_list[MC_PORTAL_INDEX];
reg_info.index = 0;
- vfio_dev_fd = dpio_dev->intr_handle.vfio_dev_fd;
- if (ioctl(vfio_dev_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {
+ if (ioctl(vdev_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {
PMD_INIT_LOG(ERR, "vfio: error getting region info\n");
rte_free(dpio_dev);
return -1;
@@ -473,10 +470,10 @@ dpaa2_create_dpio_device(int vdev_fd,
dpio_dev->ce_size = reg_info.size;
dpio_dev->qbman_portal_ce_paddr = (uint64_t)mmap(NULL, reg_info.size,
PROT_WRITE | PROT_READ, MAP_SHARED,
- vfio_dev_fd, reg_info.offset);
+ vdev_fd, reg_info.offset);
reg_info.index = 1;
- if (ioctl(vfio_dev_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {
+ if (ioctl(vdev_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {
PMD_INIT_LOG(ERR, "vfio: error getting region info\n");
rte_free(dpio_dev);
return -1;
@@ -485,7 +482,7 @@ dpaa2_create_dpio_device(int vdev_fd,
dpio_dev->ci_size = reg_info.size;
dpio_dev->qbman_portal_ci_paddr = (uint64_t)mmap(NULL, reg_info.size,
PROT_WRITE | PROT_READ, MAP_SHARED,
- vfio_dev_fd, reg_info.offset);
+ vdev_fd, reg_info.offset);
if (configure_dpio_qbman_swp(dpio_dev)) {
PMD_INIT_LOG(ERR,
@@ -497,6 +494,13 @@ dpaa2_create_dpio_device(int vdev_fd,
io_space_count++;
dpio_dev->index = io_space_count;
+
+ if (rte_dpaa2_vfio_setup_intr(&dpio_dev->intr_handle, vdev_fd, 1)) {
+ PMD_INIT_LOG(ERR, "Fail to setup interrupt for %d\n",
+ dpio_dev->hw_id);
+ rte_free(dpio_dev);
+ }
+
TAILQ_INSERT_TAIL(&dpio_dev_list, dpio_dev, next);
PMD_INIT_LOG(DEBUG, "DPAA2: Added [dpio.%d]", object_id);
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index 7b25248..51a2ac6 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -85,5 +85,7 @@ DPDK_17.11 {
dpaa2_dpbp_supported;
rte_dpaa2_dev_type;
+ rte_dpaa2_intr_disable;
+ rte_dpaa2_intr_enable;
} DPDK_17.08;
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 17/30] net/dpaa2: add support for link status event
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (15 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 16/30] bus/fslmc: cleanup the dpaa2 interrupt support Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 18/30] bus/fslmc: enable link status interrupt Hemant Agrawal
` (13 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
doc/guides/nics/features/dpaa2.ini | 1 +
drivers/net/dpaa2/dpaa2_ethdev.c | 123 +++++++++++++++++++
drivers/net/dpaa2/mc/dpni.c | 233 ++++++++++++++++++++++++++++++++++++
drivers/net/dpaa2/mc/fsl_dpni.h | 49 ++++++++
drivers/net/dpaa2/mc/fsl_dpni_cmd.h | 50 ++++++++
5 files changed, 456 insertions(+)
diff --git a/doc/guides/nics/features/dpaa2.ini b/doc/guides/nics/features/dpaa2.ini
index 146e087..ba4321c 100644
--- a/doc/guides/nics/features/dpaa2.ini
+++ b/doc/guides/nics/features/dpaa2.ini
@@ -6,6 +6,7 @@
[Features]
Speed capabilities = P
Link status = Y
+Link status event = Y
Queue start/stop = Y
Jumbo frame = Y
MTU update = Y
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index d7950a5..49dc42b 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -54,6 +54,8 @@
static struct rte_dpaa2_driver rte_dpaa2_pmd;
static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
+static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
+ int wait_to_complete);
static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
@@ -344,6 +346,10 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
return ret;
}
}
+
+ /* update the current status */
+ dpaa2_dev_link_update(dev, 0);
+
return 0;
}
@@ -556,9 +562,87 @@ dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
return NULL;
}
+/**
+ * Dpaa2 link Interrupt handler
+ *
+ * @param param
+ * The address of parameter (struct rte_eth_dev *) regsitered before.
+ *
+ * @return
+ * void
+ */
+static void
+dpaa2_interrupt_handler(void *param)
+{
+ struct rte_eth_dev *dev = param;
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ int ret;
+ int irq_index = DPNI_IRQ_INDEX;
+ unsigned int status, clear = 0;
+
+ PMD_INIT_FUNC_TRACE();
+
+ if (dpni == NULL) {
+ RTE_LOG(ERR, PMD, "dpni is NULL");
+ return;
+ }
+
+ ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
+ irq_index, &status);
+ if (unlikely(ret)) {
+ RTE_LOG(ERR, PMD, "Can't get irq status (err %d)", ret);
+ clear = 0xffffffff;
+ goto out;
+ }
+
+ if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
+ clear = DPNI_IRQ_EVENT_LINK_CHANGED;
+ dpaa2_dev_link_update(dev, 0);
+ /* calling all the apps registered for link status event */
+ _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
+ NULL, NULL);
+ }
+out:
+ ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
+ irq_index, clear);
+ if (unlikely(ret))
+ RTE_LOG(ERR, PMD, "Can't clear irq status (err %d)", ret);
+}
+
+static int
+dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
+{
+ int err = 0;
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ int irq_index = DPNI_IRQ_INDEX;
+ unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
+
+ PMD_INIT_FUNC_TRACE();
+
+ err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
+ irq_index, mask);
+ if (err < 0) {
+ PMD_INIT_LOG(ERR, "Error: dpni_set_irq_mask():%d (%s)", err,
+ strerror(-err));
+ return err;
+ }
+
+ err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
+ irq_index, enable);
+ if (err < 0)
+ PMD_INIT_LOG(ERR, "Error: dpni_set_irq_enable():%d (%s)", err,
+ strerror(-err));
+
+ return err;
+}
+
static int
dpaa2_dev_start(struct rte_eth_dev *dev)
{
+ struct rte_device *rdev = dev->device;
+ struct rte_dpaa2_device *dpaa2_dev;
struct rte_eth_dev_data *data = dev->data;
struct dpaa2_dev_priv *priv = data->dev_private;
struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
@@ -568,6 +652,10 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
struct dpni_queue_id qid;
struct dpaa2_queue *dpaa2_q;
int ret, i;
+ struct rte_intr_handle *intr_handle;
+
+ dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
+ intr_handle = &dpaa2_dev->intr_handle;
PMD_INIT_FUNC_TRACE();
@@ -647,6 +735,24 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
if (priv->max_vlan_filters)
dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
+ /* if the interrupts were configured on this devices*/
+ if (intr_handle && (intr_handle->fd) &&
+ (dev->data->dev_conf.intr_conf.lsc != 0)) {
+ /* Registering LSC interrupt handler */
+ rte_intr_callback_register(intr_handle,
+ dpaa2_interrupt_handler,
+ (void *)dev);
+
+ /* enable vfio intr/eventfd mapping
+ * Interrupt index 0 is required, so we can not use
+ * rte_intr_enable.
+ */
+ rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
+
+ /* enable dpni_irqs */
+ dpaa2_eth_setup_irqs(dev, 1);
+ }
+
return 0;
}
@@ -661,9 +767,25 @@ dpaa2_dev_stop(struct rte_eth_dev *dev)
struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
int ret;
struct rte_eth_link link;
+ struct rte_intr_handle *intr_handle = dev->intr_handle;
PMD_INIT_FUNC_TRACE();
+ /* reset interrupt callback */
+ if (intr_handle && (intr_handle->fd) &&
+ (dev->data->dev_conf.intr_conf.lsc != 0)) {
+ /*disable dpni irqs */
+ dpaa2_eth_setup_irqs(dev, 0);
+
+ /* disable vfio intr before callback unregister */
+ rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
+
+ /* Unregistering LSC interrupt handler */
+ rte_intr_callback_unregister(intr_handle,
+ dpaa2_interrupt_handler,
+ (void *)dev);
+ }
+
dpaa2_dev_set_link_down(dev);
ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
@@ -1458,6 +1580,7 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
}
eth_dev->dev_ops = &dpaa2_ethdev_ops;
+ eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
eth_dev->tx_pkt_burst = dpaa2_dev_tx;
diff --git a/drivers/net/dpaa2/mc/dpni.c b/drivers/net/dpaa2/mc/dpni.c
index f95e669..6f671fe 100644
--- a/drivers/net/dpaa2/mc/dpni.c
+++ b/drivers/net/dpaa2/mc/dpni.c
@@ -351,6 +351,239 @@ int dpni_reset(struct fsl_mc_io *mc_io,
}
/**
+ * dpni_set_irq_enable() - Set overall interrupt state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @irq_index: The interrupt index to configure
+ * @en: Interrupt state: - enable = 1, disable = 0
+ *
+ * Allows GPP software to control when interrupts are generated.
+ * Each interrupt can have up to 32 causes. The enable/disable control's the
+ * overall interrupt state. if the interrupt is disabled no causes will cause
+ * an interrupt.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en)
+{
+ struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_irq_enable *cmd_params;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_IRQ_ENABLE,
+ cmd_flags,
+ token);
+ cmd_params = (struct dpni_cmd_set_irq_enable *)cmd.params;
+ dpni_set_field(cmd_params->enable, ENABLE, en);
+ cmd_params->irq_index = irq_index;
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpni_get_irq_enable() - Get overall interrupt state
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @irq_index: The interrupt index to configure
+ * @en: Returned interrupt state - enable = 1, disable = 0
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en)
+{
+ struct mc_command cmd = { 0 };
+ struct dpni_cmd_get_irq_enable *cmd_params;
+ struct dpni_rsp_get_irq_enable *rsp_params;
+
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_IRQ_ENABLE,
+ cmd_flags,
+ token);
+ cmd_params = (struct dpni_cmd_get_irq_enable *)cmd.params;
+ cmd_params->irq_index = irq_index;
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ rsp_params = (struct dpni_rsp_get_irq_enable *)cmd.params;
+ *en = dpni_get_field(rsp_params->enabled, ENABLE);
+
+ return 0;
+}
+
+/**
+ * dpni_set_irq_mask() - Set interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @irq_index: The interrupt index to configure
+ * @mask: Event mask to trigger interrupt;
+ * each bit:
+ * 0 = ignore event
+ * 1 = consider event for asserting IRQ
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask)
+{
+ struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_irq_mask *cmd_params;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_IRQ_MASK,
+ cmd_flags,
+ token);
+ cmd_params = (struct dpni_cmd_set_irq_mask *)cmd.params;
+ cmd_params->mask = cpu_to_le32(mask);
+ cmd_params->irq_index = irq_index;
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpni_get_irq_mask() - Get interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @irq_index: The interrupt index to configure
+ * @mask: Returned event mask to trigger interrupt
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask)
+{
+ struct mc_command cmd = { 0 };
+ struct dpni_cmd_get_irq_mask *cmd_params;
+ struct dpni_rsp_get_irq_mask *rsp_params;
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_IRQ_MASK,
+ cmd_flags,
+ token);
+ cmd_params = (struct dpni_cmd_get_irq_mask *)cmd.params;
+ cmd_params->irq_index = irq_index;
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ rsp_params = (struct dpni_rsp_get_irq_mask *)cmd.params;
+ *mask = le32_to_cpu(rsp_params->mask);
+
+ return 0;
+}
+
+/**
+ * dpni_get_irq_status() - Get the current status of any pending interrupts.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @irq_index: The interrupt index to configure
+ * @status: Returned interrupts status - one bit per cause:
+ * 0 = no interrupt pending
+ * 1 = interrupt pending
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_get_irq_status(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status)
+{
+ struct mc_command cmd = { 0 };
+ struct dpni_cmd_get_irq_status *cmd_params;
+ struct dpni_rsp_get_irq_status *rsp_params;
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_IRQ_STATUS,
+ cmd_flags,
+ token);
+ cmd_params = (struct dpni_cmd_get_irq_status *)cmd.params;
+ cmd_params->status = cpu_to_le32(*status);
+ cmd_params->irq_index = irq_index;
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ rsp_params = (struct dpni_rsp_get_irq_status *)cmd.params;
+ *status = le32_to_cpu(rsp_params->status);
+
+ return 0;
+}
+
+/**
+ * dpni_clear_irq_status() - Clear a pending interrupt's status
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @irq_index: The interrupt index to configure
+ * @status: bits to clear (W1C) - one bit per cause:
+ * 0 = don't change
+ * 1 = clear status bit
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status)
+{
+ struct mc_command cmd = { 0 };
+ struct dpni_cmd_clear_irq_status *cmd_params;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_CLEAR_IRQ_STATUS,
+ cmd_flags,
+ token);
+ cmd_params = (struct dpni_cmd_clear_irq_status *)cmd.params;
+ cmd_params->irq_index = irq_index;
+ cmd_params->status = cpu_to_le32(status);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+/**
* dpni_get_attributes() - Retrieve DPNI attributes.
* @mc_io: Pointer to MC portal's I/O object
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
diff --git a/drivers/net/dpaa2/mc/fsl_dpni.h b/drivers/net/dpaa2/mc/fsl_dpni.h
index 092d3b3..5227ea1 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni.h
@@ -247,6 +247,55 @@ int dpni_reset(struct fsl_mc_io *mc_io,
uint16_t token);
/**
+ * DPNI IRQ Index and Events
+ */
+
+/**
+ * IRQ index
+ */
+#define DPNI_IRQ_INDEX 0
+/**
+ * IRQ event - indicates a change in link state
+ */
+#define DPNI_IRQ_EVENT_LINK_CHANGED 0x00000001
+
+int dpni_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en);
+
+int dpni_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en);
+
+int dpni_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask);
+
+int dpni_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask);
+
+int dpni_get_irq_status(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status);
+
+int dpni_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status);
+
+/**
* struct dpni_attr - Structure representing DPNI attributes
* @options: Any combination of the following options:
* DPNI_OPT_TX_FRM_RELEASE
diff --git a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
index 81226aa..1a48332 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
@@ -64,6 +64,13 @@
#define DPNI_CMDID_RESET DPNI_CMD(0x005)
#define DPNI_CMDID_IS_ENABLED DPNI_CMD(0x006)
+#define DPNI_CMDID_SET_IRQ_ENABLE DPNI_CMD(0x012)
+#define DPNI_CMDID_GET_IRQ_ENABLE DPNI_CMD(0x013)
+#define DPNI_CMDID_SET_IRQ_MASK DPNI_CMD(0x014)
+#define DPNI_CMDID_GET_IRQ_MASK DPNI_CMD(0x015)
+#define DPNI_CMDID_GET_IRQ_STATUS DPNI_CMD(0x016)
+#define DPNI_CMDID_CLEAR_IRQ_STATUS DPNI_CMD(0x017)
+
#define DPNI_CMDID_SET_POOLS DPNI_CMD_V2(0x200)
#define DPNI_CMDID_SET_ERRORS_BEHAVIOR DPNI_CMD(0x20B)
@@ -169,6 +176,49 @@ struct dpni_rsp_is_enabled {
uint8_t enabled;
};
+struct dpni_cmd_set_irq_enable {
+ uint8_t enable;
+ uint8_t pad[3];
+ uint8_t irq_index;
+};
+
+struct dpni_cmd_get_irq_enable {
+ uint32_t pad;
+ uint8_t irq_index;
+};
+
+struct dpni_rsp_get_irq_enable {
+ uint8_t enabled;
+};
+
+struct dpni_cmd_set_irq_mask {
+ uint32_t mask;
+ uint8_t irq_index;
+};
+
+struct dpni_cmd_get_irq_mask {
+ uint32_t pad;
+ uint8_t irq_index;
+};
+
+struct dpni_rsp_get_irq_mask {
+ uint32_t mask;
+};
+
+struct dpni_cmd_get_irq_status {
+ uint32_t status;
+ uint8_t irq_index;
+};
+
+struct dpni_rsp_get_irq_status {
+ uint32_t status;
+};
+
+struct dpni_cmd_clear_irq_status {
+ uint32_t status;
+ uint8_t irq_index;
+};
+
struct dpni_rsp_get_attr {
/* response word 0 */
uint32_t options;
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 18/30] bus/fslmc: enable link status interrupt
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (16 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 17/30] net/dpaa2: add support for link status event Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 19/30] net/dpaa2: check physical link state on up cmd Hemant Agrawal
` (12 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/fslmc_vfio.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index ab1df36..81f0779 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -464,6 +464,10 @@ fslmc_process_iodevices(struct rte_dpaa2_device *dev)
}
switch (dev->dev_type) {
+ case DPAA2_ETH:
+ rte_dpaa2_vfio_setup_intr(&dev->intr_handle, dev_fd,
+ device_info.num_irqs);
+ break;
case DPAA2_CON:
case DPAA2_IO:
case DPAA2_CI:
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 19/30] net/dpaa2: check physical link state on up cmd
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (17 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 18/30] bus/fslmc: enable link status interrupt Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 20/30] net/dpaa2: improve error and logs for flow distribution Hemant Agrawal
` (11 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 23 +++++++++++++++--------
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 49dc42b..74a61b5 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -666,7 +666,7 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
return ret;
}
- /* Power up the phy. Needed to make the link go Up */
+ /* Power up the phy. Needed to make the link go UP */
dpaa2_dev_set_link_up(dev);
ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
@@ -1137,8 +1137,6 @@ dpaa2_dev_link_update(struct rte_eth_dev *dev,
struct rte_eth_link link, old;
struct dpni_link_state state = {0};
- PMD_INIT_FUNC_TRACE();
-
if (dpni == NULL) {
RTE_LOG(ERR, PMD, "dpni is NULL\n");
return 0;
@@ -1171,7 +1169,7 @@ dpaa2_dev_link_update(struct rte_eth_dev *dev,
if (link.link_status)
PMD_DRV_LOG(INFO, "Port %d Link is Up\n", dev->data->port_id);
else
- PMD_DRV_LOG(INFO, "Port %d Link is Down\n", dev->data->port_id);
+ PMD_DRV_LOG(INFO, "Port %d Link is Down", dev->data->port_id);
return 0;
}
@@ -1186,8 +1184,7 @@ dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
struct dpaa2_dev_priv *priv;
struct fsl_mc_io *dpni;
int en = 0;
-
- PMD_INIT_FUNC_TRACE();
+ struct dpni_link_state state = {0};
priv = dev->data->dev_private;
dpni = (struct fsl_mc_io *)priv->hw;
@@ -1213,11 +1210,21 @@ dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
return -EINVAL;
}
}
+ ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
+ if (ret < 0) {
+ RTE_LOG(ERR, PMD, "error: dpni_get_link_state %d\n", ret);
+ return -1;
+ }
+
/* changing tx burst function to start enqueues */
dev->tx_pkt_burst = dpaa2_dev_tx;
- dev->data->dev_link.link_status = 1;
+ dev->data->dev_link.link_status = state.up;
- PMD_DRV_LOG(INFO, "Port %d Link UP successful", dev->data->port_id);
+ if (state.up)
+ PMD_DRV_LOG(INFO, "Port %d Link is set as UP",
+ dev->data->port_id);
+ else
+ PMD_DRV_LOG(INFO, "Port %d Link is DOWN", dev->data->port_id);
return ret;
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 20/30] net/dpaa2: improve error and logs for flow distribution
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (18 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 19/30] net/dpaa2: check physical link state on up cmd Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 21/30] net/dpaa2: increase the dist param to 64 bit Hemant Agrawal
` (10 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/base/dpaa2_hw_dpni.c | 39 +++++++++++++++++++++-------------
1 file changed, 24 insertions(+), 15 deletions(-)
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
index 1269dd2..7e5ce64 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
@@ -49,7 +49,7 @@
#include "../dpaa2_ethdev.h"
-static void
+static int
dpaa2_distset_to_dpkg_profile_cfg(
uint32_t req_dist_set,
struct dpkg_profile_cfg *kg_cfg);
@@ -68,20 +68,26 @@ dpaa2_setup_flow_dist(struct rte_eth_dev *eth_dev,
p_params = rte_malloc(
NULL, DIST_PARAM_IOVA_SIZE, RTE_CACHE_LINE_SIZE);
if (!p_params) {
- RTE_LOG(ERR, PMD, "Memory unavaialble\n");
+ PMD_INIT_LOG(ERR, "Memory unavailable");
return -ENOMEM;
}
memset(p_params, 0, DIST_PARAM_IOVA_SIZE);
memset(&tc_cfg, 0, sizeof(struct dpni_rx_tc_dist_cfg));
- dpaa2_distset_to_dpkg_profile_cfg(req_dist_set, &kg_cfg);
+ ret = dpaa2_distset_to_dpkg_profile_cfg(req_dist_set, &kg_cfg);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "given rss_hf (%lx) not supported",
+ req_dist_set);
+ rte_free(p_params);
+ return ret;
+ }
tc_cfg.key_cfg_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(p_params));
tc_cfg.dist_size = eth_dev->data->nb_rx_queues;
tc_cfg.dist_mode = DPNI_DIST_MODE_HASH;
ret = dpkg_prepare_key_cfg(&kg_cfg, p_params);
if (ret) {
- RTE_LOG(ERR, PMD, "Unable to prepare extract parameters\n");
+ PMD_INIT_LOG(ERR, "Unable to prepare extract parameters");
rte_free(p_params);
return ret;
}
@@ -90,9 +96,9 @@ dpaa2_setup_flow_dist(struct rte_eth_dev *eth_dev,
&tc_cfg);
rte_free(p_params);
if (ret) {
- RTE_LOG(ERR, PMD,
- "Setting distribution for Rx failed with err: %d\n",
- ret);
+ PMD_INIT_LOG(ERR,
+ "Setting distribution for Rx failed with err: %d",
+ ret);
return ret;
}
@@ -113,7 +119,7 @@ int dpaa2_remove_flow_dist(
p_params = rte_malloc(
NULL, DIST_PARAM_IOVA_SIZE, RTE_CACHE_LINE_SIZE);
if (!p_params) {
- RTE_LOG(ERR, PMD, "Memory unavaialble\n");
+ PMD_INIT_LOG(ERR, "Memory unavailable");
return -ENOMEM;
}
memset(p_params, 0, DIST_PARAM_IOVA_SIZE);
@@ -125,7 +131,7 @@ int dpaa2_remove_flow_dist(
ret = dpkg_prepare_key_cfg(&kg_cfg, p_params);
if (ret) {
- RTE_LOG(ERR, PMD, "Unable to prepare extract parameters\n");
+ PMD_INIT_LOG(ERR, "Unable to prepare extract parameters");
rte_free(p_params);
return ret;
}
@@ -134,13 +140,13 @@ int dpaa2_remove_flow_dist(
&tc_cfg);
rte_free(p_params);
if (ret)
- RTE_LOG(ERR, PMD,
- "Setting distribution for Rx failed with err: %d\n",
- ret);
+ PMD_INIT_LOG(ERR,
+ "Setting distribution for Rx failed with err:%d",
+ ret);
return ret;
}
-static void
+static int
dpaa2_distset_to_dpkg_profile_cfg(
uint32_t req_dist_set,
struct dpkg_profile_cfg *kg_cfg)
@@ -276,14 +282,17 @@ dpaa2_distset_to_dpkg_profile_cfg(
break;
default:
- PMD_DRV_LOG(WARNING, "Bad flow distribution"
- " option %x\n", dist_field);
+ PMD_INIT_LOG(WARNING,
+ "Unsupported flow dist option %x",
+ dist_field);
+ return -EINVAL;
}
}
req_dist_set = req_dist_set >> 1;
loop++;
}
kg_cfg->num_extracts = i;
+ return 0;
}
int
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 21/30] net/dpaa2: increase the dist param to 64 bit
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (19 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 20/30] net/dpaa2: improve error and logs for flow distribution Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 22/30] net/dpaa2: remove RSS restriction with num of queues Hemant Agrawal
` (9 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/base/dpaa2_hw_dpni.c | 6 +++---
drivers/net/dpaa2/dpaa2_ethdev.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
index 7e5ce64..e3ab90a 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
@@ -51,12 +51,12 @@
static int
dpaa2_distset_to_dpkg_profile_cfg(
- uint32_t req_dist_set,
+ uint64_t req_dist_set,
struct dpkg_profile_cfg *kg_cfg);
int
dpaa2_setup_flow_dist(struct rte_eth_dev *eth_dev,
- uint32_t req_dist_set)
+ uint64_t req_dist_set)
{
struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
struct fsl_mc_io *dpni = priv->hw;
@@ -148,7 +148,7 @@ int dpaa2_remove_flow_dist(
static int
dpaa2_distset_to_dpkg_profile_cfg(
- uint32_t req_dist_set,
+ uint64_t req_dist_set,
struct dpkg_profile_cfg *kg_cfg)
{
uint32_t loop = 0, i = 0, dist_field = 0;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 6ee1a9f..7b14ae0 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -93,7 +93,7 @@ struct dpaa2_dev_priv {
};
int dpaa2_setup_flow_dist(struct rte_eth_dev *eth_dev,
- uint32_t req_dist_set);
+ uint64_t req_dist_set);
int dpaa2_remove_flow_dist(struct rte_eth_dev *eth_dev,
uint8_t tc_index);
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 22/30] net/dpaa2: remove RSS restriction with num of queues
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (20 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 21/30] net/dpaa2: increase the dist param to 64 bit Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 23/30] net/dpaa2: add support for RSS hash update and get Hemant Agrawal
` (8 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
DPAA2 HW does not have such restrictions.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 11 -----------
1 file changed, 11 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 74a61b5..0fe7a13 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -326,18 +326,7 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
}
}
- /* Check for correct configuration */
- if (eth_conf->rxmode.mq_mode != ETH_MQ_RX_RSS &&
- data->nb_rx_queues > 1) {
- PMD_INIT_LOG(ERR, "Distribution is not enabled, "
- "but Rx queues more than 1\n");
- return -1;
- }
-
if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
- /* Return in case number of Rx queues is 1 */
- if (data->nb_rx_queues == 1)
- return 0;
ret = dpaa2_setup_flow_dist(dev,
eth_conf->rx_adv_conf.rss_conf.rss_hf);
if (ret) {
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 23/30] net/dpaa2: add support for RSS hash update and get
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (21 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 22/30] net/dpaa2: remove RSS restriction with num of queues Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 24/30] bus/dpaa2: add support for hw extra stats API Hemant Agrawal
` (7 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 42 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 0fe7a13..aebcc71 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -1418,6 +1418,46 @@ dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
return ret;
}
+static int
+dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
+ struct rte_eth_rss_conf *rss_conf)
+{
+ struct rte_eth_dev_data *data = dev->data;
+ struct rte_eth_conf *eth_conf = &data->dev_conf;
+ int ret;
+
+ PMD_INIT_FUNC_TRACE();
+
+ if (rss_conf->rss_hf) {
+ ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "unable to set flow dist");
+ return ret;
+ }
+ } else {
+ ret = dpaa2_remove_flow_dist(dev, 0);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "unable to remove flow dist");
+ return ret;
+ }
+ }
+ eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
+ return 0;
+}
+
+static int
+dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
+ struct rte_eth_rss_conf *rss_conf)
+{
+ struct rte_eth_dev_data *data = dev->data;
+ struct rte_eth_conf *eth_conf = &data->dev_conf;
+
+ /* dpaa2 does not support rss_key, so length should be 0*/
+ rss_conf->rss_key_len = 0;
+ rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
+ return 0;
+}
+
static struct eth_dev_ops dpaa2_ethdev_ops = {
.dev_configure = dpaa2_eth_dev_configure,
.dev_start = dpaa2_dev_start,
@@ -1447,6 +1487,8 @@ static struct eth_dev_ops dpaa2_ethdev_ops = {
.mac_addr_add = dpaa2_dev_add_mac_addr,
.mac_addr_remove = dpaa2_dev_remove_mac_addr,
.mac_addr_set = dpaa2_dev_set_mac_addr,
+ .rss_hash_update = dpaa2_dev_rss_hash_update,
+ .rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get,
};
static int
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 24/30] bus/dpaa2: add support for hw extra stats API
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (22 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 23/30] net/dpaa2: add support for RSS hash update and get Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-15 11:38 ` Ferruh Yigit
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 25/30] net/dpaa2: add support for extra stats Hemant Agrawal
` (6 subsequent siblings)
30 siblings, 1 reply; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/dpaa/base/fman/fman_hw.c | 30 ++++++++++++++++++++++++++++++
drivers/bus/dpaa/include/fsl_fman.h | 3 +++
drivers/bus/dpaa/rte_bus_dpaa_version.map | 1 +
3 files changed, 34 insertions(+)
diff --git a/drivers/bus/dpaa/base/fman/fman_hw.c b/drivers/bus/dpaa/base/fman/fman_hw.c
index be59858..90ded59 100644
--- a/drivers/bus/dpaa/base/fman/fman_hw.c
+++ b/drivers/bus/dpaa/base/fman/fman_hw.c
@@ -234,6 +234,36 @@ fman_if_stats_get(struct fman_if *p, struct rte_eth_stats *stats)
}
void
+fman_if_stats_get_all(struct fman_if *p, uint64_t *value, int n)
+{
+ struct __fman_if *m = container_of(p, struct __fman_if, __if);
+ struct memac_regs *regs = m->ccsr_map;
+ int i;
+ uint64_t base_offset = offsetof(struct memac_regs, reoct_l);
+
+ for (i = 0; i < n; i++)
+ value[i] = ((u64)in_be32((char *)regs
+ + base_offset + 8 * i + 4)) << 32 |
+ ((u64)in_be32((char *)regs
+ + base_offset + 8 * i));
+}
+
+void
+fman_if_stats_get_all(struct fman_if *p, uint64_t *value, int n)
+{
+ struct __fman_if *m = container_of(p, struct __fman_if, __if);
+ struct memac_regs *regs = m->ccsr_map;
+ int i;
+ uint64_t base_offset = offsetof(struct memac_regs, reoct_l);
+
+ for (i = 0; i < n; i++)
+ value[i] = ((u64)in_be32((char *)regs
+ + base_offset + 8 * i + 4)) << 32 |
+ ((u64)in_be32((char *)regs
+ + base_offset + 8 * i));
+}
+
+void
fman_if_stats_reset(struct fman_if *p)
{
struct __fman_if *m = container_of(p, struct __fman_if, __if);
diff --git a/drivers/bus/dpaa/include/fsl_fman.h b/drivers/bus/dpaa/include/fsl_fman.h
index 421a581..9eeb3cd 100644
--- a/drivers/bus/dpaa/include/fsl_fman.h
+++ b/drivers/bus/dpaa/include/fsl_fman.h
@@ -87,6 +87,9 @@ void fman_if_stats_get(struct fman_if *p, struct rte_eth_stats *stats);
/* Reset the FMAN statistics */
void fman_if_stats_reset(struct fman_if *p);
+/* Get all of the FMAN statistics */
+void fman_if_stats_get_all(struct fman_if *p, uint64_t *value, int n);
+
/* Set ignore pause option for a specific interface */
void fman_if_set_rx_ignore_pause_frames(struct fman_if *p, bool enable);
diff --git a/drivers/bus/dpaa/rte_bus_dpaa_version.map b/drivers/bus/dpaa/rte_bus_dpaa_version.map
index f231231..a8ac56d 100644
--- a/drivers/bus/dpaa/rte_bus_dpaa_version.map
+++ b/drivers/bus/dpaa/rte_bus_dpaa_version.map
@@ -30,6 +30,7 @@ DPDK_17.11 {
fman_if_set_maxfrm;
fman_if_set_mcast_filter_table;
fman_if_stats_get;
+ fman_if_stats_get_all;
fman_if_stats_reset;
netcfg_acquire;
netcfg_release;
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [dpdk-dev] [PATCH v2 24/30] bus/dpaa2: add support for hw extra stats API
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 24/30] bus/dpaa2: add support for hw extra stats API Hemant Agrawal
@ 2017-09-15 11:38 ` Ferruh Yigit
2017-09-15 11:45 ` Hemant Agrawal
0 siblings, 1 reply; 97+ messages in thread
From: Ferruh Yigit @ 2017-09-15 11:38 UTC (permalink / raw)
To: Hemant Agrawal, dev; +Cc: shreyansh.jain
On 9/8/2017 9:45 AM, Hemant Agrawal wrote:
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> ---
> drivers/bus/dpaa/base/fman/fman_hw.c | 30 ++++++++++++++++++++++++++++++
> drivers/bus/dpaa/include/fsl_fman.h | 3 +++
> drivers/bus/dpaa/rte_bus_dpaa_version.map | 1 +
This patch, also next one, updates "dpaa" bus, is this by mistake?
"dpaa" not merged yet, and this patchset should be for "dpaa2".
<...>
^ permalink raw reply [flat|nested] 97+ messages in thread
* Re: [dpdk-dev] [PATCH v2 24/30] bus/dpaa2: add support for hw extra stats API
2017-09-15 11:38 ` Ferruh Yigit
@ 2017-09-15 11:45 ` Hemant Agrawal
0 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-15 11:45 UTC (permalink / raw)
To: Ferruh Yigit, dev; +Cc: shreyansh.jain
On 9/15/2017 5:08 PM, Ferruh Yigit wrote:
> On 9/8/2017 9:45 AM, Hemant Agrawal wrote:
>> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
>> ---
>> drivers/bus/dpaa/base/fman/fman_hw.c | 30 ++++++++++++++++++++++++++++++
>> drivers/bus/dpaa/include/fsl_fman.h | 3 +++
>> drivers/bus/dpaa/rte_bus_dpaa_version.map | 1 +
>
> This patch, also next one, updates "dpaa" bus, is this by mistake?
> "dpaa" not merged yet, and this patchset should be for "dpaa2".
>
> <...>
>
It was a mistake. I will remove it in next version.
^ permalink raw reply [flat|nested] 97+ messages in thread
* [dpdk-dev] [PATCH v2 25/30] net/dpaa2: add support for extra stats
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (23 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 24/30] bus/dpaa2: add support for hw extra stats API Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 26/30] net/dpaa2: fix the Tx handling of non HW pool bufs Hemant Agrawal
` (5 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
doc/guides/nics/features/dpaa2.ini | 1 +
drivers/net/dpaa/dpaa_ethdev.c | 143 ++++++++++++++++++++++++++++++
drivers/net/dpaa/dpaa_ethdev.h | 40 +++++++++
drivers/net/dpaa2/dpaa2_ethdev.c | 174 ++++++++++++++++++++++++++++++++++++-
4 files changed, 356 insertions(+), 2 deletions(-)
diff --git a/doc/guides/nics/features/dpaa2.ini b/doc/guides/nics/features/dpaa2.ini
index ba4321c..6ebbab4 100644
--- a/doc/guides/nics/features/dpaa2.ini
+++ b/doc/guides/nics/features/dpaa2.ini
@@ -21,6 +21,7 @@ L3 checksum offload = Y
L4 checksum offload = Y
Packet type parsing = Y
Basic stats = Y
+Extended stats = Y
FW version = Y
Linux VFIO = Y
ARMv8 = Y
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index e94cf7c..82a87f6 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -78,6 +78,40 @@ static int is_global_init;
static struct rte_dpaa_driver rte_dpaa_pmd;
+struct rte_dpaa_xstats_name_off {
+ char name[RTE_ETH_XSTATS_NAME_SIZE];
+ uint32_t offset;
+};
+
+static const struct rte_dpaa_xstats_name_off dpaa_xstats_strings[] = {
+ {"rx_align_err",
+ offsetof(struct dpaa_if_stats, raln)},
+ {"rx_valid_pause",
+ offsetof(struct dpaa_if_stats, rxpf)},
+ {"rx_fcs_err",
+ offsetof(struct dpaa_if_stats, rfcs)},
+ {"rx_vlan_frame",
+ offsetof(struct dpaa_if_stats, rvlan)},
+ {"rx_frame_err",
+ offsetof(struct dpaa_if_stats, rerr)},
+ {"rx_drop_err",
+ offsetof(struct dpaa_if_stats, rdrp)},
+ {"rx_undersized",
+ offsetof(struct dpaa_if_stats, rund)},
+ {"rx_oversize_err",
+ offsetof(struct dpaa_if_stats, rovr)},
+ {"rx_fragment_pkt",
+ offsetof(struct dpaa_if_stats, rfrg)},
+ {"tx_valid_pause",
+ offsetof(struct dpaa_if_stats, txpf)},
+ {"tx_fcs_err",
+ offsetof(struct dpaa_if_stats, terr)},
+ {"tx_vlan_frame",
+ offsetof(struct dpaa_if_stats, tvlan)},
+ {"rx_undersized",
+ offsetof(struct dpaa_if_stats, tund)},
+};
+
static int
dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
{
@@ -271,6 +305,110 @@ static void dpaa_eth_stats_reset(struct rte_eth_dev *dev)
fman_if_stats_reset(dpaa_intf->fif);
}
+static int
+dpaa_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
+ unsigned int n)
+{
+ struct dpaa_if *dpaa_intf = dev->data->dev_private;
+ unsigned int i = 0, num = RTE_DIM(dpaa_xstats_strings);
+ uint64_t values[sizeof(struct dpaa_if_stats) / 8];
+
+ if (xstats == NULL)
+ return 0;
+
+ if (n < num)
+ return num;
+
+ fman_if_stats_get_all(dpaa_intf->fif, values,
+ sizeof(struct dpaa_if_stats) / 8);
+
+ for (i = 0; i < num; i++) {
+ xstats[i].id = i;
+ xstats[i].value = values[dpaa_xstats_strings[i].offset / 8];
+ }
+ return i;
+}
+
+static int
+dpaa_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
+ struct rte_eth_xstat_name *xstats_names,
+ __rte_unused unsigned int limit)
+{
+ unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
+
+ if (xstats_names != NULL)
+ for (i = 0; i < stat_cnt; i++)
+ snprintf(xstats_names[i].name,
+ sizeof(xstats_names[i].name),
+ "%s",
+ dpaa_xstats_strings[i].name);
+
+ return stat_cnt;
+}
+
+static int
+dpaa_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
+ uint64_t *values, unsigned int n)
+{
+ unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
+ uint64_t values_copy[sizeof(struct dpaa_if_stats) / 8];
+
+ if (!ids) {
+ struct dpaa_if *dpaa_intf = dev->data->dev_private;
+
+ if (n < stat_cnt)
+ return stat_cnt;
+
+ if (!values)
+ return 0;
+
+ fman_if_stats_get_all(dpaa_intf->fif, values_copy,
+ sizeof(struct dpaa_if_stats));
+
+ for (i = 0; i < stat_cnt; i++)
+ values[i] =
+ values_copy[dpaa_xstats_strings[i].offset / 8];
+
+ return stat_cnt;
+ }
+
+ dpaa_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
+
+ for (i = 0; i < n; i++) {
+ if (ids[i] >= stat_cnt) {
+ DPAA_PMD_ERR("id value isn't valid");
+ return -1;
+ }
+ values[i] = values_copy[ids[i]];
+ }
+ return n;
+}
+
+static int
+dpaa_xstats_get_names_by_id(
+ struct rte_eth_dev *dev,
+ struct rte_eth_xstat_name *xstats_names,
+ const uint64_t *ids,
+ unsigned int limit)
+{
+ unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
+ struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
+
+ if (!ids)
+ return dpaa_xstats_get_names(dev, xstats_names, limit);
+
+ dpaa_xstats_get_names(dev, xstats_names_copy, limit);
+
+ for (i = 0; i < limit; i++) {
+ if (ids[i] >= stat_cnt) {
+ DPAA_PMD_ERR("id value isn't valid");
+ return -1;
+ }
+ strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
+ }
+ return limit;
+}
+
static void dpaa_eth_promiscuous_enable(struct rte_eth_dev *dev)
{
struct dpaa_if *dpaa_intf = dev->data->dev_private;
@@ -538,6 +676,11 @@ static struct eth_dev_ops dpaa_devops = {
.link_update = dpaa_eth_link_update,
.stats_get = dpaa_eth_stats_get,
+ .xstats_get = dpaa_dev_xstats_get,
+ .xstats_get_by_id = dpaa_xstats_get_by_id,
+ .xstats_get_names_by_id = dpaa_xstats_get_names_by_id,
+ .xstats_get_names = dpaa_xstats_get_names,
+ .xstats_reset = dpaa_eth_stats_reset,
.stats_reset = dpaa_eth_stats_reset,
.promiscuous_enable = dpaa_eth_promiscuous_enable,
.promiscuous_disable = dpaa_eth_promiscuous_disable,
diff --git a/drivers/net/dpaa/dpaa_ethdev.h b/drivers/net/dpaa/dpaa_ethdev.h
index e1e062e..3f06d63 100644
--- a/drivers/net/dpaa/dpaa_ethdev.h
+++ b/drivers/net/dpaa/dpaa_ethdev.h
@@ -134,4 +134,44 @@ struct dpaa_if {
struct rte_eth_fc_conf *fc_conf;
};
+struct dpaa_if_stats {
+ /* Rx Statistics Counter */
+ uint64_t reoct; /**<Rx Eth Octets Counter */
+ uint64_t roct; /**<Rx Octet Counters */
+ uint64_t raln; /**<Rx Alignment Error Counter */
+ uint64_t rxpf; /**<Rx valid Pause Frame */
+ uint64_t rfrm; /**<Rx Frame counter */
+ uint64_t rfcs; /**<Rx frame check seq error */
+ uint64_t rvlan; /**<Rx Vlan Frame Counter */
+ uint64_t rerr; /**<Rx Frame error */
+ uint64_t ruca; /**<Rx Unicast */
+ uint64_t rmca; /**<Rx Multicast */
+ uint64_t rbca; /**<Rx Broadcast */
+ uint64_t rdrp; /**<Rx Dropped Packet */
+ uint64_t rpkt; /**<Rx packet */
+ uint64_t rund; /**<Rx undersized packets */
+ uint32_t res_x[14];
+ uint64_t rovr; /**<Rx oversized but good */
+ uint64_t rjbr; /**<Rx oversized with bad csum */
+ uint64_t rfrg; /**<Rx fragment Packet */
+ uint64_t rcnp; /**<Rx control packets (0x8808 */
+ uint64_t rdrntp; /**<Rx dropped due to FIFO overflow */
+ uint32_t res01d0[12];
+ /* Tx Statistics Counter */
+ uint64_t teoct; /**<Tx eth octets */
+ uint64_t toct; /**<Tx Octets */
+ uint32_t res0210[2];
+ uint64_t txpf; /**<Tx valid pause frame */
+ uint64_t tfrm; /**<Tx frame counter */
+ uint64_t tfcs; /**<Tx FCS error */
+ uint64_t tvlan; /**<Tx Vlan Frame */
+ uint64_t terr; /**<Tx frame error */
+ uint64_t tuca; /**<Tx Unicast */
+ uint64_t tmca; /**<Tx Multicast */
+ uint64_t tbca; /**<Tx Broadcast */
+ uint32_t res0258[2];
+ uint64_t tpkt; /**<Tx Packet */
+ uint64_t tund; /**<Tx Undersized */
+};
+
#endif
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index aebcc71..a274e12 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -52,6 +52,28 @@
#include <mc/fsl_dpmng.h>
#include "dpaa2_ethdev.h"
+struct rte_dpaa2_xstats_name_off {
+ char name[RTE_ETH_XSTATS_NAME_SIZE];
+ uint8_t page_id; /* dpni statistics page id */
+ uint8_t stats_id; /* stats id in the given page */
+};
+
+static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
+ {"ingress_multicast_frames", 0, 2},
+ {"ingress_multicast_bytes", 0, 3},
+ {"ingress_broadcast_frames", 0, 4},
+ {"ingress_broadcast_bytes", 0, 5},
+ {"egress_multicast_frames", 1, 2},
+ {"egress_multicast_bytes", 1, 3},
+ {"egress_broadcast_frames", 1, 4},
+ {"egress_broadcast_bytes", 1, 5},
+ {"ingress_filtered_frames", 2, 0},
+ {"ingress_discarded_frames", 2, 1},
+ {"ingress_nobuffer_discards", 2, 2},
+ {"egress_discarded_frames", 2, 3},
+ {"egress_confirmed_frames", 2, 4},
+};
+
static struct rte_dpaa2_driver rte_dpaa2_pmd;
static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
@@ -1090,8 +1112,151 @@ void dpaa2_dev_stats_get(struct rte_eth_dev *dev,
return;
};
-static
-void dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
+static int
+dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
+ unsigned int n)
+{
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ int32_t retcode;
+ union dpni_statistics value[3] = {};
+ unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
+
+ if (xstats == NULL)
+ return 0;
+
+ if (n < num)
+ return num;
+
+ /* Get Counters from page_0*/
+ retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
+ 0, 0, &value[0]);
+ if (retcode)
+ goto err;
+
+ /* Get Counters from page_1*/
+ retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
+ 1, 0, &value[1]);
+ if (retcode)
+ goto err;
+
+ /* Get Counters from page_2*/
+ retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
+ 2, 0, &value[2]);
+ if (retcode)
+ goto err;
+
+ for (i = 0; i < num; i++) {
+ xstats[i].id = i;
+ xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
+ raw.counter[dpaa2_xstats_strings[i].stats_id];
+ }
+ return i;
+err:
+ RTE_LOG(ERR, PMD, "Error in obtaining extended stats (%d)\n", retcode);
+ return retcode;
+}
+
+static int
+dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
+ struct rte_eth_xstat_name *xstats_names,
+ __rte_unused unsigned int limit)
+{
+ unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
+
+ if (xstats_names != NULL)
+ for (i = 0; i < stat_cnt; i++)
+ snprintf(xstats_names[i].name,
+ sizeof(xstats_names[i].name),
+ "%s",
+ dpaa2_xstats_strings[i].name);
+
+ return stat_cnt;
+}
+
+static int
+dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
+ uint64_t *values, unsigned int n)
+{
+ unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
+ uint64_t values_copy[stat_cnt];
+
+ if (!ids) {
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ int32_t retcode;
+ union dpni_statistics value[3] = {};
+
+ if (n < stat_cnt)
+ return stat_cnt;
+
+ if (!values)
+ return 0;
+
+ /* Get Counters from page_0*/
+ retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
+ 0, 0, &value[0]);
+ if (retcode)
+ return 0;
+
+ /* Get Counters from page_1*/
+ retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
+ 1, 0, &value[1]);
+ if (retcode)
+ return 0;
+
+ /* Get Counters from page_2*/
+ retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
+ 2, 0, &value[2]);
+ if (retcode)
+ return 0;
+
+ for (i = 0; i < stat_cnt; i++) {
+ values[i] = value[dpaa2_xstats_strings[i].page_id].
+ raw.counter[dpaa2_xstats_strings[i].stats_id];
+ }
+ return stat_cnt;
+ }
+
+ dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
+
+ for (i = 0; i < n; i++) {
+ if (ids[i] >= stat_cnt) {
+ PMD_INIT_LOG(ERR, "id value isn't valid");
+ return -1;
+ }
+ values[i] = values_copy[ids[i]];
+ }
+ return n;
+}
+
+static int
+dpaa2_xstats_get_names_by_id(
+ struct rte_eth_dev *dev,
+ struct rte_eth_xstat_name *xstats_names,
+ const uint64_t *ids,
+ unsigned int limit)
+{
+ unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
+ struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
+
+ if (!ids)
+ return dpaa2_xstats_get_names(dev, xstats_names, limit);
+
+ dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
+
+ for (i = 0; i < limit; i++) {
+ if (ids[i] >= stat_cnt) {
+ PMD_INIT_LOG(ERR, "id value isn't valid");
+ return -1;
+ }
+ strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
+ }
+ return limit;
+}
+
+static void
+dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
{
struct dpaa2_dev_priv *priv = dev->data->dev_private;
struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
@@ -1471,7 +1636,12 @@ static struct eth_dev_ops dpaa2_ethdev_ops = {
.dev_set_link_down = dpaa2_dev_set_link_down,
.link_update = dpaa2_dev_link_update,
.stats_get = dpaa2_dev_stats_get,
+ .xstats_get = dpaa2_dev_xstats_get,
+ .xstats_get_by_id = dpaa2_xstats_get_by_id,
+ .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
+ .xstats_get_names = dpaa2_xstats_get_names,
.stats_reset = dpaa2_dev_stats_reset,
+ .xstats_reset = dpaa2_dev_stats_reset,
.fw_version_get = dpaa2_fw_version_get,
.dev_infos_get = dpaa2_dev_info_get,
.dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 26/30] net/dpaa2: fix the Tx handling of non HW pool bufs
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (24 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 25/30] net/dpaa2: add support for extra stats Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 27/30] net/dpaa2: log that VLAN extend offload not supported Hemant Agrawal
` (4 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
The current code is sending 8 packet in each internal loop.
In some of the conditions, mbuf is being allocated or freed.
In case of error, the code is returning without taking care of
such buffer. It is better to send already prepared buffer and err
for the current failure only.
Fixes: 9e5f3e6d3658 ("net/dpaa2: handle non-hardware backed buffer pool")
Cc: stable@dpdk.org
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_rxtx.c | 30 +++++++++++++++++++++---------
1 file changed, 21 insertions(+), 9 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 75a06f5..8611d2e 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -350,7 +350,6 @@ eth_copy_mbuf_to_fd(struct rte_mbuf *mbuf,
if (rte_dpaa2_mbuf_alloc_bulk(
rte_dpaa2_bpid_info[bpid].bp_list->mp, &mb, 1)) {
PMD_TX_LOG(WARNING, "Unable to allocated DPAA2 buffer");
- rte_pktmbuf_free(mbuf);
return -1;
}
m = (struct rte_mbuf *)mb;
@@ -382,8 +381,6 @@ eth_copy_mbuf_to_fd(struct rte_mbuf *mbuf,
rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size,
DPAA2_GET_FD_OFFSET(fd),
DPAA2_GET_FD_LEN(fd));
- /*free the original packet */
- rte_pktmbuf_free(mbuf);
return 0;
}
@@ -582,7 +579,7 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
/* Not a hw_pkt pool allocated frame */
if (!mp) {
PMD_TX_LOG(ERR, "err: no bpool attached");
- goto skip_tx;
+ goto send_n_return;
}
if (mp->ops_index != priv->bp_list->dpaa2_ops_index) {
PMD_TX_LOG(ERR, "non hw offload bufffer ");
@@ -595,24 +592,25 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
PMD_TX_LOG(ERR,
"err: no bpool attached");
num_tx = 0;
- goto skip_tx;
+ goto send_n_return;
}
if (unlikely((*bufs)->nb_segs > 1)) {
PMD_TX_LOG(ERR, "S/G support not added"
" for non hw offload buffer");
- goto skip_tx;
+ goto send_n_return;
}
if (eth_copy_mbuf_to_fd(*bufs,
&fd_arr[loop], bpid)) {
- bufs++;
- continue;
+ goto send_n_return;
}
+ /* free the original packet */
+ rte_pktmbuf_free(*bufs);
} else {
bpid = mempool_to_bpid(mp);
if (unlikely((*bufs)->nb_segs > 1)) {
if (eth_mbuf_to_sg_fd(*bufs,
&fd_arr[loop], bpid))
- goto skip_tx;
+ goto send_n_return;
} else {
eth_mbuf_to_fd(*bufs,
&fd_arr[loop], bpid);
@@ -630,6 +628,20 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
dpaa2_q->tx_pkts += frames_to_send;
nb_pkts -= frames_to_send;
}
+ return num_tx;
+
+send_n_return:
+ /* send any already prepared fd */
+ if (loop) {
+ unsigned int i = 0;
+
+ while (i < loop) {
+ i += qbman_swp_enqueue_multiple(swp, &eqdesc,
+ &fd_arr[i], loop - i);
+ }
+ num_tx += loop;
+ dpaa2_q->tx_pkts += loop;
+ }
skip_tx:
return num_tx;
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 27/30] net/dpaa2: log that VLAN extend offload not supported
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (25 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 26/30] net/dpaa2: fix the Tx handling of non HW pool bufs Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 28/30] net/dpaa2: checksum support as per user config Hemant Agrawal
` (3 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index a274e12..589ae6b 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -182,6 +182,12 @@ dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
RTE_LOG(ERR, PMD, "Unable to set vlan filter = %d\n",
ret);
}
+
+ if (mask & ETH_VLAN_EXTEND_MASK) {
+ if (dev->data->dev_conf.rxmode.hw_vlan_extend)
+ RTE_LOG(INFO, PMD,
+ "VLAN extend offload not supported\n");
+ }
}
static int
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 28/30] net/dpaa2: checksum support as per user config
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (26 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 27/30] net/dpaa2: log that VLAN extend offload not supported Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 29/30] net/dpaa2: improve debug messaging Hemant Agrawal
` (2 subsequent siblings)
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Instead of enabling the RX checksum by default, make it
enable only with user ethernet configuration
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 65 +++++++++++++++++++++-------------------
1 file changed, 35 insertions(+), 30 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 589ae6b..4e833db 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -334,8 +334,10 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
static int
dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
{
- struct rte_eth_dev_data *data = dev->data;
- struct rte_eth_conf *eth_conf = &data->dev_conf;
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ struct fsl_mc_io *dpni = priv->hw;
+ struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
+ int rx_ip_csum_offload = false;
int ret;
PMD_INIT_FUNC_TRACE();
@@ -364,6 +366,37 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
}
}
+ if (eth_conf->rxmode.hw_ip_checksum)
+ rx_ip_csum_offload = true;
+
+ ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
+ DPNI_OFF_RX_L3_CSUM, rx_ip_csum_offload);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "Error to set RX l3 csum:Error = %d\n", ret);
+ return ret;
+ }
+
+ ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
+ DPNI_OFF_RX_L4_CSUM, rx_ip_csum_offload);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "Error to get RX l4 csum:Error = %d\n", ret);
+ return ret;
+ }
+
+ ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
+ DPNI_OFF_TX_L3_CSUM, true);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "Error to set TX l3 csum:Error = %d\n", ret);
+ return ret;
+ }
+
+ ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
+ DPNI_OFF_TX_L4_CSUM, true);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "Error to get TX l4 csum:Error = %d\n", ret);
+ return ret;
+ }
+
/* update the current status */
dpaa2_dev_link_update(dev, 0);
@@ -707,34 +740,6 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
dpaa2_q->fqid = qid.fqid;
}
- ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
- DPNI_OFF_RX_L3_CSUM, true);
- if (ret) {
- PMD_INIT_LOG(ERR, "Error to set RX l3 csum:Error = %d\n", ret);
- return ret;
- }
-
- ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
- DPNI_OFF_RX_L4_CSUM, true);
- if (ret) {
- PMD_INIT_LOG(ERR, "Error to get RX l4 csum:Error = %d\n", ret);
- return ret;
- }
-
- ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
- DPNI_OFF_TX_L3_CSUM, true);
- if (ret) {
- PMD_INIT_LOG(ERR, "Error to set TX l3 csum:Error = %d\n", ret);
- return ret;
- }
-
- ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
- DPNI_OFF_TX_L4_CSUM, true);
- if (ret) {
- PMD_INIT_LOG(ERR, "Error to get TX l4 csum:Error = %d\n", ret);
- return ret;
- }
-
/*checksum errors, send them to normal path and set it in annotation */
err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 29/30] net/dpaa2: improve debug messaging
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (27 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 28/30] net/dpaa2: checksum support as per user config Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 30/30] bus/dpaa2: improve debug log messages Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 4e833db..333e4e6 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -426,8 +426,8 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
PMD_INIT_FUNC_TRACE();
- PMD_INIT_LOG(DEBUG, "dev =%p, queue =%d, pool = %p, conf =%p",
- dev, rx_queue_id, mb_pool, rx_conf);
+ PMD_DRV_LOG(DEBUG, "dev =%p, queue =%d, pool = %p, conf =%p",
+ dev, rx_queue_id, mb_pool, rx_conf);
if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
bpid = mempool_to_bpid(mb_pool);
@@ -476,8 +476,8 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
taildrop.threshold = CONG_THRESHOLD_RX_Q;
taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
taildrop.oal = CONG_RX_OAL;
- PMD_INIT_LOG(DEBUG, "Enabling Early Drop on queue = %d",
- rx_queue_id);
+ PMD_DRV_LOG(DEBUG, "Enabling Early Drop on queue = %d",
+ rx_queue_id);
ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
DPNI_CP_QUEUE, DPNI_QUEUE_RX,
dpaa2_q->tc_index, flow_id, &taildrop);
@@ -983,7 +983,7 @@ dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
PMD_DRV_LOG(ERR, "setting the max frame length failed");
return -1;
}
- PMD_DRV_LOG(INFO, "MTU is configured %d for the device\n", mtu);
+ PMD_DRV_LOG(INFO, "MTU is configured %d for the device", mtu);
return 0;
}
@@ -1738,7 +1738,7 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
priv->nb_tx_queues = attr.num_tx_tcs;
PMD_DRV_LOG(DEBUG, "RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d",
- priv->num_tc, priv->nb_rx_queues, priv->nb_tx_queues);
+ priv->num_rx_tc, priv->nb_rx_queues, priv->nb_tx_queues);
priv->hw = dpni_dev;
priv->hw_id = hw_id;
@@ -1805,6 +1805,7 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
eth_dev->tx_pkt_burst = dpaa2_dev_tx;
rte_fslmc_vfio_dmamap();
+ RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
return 0;
init_err:
dpaa2_dev_uninit(eth_dev);
@@ -1865,6 +1866,7 @@ dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
eth_dev->rx_pkt_burst = NULL;
eth_dev->tx_pkt_burst = NULL;
+ RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
return 0;
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v2 30/30] bus/dpaa2: improve debug log messages
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (28 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 29/30] net/dpaa2: improve debug messaging Hemant Agrawal
@ 2017-09-08 8:45 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
30 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-08 8:45 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
enable the printing of objects during debuging.
use RTE_LOG to avoid function name printing for object name.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c | 2 +-
drivers/bus/fslmc/portal/dpaa2_hw_dpci.c | 2 +-
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 6 ++----
3 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
index 7e96115..334e1f5 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
@@ -98,7 +98,7 @@ dpaa2_create_dpbp_device(int vdev_fd __rte_unused,
TAILQ_INSERT_TAIL(&dpbp_dev_list, dpbp_node, next);
- PMD_INIT_LOG(DEBUG, "DPAA2: Added [dpbp.%d]", dpbp_id);
+ RTE_LOG(DEBUG, PMD, "DPAA2: Added [dpbp.%d]\n", dpbp_id);
return 0;
}
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
index b60a745..ae189c7 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
@@ -140,7 +140,7 @@ rte_dpaa2_create_dpci_device(int vdev_fd __rte_unused,
TAILQ_INSERT_TAIL(&dpci_dev_list, dpci_node, next);
- PMD_INIT_LOG(DEBUG, "DPAA2: Added [dpci.%d]", dpci_id);
+ RTE_LOG(DEBUG, PMD, "DPAA2: Added [dpci.%d]\n", dpci_id);
return 0;
}
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index ff41ce4..f00070f 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -210,7 +210,7 @@ configure_dpio_qbman_swp(struct dpaa2_dpio_dev *dpio_dev)
return -1;
}
- PMD_DRV_LOG(DEBUG, "\t Allocated DPIO Portal[%p]", dpio_dev->dpio);
+ PMD_DRV_LOG(DEBUG, "Allocated DPIO Portal[%p]", dpio_dev->dpio);
dpio_dev->dpio->regs = dpio_dev->mc_portal;
if (dpio_open(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->hw_id,
&dpio_dev->token)) {
@@ -242,8 +242,6 @@ configure_dpio_qbman_swp(struct dpaa2_dpio_dev *dpio_dev)
return -1;
}
- PMD_INIT_LOG(DEBUG, "Qbman Portal ID %d", attr.qbman_portal_id);
-
/* Configure & setup SW portal */
p_des.block = NULL;
p_des.idx = attr.qbman_portal_id;
@@ -502,7 +500,7 @@ dpaa2_create_dpio_device(int vdev_fd,
}
TAILQ_INSERT_TAIL(&dpio_dev_list, dpio_dev, next);
- PMD_INIT_LOG(DEBUG, "DPAA2: Added [dpio.%d]", object_id);
+ RTE_LOG(DEBUG, PMD, "DPAA2: Added [dpio.%d]\n", object_id);
return 0;
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates
2017-09-08 8:44 ` [dpdk-dev] [PATCH v2 00/30] NXP DPAA2 PMD updates Hemant Agrawal
` (29 preceding siblings ...)
2017-09-08 8:45 ` [dpdk-dev] [PATCH v2 30/30] bus/dpaa2: improve debug log messages Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 01/27] bus/fslmc: qbman replace word copy with memcpy Hemant Agrawal
` (28 more replies)
30 siblings, 29 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
This patchset includes the hw driver upgrades and additional
nic feature implementations.
patches 1..8 - upgrades the qbman hw driver
patches 9..10 - adds the support for LX2160 platform
patches 11..27 - adds various features and cleanups in
NXP DPAA2 pmd mainly - links status, RSS update,
extra stats etc.
This patch depends on following [1], [2].
1. NXP DPAA2: Refactor bus scan/probe code
http://dpdk.org/ml/archives/dev/2017-August/073545.html
2.NXP DPAA2 bus driver fw upgrade
http://dpdk.org/ml/archives/dev/2017-September/075582.html
---
v3:
1. removed the MC fw upgrade patch to be separate patch
2. remove dpaa code, which was added mistakenly
3. fix the comments and compilation issue with debug on for patch #6,7,8
4. added patch to add the devices in natural sorted order
5. fix coverity issue in patch #13, #17, #18, #22
v2:
1. improve the checksum offload suport as per fuser config
2. remvoe checksum errors.
3. some cleanups on log messages.
Ashish Jain (2):
config/dpaa2: change max lores to 16
bus/fslmc: add support for LX2160 platform
Haiying Wang (4):
bus/fslmc: qbman replace word copy with memcpy
bus/fslmc: add qbman API to do enqueue with multiple frames
bus/fslmc: support up to 32 frames in one volatile dequeue
bus/fslmc: enhance the QBMAN CENA mode
Hemant Agrawal (20):
bus/fslmc: remove the export for qbman version function
bus/fslmc: qbman remove unused funcs and align names
bus/fslmc: cleanup compat file
bus/fslmc: clean the qbman support code
net/dpaa2: add support for congestion overhead
bus/fslmc: add support to check dpbp presence
bus/fslmc: cleanup the dpaa2 interrupt support
net/dpaa2: add support for link status event
bus/fslmc: enable link status interrupt
net/dpaa2: check physical link state on up cmd
net/dpaa2: improve error and logs for flow distribution
net/dpaa2: increase the dist param to 64 bit
net/dpaa2: remove RSS restriction with num of queues
net/dpaa2: add support for RSS hash update and get
net/dpaa2: add support for extra stats
net/dpaa2: fix the Tx handling of non HW pool bufs
net/dpaa2: log that VLAN extend offload not supported
net/dpaa2: checksum support as per user config
net/dpaa2: improve debug messaging
bus/dpaa2: improve debug log messages
Shreyansh Jain (1):
bus/fslmc: add devices in sorted order
config/defconfig_arm64-dpaa2-linuxapp-gcc | 2 +-
doc/guides/nics/features/dpaa2.ini | 2 +
drivers/bus/fslmc/Makefile | 1 +
drivers/bus/fslmc/fslmc_bus.c | 45 +-
drivers/bus/fslmc/fslmc_vfio.c | 112 ++-
drivers/bus/fslmc/fslmc_vfio.h | 8 +-
drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c | 9 +-
drivers/bus/fslmc/portal/dpaa2_hw_dpci.c | 2 +-
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 46 +-
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 2 +
drivers/bus/fslmc/qbman/include/compat.h | 322 +------
drivers/bus/fslmc/qbman/include/fsl_qbman_base.h | 4 -
drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 183 ++--
drivers/bus/fslmc/qbman/qbman_portal.c | 973 +++++++++------------
drivers/bus/fslmc/qbman/qbman_portal.h | 140 +--
drivers/bus/fslmc/qbman/qbman_private.h | 174 ----
drivers/bus/fslmc/qbman/qbman_sys.h | 151 ++--
drivers/bus/fslmc/qbman/qbman_sys_decl.h | 25 +-
drivers/bus/fslmc/rte_bus_fslmc_version.map | 9 +-
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 6 +-
drivers/event/dpaa2/dpaa2_eventdev.c | 2 +-
drivers/net/dpaa2/base/dpaa2_hw_dpni.c | 45 +-
drivers/net/dpaa2/dpaa2_ethdev.c | 459 ++++++++--
drivers/net/dpaa2/dpaa2_ethdev.h | 3 +-
drivers/net/dpaa2/dpaa2_rxtx.c | 53 +-
drivers/net/dpaa2/mc/dpni.c | 233 +++++
drivers/net/dpaa2/mc/fsl_dpni.h | 49 ++
drivers/net/dpaa2/mc/fsl_dpni_cmd.h | 50 ++
28 files changed, 1619 insertions(+), 1491 deletions(-)
delete mode 100644 drivers/bus/fslmc/qbman/qbman_private.h
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 01/27] bus/fslmc: qbman replace word copy with memcpy
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 02/27] bus/fslmc: remove the export for qbman version function Hemant Agrawal
` (27 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Haiying Wang <Haiying.Wang@nxp.com>
The word_copy is not as efficient as expected, so remove it from
this driver.
Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/include/compat.h | 42 --------------------------------
drivers/bus/fslmc/qbman/qbman_portal.c | 12 ++++-----
drivers/bus/fslmc/qbman/qbman_sys.h | 9 -------
3 files changed, 5 insertions(+), 58 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/include/compat.h b/drivers/bus/fslmc/qbman/include/compat.h
index 529f1ea..7b69fd1 100644
--- a/drivers/bus/fslmc/qbman/include/compat.h
+++ b/drivers/bus/fslmc/qbman/include/compat.h
@@ -229,48 +229,6 @@ typedef uint32_t phandle;
#define __raw_readl(p) (*(const volatile unsigned int *)(p))
#define __raw_writel(v, p) {*(volatile unsigned int *)(p) = (v); }
-/* memcpy() stuff - when you know alignments in advance */
-#ifdef CONFIG_TRY_BETTER_MEMCPY
-static inline void copy_words(void *dest, const void *src, size_t sz)
-{
- u32 *__dest = dest;
- const u32 *__src = src;
- size_t __sz = sz >> 2;
-
- QBMAN_BUG_ON((unsigned long)dest & 0x3);
- QBMAN_BUG_ON((unsigned long)src & 0x3);
- QBMAN_BUG_ON(sz & 0x3);
- while (__sz--)
- *(__dest++) = *(__src++);
-}
-
-static inline void copy_shorts(void *dest, const void *src, size_t sz)
-{
- u16 *__dest = dest;
- const u16 *__src = src;
- size_t __sz = sz >> 1;
-
- QBMAN_BUG_ON((unsigned long)dest & 0x1);
- QBMAN_BUG_ON((unsigned long)src & 0x1);
- QBMAN_BUG_ON(sz & 0x1);
- while (__sz--)
- *(__dest++) = *(__src++);
-}
-
-static inline void copy_bytes(void *dest, const void *src, size_t sz)
-{
- u8 *__dest = dest;
- const u8 *__src = src;
-
- while (sz--)
- *(__dest++) = *(__src++);
-}
-#else
-#define copy_words memcpy
-#define copy_shorts memcpy
-#define copy_bytes memcpy
-#endif
-
/* Completion stuff */
#define DECLARE_COMPLETION(n) int n = 0
#define complete(n) { *n = 1; }
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c
index dd62e9a..f360760 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -480,8 +480,8 @@ static int qbman_swp_enqueue_array_mode(struct qbman_swp *s,
return -EBUSY;
p = qbman_cena_write_start_wo_shadow(&s->sys,
QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
- word_copy(&p[1], &cl[1], 7);
- word_copy(&p[8], fd, sizeof(*fd) >> 2);
+ memcpy(&p[1], &cl[1], 28);
+ memcpy(&p[8], fd, sizeof(*fd));
/* Set the verb byte, have to substitute in the valid-bit */
lwsync();
p[0] = cl[0] | EQAR_VB(eqar);
@@ -512,8 +512,8 @@ static int qbman_swp_enqueue_ring_mode(struct qbman_swp *s,
p = qbman_cena_write_start_wo_shadow(&s->sys,
QBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));
- word_copy(&p[1], &cl[1], 7);
- word_copy(&p[8], fd, sizeof(*fd) >> 2);
+ memcpy(&p[1], &cl[1], 28);
+ memcpy(&p[8], fd, sizeof(*fd));
lwsync();
/* Set the verb byte, have to substitute in the valid-bit */
p[0] = cl[0] | s->eqcr.pi_vb;
@@ -549,9 +549,7 @@ int qbman_swp_fill_ring(struct qbman_swp *s,
}
p = qbman_cena_write_start_wo_shadow(&s->sys,
QBMAN_CENA_SWP_EQCR((s->eqcr.pi/* +burst_index */) & 7));
- /* word_copy(&p[1], &cl[1], 7); */
memcpy(&p[1], &cl[1], 7 * 4);
- /* word_copy(&p[8], fd, sizeof(*fd) >> 2); */
memcpy(&p[8], fd, sizeof(struct qbman_fd));
/* lwsync(); */
@@ -799,7 +797,7 @@ int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
*/
qb_attr_code_encode(&code_pull_token, cl, s->desc.idx + 1);
p = qbman_cena_write_start_wo_shadow(&s->sys, QBMAN_CENA_SWP_VDQCR);
- word_copy(&p[1], &cl[1], 3);
+ memcpy(&p[1], &cl[1], 12);
/* Set the verb byte, have to substitute in the valid-bit */
lwsync();
p[0] = cl[0] | s->vdq.valid_bit;
diff --git a/drivers/bus/fslmc/qbman/qbman_sys.h b/drivers/bus/fslmc/qbman/qbman_sys.h
index 5dbcaa5..9ea55de 100644
--- a/drivers/bus/fslmc/qbman/qbman_sys.h
+++ b/drivers/bus/fslmc/qbman/qbman_sys.h
@@ -47,15 +47,6 @@
#undef QBMAN_CINH_TRACE
#undef QBMAN_CENA_TRACE
-static inline void word_copy(void *d, const void *s, unsigned int cnt)
-{
- uint32_t *dd = d;
- const uint32_t *ss = s;
-
- while (cnt--)
- *(dd++) = *(ss++);
-}
-
/* Currently, the CENA support code expects each 32-bit word to be written in
* host order, and these are converted to hardware (little-endian) order on
* command submission. However, 64-bit quantities are must be written (and read)
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 02/27] bus/fslmc: remove the export for qbman version function
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 01/27] bus/fslmc: qbman replace word copy with memcpy Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 03/27] bus/fslmc: add qbman API to do enqueue with multiple frames Hemant Agrawal
` (26 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
This func is not required to be used outside of the qbman driver.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/include/fsl_qbman_base.h | 4 ----
drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 2 --
drivers/bus/fslmc/qbman/qbman_portal.c | 7 -------
drivers/bus/fslmc/qbman/qbman_portal.h | 1 +
drivers/bus/fslmc/qbman/qbman_private.h | 4 ++++
5 files changed, 5 insertions(+), 13 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h
index ee4b772..1415960 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_base.h
@@ -38,10 +38,6 @@ typedef uint64_t dma_addr_t;
*
*/
-#define QMAN_REV_4000 0x04000000
-#define QMAN_REV_4100 0x04010000
-#define QMAN_REV_4101 0x04010001
-
/**
* struct qbman_block_desc - qbman block descriptor structure
* @ccsr_reg_bar: CCSR register map.
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
index 9e9047e..23c3d13 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
@@ -1132,6 +1132,4 @@ int qbman_swp_send_multiple(struct qbman_swp *s,
int qbman_check_command_complete(struct qbman_swp *s,
const struct qbman_result *dq);
-
-int qbman_get_version(void);
#endif /* !_FSL_QBMAN_PORTAL_H */
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c
index f360760..97df703 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -105,8 +105,6 @@ struct qb_attr_code code_sdqcr_dqsrc = QB_CODE(0, 0, 16);
#define MAX_QBMAN_PORTALS 35
static struct qbman_swp *portal_idx_map[MAX_QBMAN_PORTALS];
-uint32_t qman_version;
-
/*********************************/
/* Portal constructor/destructor */
/*********************************/
@@ -1579,8 +1577,3 @@ int qbman_swp_send_multiple(struct qbman_swp *s,
return sent;
}
-
-int qbman_get_version(void)
-{
- return qman_version;
-}
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.h b/drivers/bus/fslmc/qbman/qbman_portal.h
index 7aa1d4f..8018048 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/qbman_portal.h
@@ -29,6 +29,7 @@
#include "qbman_private.h"
#include <fsl_qbman_portal.h>
+uint32_t qman_version;
/* All QBMan command and result structures use this "valid bit" encoding */
#define QB_VALID_BIT ((uint32_t)0x80)
diff --git a/drivers/bus/fslmc/qbman/qbman_private.h b/drivers/bus/fslmc/qbman/qbman_private.h
index 292ec6a..b98c330 100644
--- a/drivers/bus/fslmc/qbman/qbman_private.h
+++ b/drivers/bus/fslmc/qbman/qbman_private.h
@@ -171,4 +171,8 @@ static inline void hexdump(const void *ptr, size_t sz)
__hexdump(start, end, p, sz, c);
}
+#define QMAN_REV_4000 0x04000000
+#define QMAN_REV_4100 0x04010000
+#define QMAN_REV_4101 0x04010001
+
#include "qbman_sys.h"
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 03/27] bus/fslmc: add qbman API to do enqueue with multiple frames
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 01/27] bus/fslmc: qbman replace word copy with memcpy Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 02/27] bus/fslmc: remove the export for qbman version function Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-18 20:18 ` Ferruh Yigit
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 04/27] bus/fslmc: support up to 32 frames in one volatile dequeue Hemant Agrawal
` (25 subsequent siblings)
28 siblings, 1 reply; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Haiying Wang <Haiying.Wang@nxp.com>
Clean it up and update the prototype.
Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
Signed-off-by: Hemant Agrawal <Hemant.Agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 32 ++--
drivers/bus/fslmc/qbman/qbman_portal.c | 200 +++++++--------------
drivers/bus/fslmc/rte_bus_fslmc_version.map | 3 +-
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 2 +-
drivers/event/dpaa2/dpaa2_eventdev.c | 2 +-
drivers/net/dpaa2/dpaa2_rxtx.c | 2 +-
6 files changed, 83 insertions(+), 158 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
index 23c3d13..fe1cc94 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
@@ -914,19 +914,33 @@ void qbman_eq_desc_set_dca(struct qbman_eq_desc *d, int enable,
int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
const struct qbman_fd *fd);
/**
- * qbman_swp_enqueue_multiple_eqdesc() - Enqueue multiple frames with separte
- * enqueue descriptors.
+ * qbman_swp_enqueue_multiple() - Enqueue multiple frames with same
+ eq descriptor
* @s: the software portal used for enqueue.
- * @d: the enqueue descriptors
+ * @d: the enqueue descriptor.
* @fd: the frame descriptor to be enqueued.
* @num_frames: the number of the frames to be enqueued.
*
* Return the number of enqueued frames, -EBUSY if the EQCR is not ready.
*/
-int qbman_swp_enqueue_multiple_eqdesc(struct qbman_swp *s,
+int qbman_swp_enqueue_multiple(struct qbman_swp *s,
const struct qbman_eq_desc *d,
const struct qbman_fd *fd,
int num_frames);
+/**
+ * qbman_swp_enqueue_multiple_desc() - Enqueue multiple frames with
+ * individual eq descriptor.
+ * @s: the software portal used for enqueue.
+ * @d: the enqueue descriptor.
+ * @fd: the frame descriptor to be enqueued.
+ * @num_frames: the number of the frames to be enqueued.
+ *
+ * Return the number of enqueued frames, -EBUSY if the EQCR is not ready.
+ */
+int qbman_swp_enqueue_multiple_desc(struct qbman_swp *s,
+ const struct qbman_eq_desc *d,
+ const struct qbman_fd *fd,
+ int num_frames);
/* TODO:
* qbman_swp_enqueue_thresh() - Set threshold for EQRI interrupt.
@@ -1119,16 +1133,6 @@ int qbman_swp_CDAN_disable(struct qbman_swp *s, uint16_t channelid);
*/
int qbman_swp_CDAN_set_context_enable(struct qbman_swp *s, uint16_t channelid,
uint64_t ctx);
-int qbman_swp_fill_ring(struct qbman_swp *s,
- const struct qbman_eq_desc *d,
- const struct qbman_fd *fd,
- uint8_t burst_index);
-int qbman_swp_flush_ring(struct qbman_swp *s);
-void qbman_sync(void);
-int qbman_swp_send_multiple(struct qbman_swp *s,
- const struct qbman_eq_desc *d,
- const struct qbman_fd *fd,
- int frames_to_send);
int qbman_check_command_complete(struct qbman_swp *s,
const struct qbman_result *dq);
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c
index 97df703..f212829 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -525,15 +525,26 @@ static int qbman_swp_enqueue_ring_mode(struct qbman_swp *s,
return 0;
}
-int qbman_swp_fill_ring(struct qbman_swp *s,
- const struct qbman_eq_desc *d,
- const struct qbman_fd *fd,
- __attribute__((unused)) uint8_t burst_index)
+int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
+ const struct qbman_fd *fd)
+{
+ if (s->sys.eqcr_mode == qman_eqcr_vb_array)
+ return qbman_swp_enqueue_array_mode(s, d, fd);
+ else /* Use ring mode by default */
+ return qbman_swp_enqueue_ring_mode(s, d, fd);
+}
+
+int qbman_swp_enqueue_multiple(struct qbman_swp *s,
+ const struct qbman_eq_desc *d,
+ const struct qbman_fd *fd,
+ int num_frames)
{
uint32_t *p;
const uint32_t *cl = qb_cl(d);
- uint32_t eqcr_ci;
+ uint32_t eqcr_ci, eqcr_pi;
uint8_t diff;
+ int i, num_enqueued = 0;
+ uint64_t addr_cena;
if (!s->eqcr.available) {
eqcr_ci = s->eqcr.ci;
@@ -543,62 +554,58 @@ int qbman_swp_fill_ring(struct qbman_swp *s,
eqcr_ci, s->eqcr.ci);
s->eqcr.available += diff;
if (!diff)
- return -EBUSY;
+ return 0;
}
- p = qbman_cena_write_start_wo_shadow(&s->sys,
- QBMAN_CENA_SWP_EQCR((s->eqcr.pi/* +burst_index */) & 7));
- memcpy(&p[1], &cl[1], 7 * 4);
- memcpy(&p[8], fd, sizeof(struct qbman_fd));
-
- /* lwsync(); */
- p[0] = cl[0] | s->eqcr.pi_vb;
-
- s->eqcr.pi++;
- s->eqcr.pi &= 0xF;
- s->eqcr.available--;
- if (!(s->eqcr.pi & 7))
- s->eqcr.pi_vb ^= QB_VALID_BIT;
-
- return 0;
-}
-int qbman_swp_flush_ring(struct qbman_swp *s)
-{
- void *ptr = s->sys.addr_cena;
+ eqcr_pi = s->eqcr.pi;
+ num_enqueued = (s->eqcr.available < num_frames) ?
+ s->eqcr.available : num_frames;
+ s->eqcr.available -= num_enqueued;
+ /* Fill in the EQCR ring */
+ for (i = 0; i < num_enqueued; i++) {
+ p = qbman_cena_write_start_wo_shadow(&s->sys,
+ QBMAN_CENA_SWP_EQCR(eqcr_pi & 7));
+ memcpy(&p[1], &cl[1], 28);
+ memcpy(&p[8], &fd[i], sizeof(*fd));
+ eqcr_pi++;
+ eqcr_pi &= 0xF;
+ }
- dcbf((uint64_t)ptr);
- dcbf((uint64_t)ptr + 0x40);
- dcbf((uint64_t)ptr + 0x80);
- dcbf((uint64_t)ptr + 0xc0);
- dcbf((uint64_t)ptr + 0x100);
- dcbf((uint64_t)ptr + 0x140);
- dcbf((uint64_t)ptr + 0x180);
- dcbf((uint64_t)ptr + 0x1c0);
+ lwsync();
- return 0;
-}
+ /* Set the verb byte, have to substitute in the valid-bit */
+ eqcr_pi = s->eqcr.pi;
+ for (i = 0; i < num_enqueued; i++) {
+ p = qbman_cena_write_start_wo_shadow(&s->sys,
+ QBMAN_CENA_SWP_EQCR(eqcr_pi & 7));
+ p[0] = cl[0] | s->eqcr.pi_vb;
+ eqcr_pi++;
+ eqcr_pi &= 0xF;
+ if (!(eqcr_pi & 7))
+ s->eqcr.pi_vb ^= QB_VALID_BIT;
+ }
-void qbman_sync(void)
-{
- lwsync();
-}
+ /* Flush all the cacheline without load/store in between */
+ eqcr_pi = s->eqcr.pi;
+ addr_cena = (uint64_t)s->sys.addr_cena;
+ for (i = 0; i < num_enqueued; i++) {
+ dcbf((uint64_t *)(addr_cena +
+ QBMAN_CENA_SWP_EQCR(eqcr_pi & 7)));
+ eqcr_pi++;
+ eqcr_pi &= 0xF;
+ }
+ s->eqcr.pi = eqcr_pi;
-int qbman_swp_enqueue(struct qbman_swp *s, const struct qbman_eq_desc *d,
- const struct qbman_fd *fd)
-{
- if (s->sys.eqcr_mode == qman_eqcr_vb_array)
- return qbman_swp_enqueue_array_mode(s, d, fd);
- else /* Use ring mode by default */
- return qbman_swp_enqueue_ring_mode(s, d, fd);
+ return num_enqueued;
}
-int qbman_swp_enqueue_multiple_eqdesc(struct qbman_swp *s,
- const struct qbman_eq_desc *d,
- const struct qbman_fd *fd,
- int num_frames)
+int qbman_swp_enqueue_multiple_desc(struct qbman_swp *s,
+ const struct qbman_eq_desc *d,
+ const struct qbman_fd *fd,
+ int num_frames)
{
uint32_t *p;
- const uint32_t *cl = qb_cl(d);
+ const uint32_t *cl;
uint32_t eqcr_ci, eqcr_pi;
uint8_t diff;
int i, num_enqueued = 0;
@@ -623,29 +630,26 @@ int qbman_swp_enqueue_multiple_eqdesc(struct qbman_swp *s,
for (i = 0; i < num_enqueued; i++) {
p = qbman_cena_write_start_wo_shadow(&s->sys,
QBMAN_CENA_SWP_EQCR(eqcr_pi & 7));
+ cl = qb_cl(&d[i]);
memcpy(&p[1], &cl[1], 28);
memcpy(&p[8], &fd[i], sizeof(*fd));
eqcr_pi++;
eqcr_pi &= 0xF;
- /*Pointing to the next enqueue descriptor*/
- cl += (sizeof(struct qbman_eq_desc) / sizeof(uint32_t));
}
lwsync();
/* Set the verb byte, have to substitute in the valid-bit */
eqcr_pi = s->eqcr.pi;
- cl = qb_cl(d);
for (i = 0; i < num_enqueued; i++) {
p = qbman_cena_write_start_wo_shadow(&s->sys,
QBMAN_CENA_SWP_EQCR(eqcr_pi & 7));
+ cl = qb_cl(&d[i]);
p[0] = cl[0] | s->eqcr.pi_vb;
eqcr_pi++;
eqcr_pi &= 0xF;
if (!(eqcr_pi & 7))
s->eqcr.pi_vb ^= QB_VALID_BIT;
- /*Pointing to the next enqueue descriptor*/
- cl += (sizeof(struct qbman_eq_desc) / sizeof(uint32_t));
}
/* Flush all the cacheline without load/store in between */
@@ -1493,87 +1497,3 @@ struct qbman_result *qbman_get_dqrr_from_idx(struct qbman_swp *s, uint8_t idx)
dq = qbman_cena_read(&s->sys, QBMAN_CENA_SWP_DQRR(idx));
return dq;
}
-
-int qbman_swp_send_multiple(struct qbman_swp *s,
- const struct qbman_eq_desc *d,
- const struct qbman_fd *fd,
- int frames_to_send)
-{
- uint32_t *p;
- const uint32_t *cl = qb_cl(d);
- uint32_t eqcr_ci;
- uint8_t diff;
- int sent = 0;
- int i;
- int initial_pi = s->eqcr.pi;
- uint64_t start_pointer;
-
- if (!s->eqcr.available) {
- eqcr_ci = s->eqcr.ci;
- s->eqcr.ci = qbman_cena_read_reg(&s->sys,
- QBMAN_CENA_SWP_EQCR_CI) & 0xF;
- diff = qm_cyc_diff(QBMAN_EQCR_SIZE,
- eqcr_ci, s->eqcr.ci);
- if (!diff)
- goto done;
- s->eqcr.available += diff;
- }
-
- /* we are trying to send frames_to_send,
- * if we have enough space in the ring
- */
- while (s->eqcr.available && frames_to_send--) {
- p = qbman_cena_write_start_wo_shadow_fast(&s->sys,
- QBMAN_CENA_SWP_EQCR((initial_pi) & 7));
- /* Write command (except of first byte) and FD */
- memcpy(&p[1], &cl[1], 7 * 4);
- memcpy(&p[8], &fd[sent], sizeof(struct qbman_fd));
-
- initial_pi++;
- initial_pi &= 0xF;
- s->eqcr.available--;
- sent++;
- }
-
-done:
- initial_pi = s->eqcr.pi;
- lwsync();
-
- /* in order for flushes to complete faster:
- * we use a following trick: we record all lines in 32 bit word
- */
-
- initial_pi = s->eqcr.pi;
- for (i = 0; i < sent; i++) {
- p = qbman_cena_write_start_wo_shadow_fast(&s->sys,
- QBMAN_CENA_SWP_EQCR((initial_pi) & 7));
-
- p[0] = cl[0] | s->eqcr.pi_vb;
- initial_pi++;
- initial_pi &= 0xF;
-
- if (!(initial_pi & 7))
- s->eqcr.pi_vb ^= QB_VALID_BIT;
- }
-
- initial_pi = s->eqcr.pi;
-
- /* We need to flush all the lines but without
- * load/store operations between them.
- * We assign start_pointer before we start loop so that
- * in loop we do not read it from memory
- */
- start_pointer = (uint64_t)s->sys.addr_cena;
- for (i = 0; i < sent; i++) {
- p = (uint32_t *)(start_pointer
- + QBMAN_CENA_SWP_EQCR(initial_pi & 7));
- dcbf((uint64_t)p);
- initial_pi++;
- initial_pi &= 0xF;
- }
-
- /* Update producer index for the next call */
- s->eqcr.pi = initial_pi;
-
- return sent;
-}
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index 6ac256d..13fb46a 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -69,7 +69,8 @@ DPDK_17.08 {
qbman_result_SCN_state_in_mem;
qbman_swp_dqrr_consume;
qbman_swp_dqrr_next;
- qbman_swp_enqueue_multiple_eqdesc;
+ qbman_swp_enqueue_multiple;
+ qbman_swp_enqueue_multiple_desc;
qbman_swp_interrupt_clear_status;
qbman_swp_push_set;
rte_dpaa2_alloc_dpci_dev;
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 95c3951..094cf30 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -634,7 +634,7 @@ dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
}
loop = 0;
while (loop < frames_to_send) {
- loop += qbman_swp_send_multiple(swp, &eqdesc,
+ loop += qbman_swp_enqueue_multiple(swp, &eqdesc,
&fd_arr[loop],
frames_to_send - loop);
}
diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c b/drivers/event/dpaa2/dpaa2_eventdev.c
index cf2d274..81286a8 100644
--- a/drivers/event/dpaa2/dpaa2_eventdev.c
+++ b/drivers/event/dpaa2/dpaa2_eventdev.c
@@ -144,7 +144,7 @@ dpaa2_eventdev_enqueue_burst(void *port, const struct rte_event ev[],
}
loop = 0;
while (loop < frames_to_send) {
- loop += qbman_swp_enqueue_multiple_eqdesc(swp,
+ loop += qbman_swp_enqueue_multiple_desc(swp,
&eqdesc[loop], &fd_arr[loop],
frames_to_send - loop);
}
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 3c057a3..4342c73 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -622,7 +622,7 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
}
loop = 0;
while (loop < frames_to_send) {
- loop += qbman_swp_send_multiple(swp, &eqdesc,
+ loop += qbman_swp_enqueue_multiple(swp, &eqdesc,
&fd_arr[loop], frames_to_send - loop);
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [dpdk-dev] [PATCH v3 03/27] bus/fslmc: add qbman API to do enqueue with multiple frames
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 03/27] bus/fslmc: add qbman API to do enqueue with multiple frames Hemant Agrawal
@ 2017-09-18 20:18 ` Ferruh Yigit
0 siblings, 0 replies; 97+ messages in thread
From: Ferruh Yigit @ 2017-09-18 20:18 UTC (permalink / raw)
To: Hemant Agrawal, dev, Pablo de Lara, Jerin Jacob
Cc: shreyansh.jain, Thomas Monjalon
On 9/16/2017 11:52 AM, Hemant Agrawal wrote:
> From: Haiying Wang <Haiying.Wang@nxp.com>
>
> Clean it up and update the prototype.
>
> Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
> Signed-off-by: Hemant Agrawal <Hemant.Agrawal@nxp.com>
> ---
> drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 32 ++--
> drivers/bus/fslmc/qbman/qbman_portal.c | 200 +++++++--------------
> drivers/bus/fslmc/rte_bus_fslmc_version.map | 3 +-
> drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 2 +-
> drivers/event/dpaa2/dpaa2_eventdev.c | 2 +-
I guess there is no escape from updating eventdev and cryptodev here.
But since I am planning to get this patch into next-net, lets add other
maintainers to cc to get their confirmation.
> drivers/net/dpaa2/dpaa2_rxtx.c | 2 +-
> 6 files changed, 83 insertions(+), 158 deletions(-)
<...>
> diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map
> index 6ac256d..13fb46a 100644
> --- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
> +++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
> @@ -69,7 +69,8 @@ DPDK_17.08 {
> qbman_result_SCN_state_in_mem;
> qbman_swp_dqrr_consume;
> qbman_swp_dqrr_next;
> - qbman_swp_enqueue_multiple_eqdesc;
> + qbman_swp_enqueue_multiple;
> + qbman_swp_enqueue_multiple_desc;
> qbman_swp_interrupt_clear_status;
> qbman_swp_push_set;
> rte_dpaa2_alloc_dpci_dev;
> diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> index 95c3951..094cf30 100644
> --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> @@ -634,7 +634,7 @@ dpaa2_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
> }
> loop = 0;
> while (loop < frames_to_send) {
> - loop += qbman_swp_send_multiple(swp, &eqdesc,
> + loop += qbman_swp_enqueue_multiple(swp, &eqdesc,
> &fd_arr[loop],
> frames_to_send - loop);
> }
> diff --git a/drivers/event/dpaa2/dpaa2_eventdev.c b/drivers/event/dpaa2/dpaa2_eventdev.c
> index cf2d274..81286a8 100644
> --- a/drivers/event/dpaa2/dpaa2_eventdev.c
> +++ b/drivers/event/dpaa2/dpaa2_eventdev.c
> @@ -144,7 +144,7 @@ dpaa2_eventdev_enqueue_burst(void *port, const struct rte_event ev[],
> }
> loop = 0;
> while (loop < frames_to_send) {
> - loop += qbman_swp_enqueue_multiple_eqdesc(swp,
> + loop += qbman_swp_enqueue_multiple_desc(swp,
> &eqdesc[loop], &fd_arr[loop],
> frames_to_send - loop);
> }
> diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
> index 3c057a3..4342c73 100644
> --- a/drivers/net/dpaa2/dpaa2_rxtx.c
> +++ b/drivers/net/dpaa2/dpaa2_rxtx.c
> @@ -622,7 +622,7 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
> }
> loop = 0;
> while (loop < frames_to_send) {
> - loop += qbman_swp_send_multiple(swp, &eqdesc,
> + loop += qbman_swp_enqueue_multiple(swp, &eqdesc,
> &fd_arr[loop], frames_to_send - loop);
> }
>
>
^ permalink raw reply [flat|nested] 97+ messages in thread
* [dpdk-dev] [PATCH v3 04/27] bus/fslmc: support up to 32 frames in one volatile dequeue
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (2 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 03/27] bus/fslmc: add qbman API to do enqueue with multiple frames Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 05/27] bus/fslmc: enhance the QBMAN CENA mode Hemant Agrawal
` (24 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Haiying Wang <Haiying.Wang@nxp.com>
QMan5.0 supports up to 32 frames in one volatile dequeue
command. For the older Qman versions which only support
up to 16 frames, the highest bit in NUMF will be ignored.
Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/qbman_portal.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c
index f212829..7fc78cd 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -704,7 +704,7 @@ static struct qb_attr_code code_pull_dct = QB_CODE(0, 0, 2);
static struct qb_attr_code code_pull_dt = QB_CODE(0, 2, 2);
static struct qb_attr_code code_pull_rls = QB_CODE(0, 4, 1);
static struct qb_attr_code code_pull_stash = QB_CODE(0, 5, 1);
-static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 4);
+static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 5);
static struct qb_attr_code code_pull_token = QB_CODE(0, 16, 8);
static struct qb_attr_code code_pull_dqsource = QB_CODE(1, 0, 24);
static struct qb_attr_code code_pull_rsp_lo = QB_CODE(2, 0, 32);
@@ -743,7 +743,6 @@ void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, uint8_t numframes)
{
uint32_t *cl = qb_cl(d);
- QBMAN_BUG_ON(!numframes || (numframes > 16));
qb_attr_code_encode(&code_pull_numframes, cl,
(uint32_t)(numframes - 1));
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 05/27] bus/fslmc: enhance the QBMAN CENA mode
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (3 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 04/27] bus/fslmc: support up to 32 frames in one volatile dequeue Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 06/27] bus/fslmc: qbman remove unused funcs and align names Hemant Agrawal
` (23 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Haiying Wang <Haiying.Wang@nxp.com>
Signed-off-by: Haiying Wang <Haiying.Wang@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/qbman_sys.h | 7 +------
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/qbman_sys.h b/drivers/bus/fslmc/qbman/qbman_sys.h
index 9ea55de..47da595 100644
--- a/drivers/bus/fslmc/qbman/qbman_sys.h
+++ b/drivers/bus/fslmc/qbman/qbman_sys.h
@@ -217,7 +217,6 @@ static inline void qbman_cena_write_complete_wo_shadow(struct qbman_swp_sys *s,
#ifdef QBMAN_CENA_TRACE
pr_info("qbman_cena_write_complete(%p:%d:0x%03x)\n",
s->addr_cena, s->idx, offset);
- hexdump(cmd, 64);
#endif
dcbf(s->addr_cena + offset);
}
@@ -251,11 +250,7 @@ static inline void *qbman_cena_read_wo_shadow(struct qbman_swp_sys *s,
{
#ifdef QBMAN_CENA_TRACE
pr_info("qbman_cena_read(%p:%d:0x%03x) %p\n",
- s->addr_cena, s->idx, offset, shadow);
-#endif
-
-#ifdef QBMAN_CENA_TRACE
- hexdump(shadow, 64);
+ s->addr_cena, s->idx, offset);
#endif
return s->addr_cena + offset;
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 06/27] bus/fslmc: qbman remove unused funcs and align names
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (4 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 05/27] bus/fslmc: enhance the QBMAN CENA mode Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-18 20:19 ` Ferruh Yigit
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 07/27] bus/fslmc: cleanup compat file Hemant Agrawal
` (22 subsequent siblings)
28 siblings, 1 reply; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
name alignment for check command and result functions
putting them as separate functions instead of changing the original
functions.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 146 ++--
drivers/bus/fslmc/qbman/qbman_portal.c | 731 ++++++++++-----------
drivers/bus/fslmc/qbman/qbman_portal.h | 6 +-
drivers/bus/fslmc/qbman/qbman_private.h | 2 +-
drivers/bus/fslmc/qbman/qbman_sys.h | 12 -
drivers/bus/fslmc/rte_bus_fslmc_version.map | 3 +-
drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 4 +-
drivers/net/dpaa2/dpaa2_rxtx.c | 10 +-
8 files changed, 449 insertions(+), 465 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
index fe1cc94..24a6d4b 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
@@ -194,11 +194,38 @@ void qbman_swp_interrupt_set_inhibit(struct qbman_swp *p, int inhibit);
/**
* struct qbman_result - structure for qbman dequeue response and/or
* notification.
- * @dont_manipulate_directly: the 16 32bit data to represent the whole
+ * @donot_manipulate_directly: the 16 32bit data to represent the whole
* possible qbman dequeue result.
*/
struct qbman_result {
- uint32_t dont_manipulate_directly[16];
+ union {
+ struct common {
+ uint8_t verb;
+ uint8_t reserved[63];
+ } common;
+ struct dq {
+ uint8_t verb;
+ uint8_t stat;
+ __le16 seqnum;
+ __le16 oprid;
+ uint8_t reserved;
+ uint8_t tok;
+ __le32 fqid;
+ uint32_t reserved2;
+ __le32 fq_byte_cnt;
+ __le32 fq_frm_cnt;
+ __le64 fqd_ctx;
+ uint8_t fd[32];
+ } dq;
+ struct scn {
+ uint8_t verb;
+ uint8_t stat;
+ uint8_t state;
+ uint8_t reserved;
+ __le32 rid_tok;
+ __le64 ctx;
+ } scn;
+ };
};
/* TODO:
@@ -254,11 +281,21 @@ void qbman_swp_push_set(struct qbman_swp *s, uint8_t channel_idx, int enable);
/**
* struct qbman_pull_desc - the structure for pull dequeue descriptor
- * @dont_manipulate_directly: the 6 32bit data to represent the whole
- * possible settings for pull dequeue descriptor.
*/
struct qbman_pull_desc {
- uint32_t dont_manipulate_directly[6];
+ union {
+ uint32_t donot_manipulate_directly[16];
+ struct pull {
+ uint8_t verb;
+ uint8_t numf;
+ uint8_t tok;
+ uint8_t reserved;
+ uint32_t dq_src;
+ uint64_t rsp_addr;
+ uint64_t rsp_addr_virt;
+ uint8_t padding[40];
+ } pull;
+ };
};
enum qbman_pull_type_e {
@@ -415,7 +452,20 @@ struct qbman_result *qbman_get_dqrr_from_idx(struct qbman_swp *s, uint8_t idx);
* dequeue result.
*/
int qbman_result_has_new_result(struct qbman_swp *s,
- const struct qbman_result *dq);
+ struct qbman_result *dq);
+
+/**
+ * qbman_check_command_complete() - Check if the previous issued dq commnd
+ * is completed and results are available in memory.
+ * @s: the software portal object.
+ * @dq: the dequeue result read from the memory.
+ *
+ * Return 1 for getting a valid dequeue result, or 0 for not getting a valid
+ * dequeue result.
+ */
+int qbman_check_command_complete(struct qbman_result *dq);
+
+int qbman_check_new_result(struct qbman_result *dq);
/* -------------------------------------------------------- */
/* Parsing dequeue entries (DQRR and user-provided storage) */
@@ -537,7 +587,7 @@ int qbman_result_is_FQPN(const struct qbman_result *dq);
*
* Return the state field.
*/
-uint32_t qbman_result_DQ_flags(const struct qbman_result *dq);
+uint8_t qbman_result_DQ_flags(const struct qbman_result *dq);
/**
* qbman_result_DQ_is_pull() - Check whether the dq response is from a pull
@@ -648,24 +698,6 @@ uint32_t qbman_result_SCN_rid(const struct qbman_result *scn);
*/
uint64_t qbman_result_SCN_ctx(const struct qbman_result *scn);
-/**
- * qbman_result_SCN_state_in_mem() - Get the state in notification written
- * in memory
- * @scn: the state change notification.
- *
- * Return the state.
- */
-uint8_t qbman_result_SCN_state_in_mem(const struct qbman_result *scn);
-
-/**
- * qbman_result_SCN_rid_in_mem() - Get the resource id in notification written
- * in memory.
- * @scn: the state change notification.
- *
- * Return the resource id.
- */
-uint32_t qbman_result_SCN_rid_in_mem(const struct qbman_result *scn);
-
/* Type-specific "resource IDs". Mainly for illustration purposes, though it
* also gives the appropriate type widths.
*/
@@ -746,22 +778,36 @@ uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn);
/* Enqueues */
/************/
-/**
- * struct qbman_eq_desc - structure of enqueue descriptor
- * @dont_manipulate_directly: the 8 32bit data to represent the whole
- * possible qbman enqueue setting in enqueue descriptor.
- */
+/* struct qbman_eq_desc - structure of enqueue descriptor */
struct qbman_eq_desc {
- uint32_t dont_manipulate_directly[8];
+ union {
+ uint32_t donot_manipulate_directly[8];
+ struct eq {
+ uint8_t verb;
+ uint8_t dca;
+ uint16_t seqnum;
+ uint16_t orpid;
+ uint16_t reserved1;
+ uint32_t tgtid;
+ uint32_t tag;
+ uint16_t qdbin;
+ uint8_t qpri;
+ uint8_t reserved[3];
+ uint8_t wae;
+ uint8_t rspid;
+ uint64_t rsp_addr;
+ uint8_t fd[32];
+ } eq;
+ };
};
/**
* struct qbman_eq_response - structure of enqueue response
- * @dont_manipulate_directly: the 16 32bit data to represent the whole
+ * @donot_manipulate_directly: the 16 32bit data to represent the whole
* enqueue response.
*/
struct qbman_eq_response {
- uint32_t dont_manipulate_directly[16];
+ uint32_t donot_manipulate_directly[16];
};
/**
@@ -801,7 +847,7 @@ void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success);
* sequeue number.
*/
void qbman_eq_desc_set_orp(struct qbman_eq_desc *d, int respond_success,
- uint32_t opr_id, uint32_t seqnum, int incomplete);
+ uint16_t opr_id, uint16_t seqnum, int incomplete);
/**
* qbman_eq_desc_set_orp_hole() - fill a hole in the order-restoration sequence
@@ -810,8 +856,8 @@ void qbman_eq_desc_set_orp(struct qbman_eq_desc *d, int respond_success,
* @opr_id: the order point record id.
* @seqnum: the order restoration sequence number.
*/
-void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint32_t opr_id,
- uint32_t seqnum);
+void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint16_t opr_id,
+ uint16_t seqnum);
/**
* qbman_eq_desc_set_orp_nesn() - advance NESN (Next Expected Sequence Number)
@@ -820,8 +866,8 @@ void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint32_t opr_id,
* @opr_id: the order point record id.
* @seqnum: the order restoration sequence number.
*/
-void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint32_t opr_id,
- uint32_t seqnum);
+void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint16_t opr_id,
+ uint16_t seqnum);
/**
* qbman_eq_desc_set_response() - Set the enqueue response info.
* @d: the enqueue descriptor
@@ -873,7 +919,7 @@ void qbman_eq_desc_set_fq(struct qbman_eq_desc *d, uint32_t fqid);
* @qd_prio: the queuing destination priority.
*/
void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,
- uint32_t qd_bin, uint32_t qd_prio);
+ uint16_t qd_bin, uint8_t qd_prio);
/**
* qbman_eq_desc_set_eqdi() - enable/disable EQDI interrupt
@@ -898,7 +944,7 @@ void qbman_eq_desc_set_eqdi(struct qbman_eq_desc *d, int enable);
* being rescheduled.)
*/
void qbman_eq_desc_set_dca(struct qbman_eq_desc *d, int enable,
- uint32_t dqrr_idx, int park);
+ uint8_t dqrr_idx, int park);
/**
* qbman_swp_enqueue() - Issue an enqueue command.
@@ -957,11 +1003,20 @@ int qbman_swp_enqueue_thresh(struct qbman_swp *s, unsigned int thresh);
/*******************/
/**
* struct qbman_release_desc - The structure for buffer release descriptor
- * @dont_manipulate_directly: the 32bit data to represent the whole
+ * @donot_manipulate_directly: the 32bit data to represent the whole
* possible settings of qbman release descriptor.
*/
struct qbman_release_desc {
- uint32_t dont_manipulate_directly[1];
+ union {
+ uint32_t donot_manipulate_directly[16];
+ struct br {
+ uint8_t verb;
+ uint8_t reserved;
+ uint16_t bpid;
+ uint32_t reserved2;
+ uint64_t buf[7];
+ } br;
+ };
};
/**
@@ -975,7 +1030,7 @@ void qbman_release_desc_clear(struct qbman_release_desc *d);
* qbman_release_desc_set_bpid() - Set the ID of the buffer pool to release to
* @d: the qbman release descriptor.
*/
-void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid);
+void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint16_t bpid);
/**
* qbman_release_desc_set_rcdi() - Determines whether or not the portal's RCDI
@@ -1018,7 +1073,7 @@ int qbman_swp_release_thresh(struct qbman_swp *s, unsigned int thresh);
* Return 0 for success, or negative error code if the acquire command
* fails.
*/
-int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,
+int qbman_swp_acquire(struct qbman_swp *s, uint16_t bpid, uint64_t *buffers,
unsigned int num_buffers);
/*****************/
@@ -1133,7 +1188,4 @@ int qbman_swp_CDAN_disable(struct qbman_swp *s, uint16_t channelid);
*/
int qbman_swp_CDAN_set_context_enable(struct qbman_swp *s, uint16_t channelid,
uint64_t ctx);
-
-int qbman_check_command_complete(struct qbman_swp *s,
- const struct qbman_result *dq);
#endif /* !_FSL_QBMAN_PORTAL_H */
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c
index 7fc78cd..cd903c1 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -69,21 +69,23 @@
/* Pre-defined attribute codes */
/*******************************/
-struct qb_attr_code code_generic_verb = QB_CODE(0, 0, 7);
-struct qb_attr_code code_generic_rslt = QB_CODE(0, 8, 8);
+#define QBMAN_RESPONSE_VERB_MASK 0x7f
/*************************/
/* SDQCR attribute codes */
/*************************/
+#define QB_SDQCR_FC_SHIFT 29
+#define QB_SDQCR_FC_MASK 0x1
+#define QB_SDQCR_DCT_SHIFT 24
+#define QB_SDQCR_DCT_MASK 0x3
+#define QB_SDQCR_TOK_SHIFT 16
+#define QB_SDQCR_TOK_MASK 0xff
+#define QB_SDQCR_SRC_SHIFT 0
+#define QB_SDQCR_SRC_MASK 0xffff
+
+/* opaque token for static dequeues */
+#define QMAN_SDQCR_TOKEN 0xbb
-/* we put these here because at least some of them are required by
- * qbman_swp_init()
- */
-struct qb_attr_code code_sdqcr_dct = QB_CODE(0, 24, 2);
-struct qb_attr_code code_sdqcr_fc = QB_CODE(0, 29, 1);
-struct qb_attr_code code_sdqcr_tok = QB_CODE(0, 16, 8);
-static struct qb_attr_code code_eq_dca_idx;
-#define CODE_SDQCR_DQSRC(n) QB_CODE(0, n, 1)
enum qbman_sdqcr_dct {
qbman_sdqcr_dct_null = 0,
qbman_sdqcr_dct_prio_ics,
@@ -96,13 +98,11 @@ enum qbman_sdqcr_fc {
qbman_sdqcr_fc_up_to_3 = 1
};
-struct qb_attr_code code_sdqcr_dqsrc = QB_CODE(0, 0, 16);
-
/* We need to keep track of which SWP triggered a pull command
* so keep an array of portal IDs and use the token field to
* be able to find the proper portal
*/
-#define MAX_QBMAN_PORTALS 35
+#define MAX_QBMAN_PORTALS 64
static struct qbman_swp *portal_idx_map[MAX_QBMAN_PORTALS];
/*********************************/
@@ -136,9 +136,10 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
#endif
p->mc.valid_bit = QB_VALID_BIT;
p->sdq = 0;
- qb_attr_code_encode(&code_sdqcr_dct, &p->sdq, qbman_sdqcr_dct_prio_ics);
- qb_attr_code_encode(&code_sdqcr_fc, &p->sdq, qbman_sdqcr_fc_up_to_3);
- qb_attr_code_encode(&code_sdqcr_tok, &p->sdq, 0xbb);
+ p->sdq |= qbman_sdqcr_dct_prio_ics << QB_SDQCR_DCT_SHIFT;
+ p->sdq |= qbman_sdqcr_fc_up_to_3 << QB_SDQCR_FC_SHIFT;
+ p->sdq |= QMAN_SDQCR_TOKEN << QB_SDQCR_TOK_SHIFT;
+
atomic_set(&p->vdq.busy, 1);
p->vdq.valid_bit = QB_VALID_BIT;
p->dqrr.next_idx = 0;
@@ -147,13 +148,9 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
if ((qman_version & 0xFFFF0000) < QMAN_REV_4100) {
p->dqrr.dqrr_size = 4;
p->dqrr.reset_bug = 1;
- /* Set size of DQRR to 4, encoded in 2 bits */
- code_eq_dca_idx = (struct qb_attr_code)QB_CODE(0, 8, 2);
} else {
p->dqrr.dqrr_size = 8;
p->dqrr.reset_bug = 0;
- /* Set size of DQRR to 8, encoded in 3 bits */
- code_eq_dca_idx = (struct qb_attr_code)QB_CODE(0, 8, 3);
}
ret = qbman_swp_sys_init(&p->sys, d, p->dqrr.dqrr_size);
@@ -165,7 +162,7 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
/* SDQCR needs to be initialized to 0 when no channels are
* being dequeued from or else the QMan HW will indicate an
* error. The values that were calculated above will be
- * applied when dequeues from a specific channel are enabled
+ * applied when dequeues from a specific channel are enabled.
*/
qbman_cinh_write(&p->sys, QBMAN_CINH_SWP_SDQCR, 0);
eqcr_pi = qbman_cinh_read(&p->sys, QBMAN_CINH_SWP_EQCR_PI);
@@ -280,9 +277,9 @@ void *qbman_swp_mc_start(struct qbman_swp *p)
return ret;
}
-void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb)
+void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint8_t cmd_verb)
{
- uint32_t *v = cmd;
+ uint8_t *v = cmd;
#ifdef QBMAN_CHECKING
QBMAN_BUG_ON(!(p->mc.check != swp_mc_can_submit));
#endif
@@ -323,35 +320,22 @@ void *qbman_swp_mc_result(struct qbman_swp *p)
/* Enqueue */
/***********/
-/* These should be const, eventually */
-static struct qb_attr_code code_eq_cmd = QB_CODE(0, 0, 2);
-static struct qb_attr_code code_eq_eqdi = QB_CODE(0, 3, 1);
-static struct qb_attr_code code_eq_dca_en = QB_CODE(0, 15, 1);
-static struct qb_attr_code code_eq_dca_pk = QB_CODE(0, 14, 1);
-/* Can't set code_eq_dca_idx width. Need qman version. Read at runtime */
-static struct qb_attr_code code_eq_orp_en = QB_CODE(0, 2, 1);
-static struct qb_attr_code code_eq_orp_is_nesn = QB_CODE(0, 31, 1);
-static struct qb_attr_code code_eq_orp_nlis = QB_CODE(0, 30, 1);
-static struct qb_attr_code code_eq_orp_seqnum = QB_CODE(0, 16, 14);
-static struct qb_attr_code code_eq_opr_id = QB_CODE(1, 0, 16);
-static struct qb_attr_code code_eq_tgt_id = QB_CODE(2, 0, 24);
-/* static struct qb_attr_code code_eq_tag = QB_CODE(3, 0, 32); */
-static struct qb_attr_code code_eq_qd_en = QB_CODE(0, 4, 1);
-static struct qb_attr_code code_eq_qd_bin = QB_CODE(4, 0, 16);
-static struct qb_attr_code code_eq_qd_pri = QB_CODE(4, 16, 4);
-static struct qb_attr_code code_eq_rsp_stash = QB_CODE(5, 16, 1);
-static struct qb_attr_code code_eq_rsp_id = QB_CODE(5, 24, 8);
-static struct qb_attr_code code_eq_rsp_lo = QB_CODE(6, 0, 32);
-
-enum qbman_eq_cmd_e {
- /* No enqueue, primarily for plugging ORP gaps for dropped frames */
- qbman_eq_cmd_empty,
- /* DMA an enqueue response once complete */
- qbman_eq_cmd_respond,
- /* DMA an enqueue response only if the enqueue fails */
- qbman_eq_cmd_respond_reject
+#define QB_ENQUEUE_CMD_OPTIONS_SHIFT 0
+enum qb_enqueue_commands {
+ enqueue_empty = 0,
+ enqueue_response_always = 1,
+ enqueue_rejects_to_fq = 2
};
+#define QB_ENQUEUE_CMD_EC_OPTION_MASK 0x3
+#define QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT 2
+#define QB_ENQUEUE_CMD_IRQ_ON_DISPATCH_SHIFT 3
+#define QB_ENQUEUE_CMD_TARGET_TYPE_SHIFT 4
+#define QB_ENQUEUE_CMD_DCA_PK_SHIFT 6
+#define QB_ENQUEUE_CMD_DCA_EN_SHIFT 7
+#define QB_ENQUEUE_CMD_NLIS_SHIFT 14
+#define QB_ENQUEUE_CMD_IS_NESN_SHIFT 15
+
void qbman_eq_desc_clear(struct qbman_eq_desc *d)
{
memset(d, 0, sizeof(*d));
@@ -359,115 +343,110 @@ void qbman_eq_desc_clear(struct qbman_eq_desc *d)
void qbman_eq_desc_set_no_orp(struct qbman_eq_desc *d, int respond_success)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_orp_en, cl, 0);
- qb_attr_code_encode(&code_eq_cmd, cl,
- respond_success ? qbman_eq_cmd_respond :
- qbman_eq_cmd_respond_reject);
+ d->eq.verb &= ~(1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT);
+ if (respond_success)
+ d->eq.verb |= enqueue_response_always;
+ else
+ d->eq.verb |= enqueue_rejects_to_fq;
}
void qbman_eq_desc_set_orp(struct qbman_eq_desc *d, int respond_success,
- uint32_t opr_id, uint32_t seqnum, int incomplete)
+ uint16_t opr_id, uint16_t seqnum, int incomplete)
{
- uint32_t *cl = qb_cl(d);
+ d->eq.verb |= 1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT;
+ if (respond_success)
+ d->eq.verb |= enqueue_response_always;
+ else
+ d->eq.verb |= enqueue_rejects_to_fq;
- qb_attr_code_encode(&code_eq_orp_en, cl, 1);
- qb_attr_code_encode(&code_eq_cmd, cl,
- respond_success ? qbman_eq_cmd_respond :
- qbman_eq_cmd_respond_reject);
- qb_attr_code_encode(&code_eq_opr_id, cl, opr_id);
- qb_attr_code_encode(&code_eq_orp_seqnum, cl, seqnum);
- qb_attr_code_encode(&code_eq_orp_nlis, cl, !!incomplete);
+ d->eq.orpid = opr_id;
+ d->eq.seqnum = seqnum;
+ if (incomplete)
+ d->eq.seqnum |= 1 << QB_ENQUEUE_CMD_NLIS_SHIFT;
+ else
+ d->eq.seqnum &= ~(1 << QB_ENQUEUE_CMD_NLIS_SHIFT);
}
-void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint32_t opr_id,
- uint32_t seqnum)
+void qbman_eq_desc_set_orp_hole(struct qbman_eq_desc *d, uint16_t opr_id,
+ uint16_t seqnum)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_orp_en, cl, 1);
- qb_attr_code_encode(&code_eq_cmd, cl, qbman_eq_cmd_empty);
- qb_attr_code_encode(&code_eq_opr_id, cl, opr_id);
- qb_attr_code_encode(&code_eq_orp_seqnum, cl, seqnum);
- qb_attr_code_encode(&code_eq_orp_nlis, cl, 0);
- qb_attr_code_encode(&code_eq_orp_is_nesn, cl, 0);
+ d->eq.verb |= 1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT;
+ d->eq.verb &= ~QB_ENQUEUE_CMD_EC_OPTION_MASK;
+ d->eq.orpid = opr_id;
+ d->eq.seqnum = seqnum;
+ d->eq.seqnum &= ~(1 << QB_ENQUEUE_CMD_NLIS_SHIFT);
+ d->eq.seqnum &= ~(1 << QB_ENQUEUE_CMD_IS_NESN_SHIFT);
}
-void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint32_t opr_id,
- uint32_t seqnum)
+void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint16_t opr_id,
+ uint16_t seqnum)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_orp_en, cl, 1);
- qb_attr_code_encode(&code_eq_cmd, cl, qbman_eq_cmd_empty);
- qb_attr_code_encode(&code_eq_opr_id, cl, opr_id);
- qb_attr_code_encode(&code_eq_orp_seqnum, cl, seqnum);
- qb_attr_code_encode(&code_eq_orp_nlis, cl, 0);
- qb_attr_code_encode(&code_eq_orp_is_nesn, cl, 1);
+ d->eq.verb |= 1 << QB_ENQUEUE_CMD_ORP_ENABLE_SHIFT;
+ d->eq.verb &= ~QB_ENQUEUE_CMD_EC_OPTION_MASK;
+ d->eq.orpid = opr_id;
+ d->eq.seqnum = seqnum;
+ d->eq.seqnum &= ~(1 << QB_ENQUEUE_CMD_NLIS_SHIFT);
+ d->eq.seqnum |= 1 << QB_ENQUEUE_CMD_IS_NESN_SHIFT;
}
void qbman_eq_desc_set_response(struct qbman_eq_desc *d,
dma_addr_t storage_phys,
int stash)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode_64(&code_eq_rsp_lo, (uint64_t *)cl, storage_phys);
- qb_attr_code_encode(&code_eq_rsp_stash, cl, !!stash);
+ d->eq.rsp_addr = storage_phys;
+ d->eq.wae = stash;
}
void qbman_eq_desc_set_token(struct qbman_eq_desc *d, uint8_t token)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_rsp_id, cl, (uint32_t)token);
+ d->eq.rspid = token;
}
void qbman_eq_desc_set_fq(struct qbman_eq_desc *d, uint32_t fqid)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_qd_en, cl, 0);
- qb_attr_code_encode(&code_eq_tgt_id, cl, fqid);
+ d->eq.verb &= ~(1 << QB_ENQUEUE_CMD_TARGET_TYPE_SHIFT);
+ d->eq.tgtid = fqid;
}
void qbman_eq_desc_set_qd(struct qbman_eq_desc *d, uint32_t qdid,
- uint32_t qd_bin, uint32_t qd_prio)
+ uint16_t qd_bin, uint8_t qd_prio)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_qd_en, cl, 1);
- qb_attr_code_encode(&code_eq_tgt_id, cl, qdid);
- qb_attr_code_encode(&code_eq_qd_bin, cl, qd_bin);
- qb_attr_code_encode(&code_eq_qd_pri, cl, qd_prio);
+ d->eq.verb |= 1 << QB_ENQUEUE_CMD_TARGET_TYPE_SHIFT;
+ d->eq.tgtid = qdid;
+ d->eq.qdbin = qd_bin;
+ d->eq.qpri = qd_prio;
}
void qbman_eq_desc_set_eqdi(struct qbman_eq_desc *d, int enable)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_eqdi, cl, !!enable);
+ if (enable)
+ d->eq.verb |= 1 << QB_ENQUEUE_CMD_IRQ_ON_DISPATCH_SHIFT;
+ else
+ d->eq.verb &= ~(1 << QB_ENQUEUE_CMD_IRQ_ON_DISPATCH_SHIFT);
}
void qbman_eq_desc_set_dca(struct qbman_eq_desc *d, int enable,
- uint32_t dqrr_idx, int park)
+ uint8_t dqrr_idx, int park)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_eq_dca_en, cl, !!enable);
if (enable) {
- qb_attr_code_encode(&code_eq_dca_pk, cl, !!park);
- qb_attr_code_encode(&code_eq_dca_idx, cl, dqrr_idx);
+ d->eq.dca = dqrr_idx;
+ if (park)
+ d->eq.dca |= 1 << QB_ENQUEUE_CMD_DCA_PK_SHIFT;
+ else
+ d->eq.dca &= ~(1 << QB_ENQUEUE_CMD_DCA_PK_SHIFT);
+ d->eq.dca |= 1 << QB_ENQUEUE_CMD_DCA_EN_SHIFT;
+ } else {
+ d->eq.dca &= ~(1 << QB_ENQUEUE_CMD_DCA_EN_SHIFT);
}
}
#define EQAR_IDX(eqar) ((eqar) & 0x7)
#define EQAR_VB(eqar) ((eqar) & 0x80)
#define EQAR_SUCCESS(eqar) ((eqar) & 0x100)
+
static int qbman_swp_enqueue_array_mode(struct qbman_swp *s,
const struct qbman_eq_desc *d,
- const struct qbman_fd *fd)
+ const struct qbman_fd *fd)
{
uint32_t *p;
const uint32_t *cl = qb_cl(d);
@@ -477,20 +456,20 @@ static int qbman_swp_enqueue_array_mode(struct qbman_swp *s,
if (!EQAR_SUCCESS(eqar))
return -EBUSY;
p = qbman_cena_write_start_wo_shadow(&s->sys,
- QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
+ QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
memcpy(&p[1], &cl[1], 28);
memcpy(&p[8], fd, sizeof(*fd));
/* Set the verb byte, have to substitute in the valid-bit */
lwsync();
p[0] = cl[0] | EQAR_VB(eqar);
qbman_cena_write_complete_wo_shadow(&s->sys,
- QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
+ QBMAN_CENA_SWP_EQCR(EQAR_IDX(eqar)));
return 0;
}
static int qbman_swp_enqueue_ring_mode(struct qbman_swp *s,
const struct qbman_eq_desc *d,
- const struct qbman_fd *fd)
+ const struct qbman_fd *fd)
{
uint32_t *p;
const uint32_t *cl = qb_cl(d);
@@ -509,19 +488,21 @@ static int qbman_swp_enqueue_ring_mode(struct qbman_swp *s,
}
p = qbman_cena_write_start_wo_shadow(&s->sys,
- QBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));
+ QBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));
memcpy(&p[1], &cl[1], 28);
memcpy(&p[8], fd, sizeof(*fd));
lwsync();
+
/* Set the verb byte, have to substitute in the valid-bit */
p[0] = cl[0] | s->eqcr.pi_vb;
qbman_cena_write_complete_wo_shadow(&s->sys,
- QBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));
+ QBMAN_CENA_SWP_EQCR(s->eqcr.pi & 7));
s->eqcr.pi++;
s->eqcr.pi &= 0xF;
s->eqcr.available--;
if (!(s->eqcr.pi & 7))
s->eqcr.pi_vb ^= QB_VALID_BIT;
+
return 0;
}
@@ -672,23 +653,26 @@ int qbman_swp_enqueue_multiple_desc(struct qbman_swp *s,
void qbman_swp_push_get(struct qbman_swp *s, uint8_t channel_idx, int *enabled)
{
- struct qb_attr_code code = CODE_SDQCR_DQSRC(channel_idx);
+ uint16_t src = (s->sdq >> QB_SDQCR_SRC_SHIFT) & QB_SDQCR_SRC_MASK;
QBMAN_BUG_ON(channel_idx > 15);
- *enabled = (int)qb_attr_code_decode(&code, &s->sdq);
+ *enabled = src | (1 << channel_idx);
}
void qbman_swp_push_set(struct qbman_swp *s, uint8_t channel_idx, int enable)
{
uint16_t dqsrc;
- struct qb_attr_code code = CODE_SDQCR_DQSRC(channel_idx);
QBMAN_BUG_ON(channel_idx > 15);
- qb_attr_code_encode(&code, &s->sdq, !!enable);
+ if (enable)
+ s->sdq |= 1 << channel_idx;
+ else
+ s->sdq &= ~(1 << channel_idx);
+
/* Read make the complete src map. If no channels are enabled
* the SDQCR must be 0 or else QMan will assert errors
*/
- dqsrc = (uint16_t)qb_attr_code_decode(&code_sdqcr_dqsrc, &s->sdq);
+ dqsrc = (s->sdq >> QB_SDQCR_SRC_SHIFT) & QB_SDQCR_SRC_MASK;
if (dqsrc != 0)
qbman_cinh_write(&s->sys, QBMAN_CINH_SWP_SDQCR, s->sdq);
else
@@ -700,14 +684,10 @@ void qbman_swp_push_set(struct qbman_swp *s, uint8_t channel_idx, int enable)
/***************************/
/* These should be const, eventually */
-static struct qb_attr_code code_pull_dct = QB_CODE(0, 0, 2);
-static struct qb_attr_code code_pull_dt = QB_CODE(0, 2, 2);
-static struct qb_attr_code code_pull_rls = QB_CODE(0, 4, 1);
-static struct qb_attr_code code_pull_stash = QB_CODE(0, 5, 1);
-static struct qb_attr_code code_pull_numframes = QB_CODE(0, 8, 5);
-static struct qb_attr_code code_pull_token = QB_CODE(0, 16, 8);
-static struct qb_attr_code code_pull_dqsource = QB_CODE(1, 0, 24);
-static struct qb_attr_code code_pull_rsp_lo = QB_CODE(2, 0, 32);
+#define QB_VDQCR_VERB_DCT_SHIFT 0
+#define QB_VDQCR_VERB_DT_SHIFT 2
+#define QB_VDQCR_VERB_RLS_SHIFT 4
+#define QB_VDQCR_VERB_WAE_SHIFT 5
enum qb_pull_dt_e {
qb_pull_dt_channel,
@@ -725,62 +705,52 @@ void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
dma_addr_t storage_phys,
int stash)
{
- uint32_t *cl = qb_cl(d);
- /* Squiggle the pointer 'storage' into the extra 2 words of the
- * descriptor (which aren't copied to the hw command)
- */
- *(void **)&cl[4] = storage;
+ d->pull.rsp_addr_virt = (uint64_t)storage;
+
if (!storage) {
- qb_attr_code_encode(&code_pull_rls, cl, 0);
+ d->pull.verb &= ~(1 << QB_VDQCR_VERB_RLS_SHIFT);
return;
}
- qb_attr_code_encode(&code_pull_rls, cl, 1);
- qb_attr_code_encode(&code_pull_stash, cl, !!stash);
- qb_attr_code_encode_64(&code_pull_rsp_lo, (uint64_t *)cl, storage_phys);
+ d->pull.verb |= 1 << QB_VDQCR_VERB_RLS_SHIFT;
+ if (stash)
+ d->pull.verb |= 1 << QB_VDQCR_VERB_WAE_SHIFT;
+ else
+ d->pull.verb &= ~(1 << QB_VDQCR_VERB_WAE_SHIFT);
+
+ d->pull.rsp_addr = storage_phys;
}
void qbman_pull_desc_set_numframes(struct qbman_pull_desc *d, uint8_t numframes)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_pull_numframes, cl,
- (uint32_t)(numframes - 1));
+ d->pull.numf = numframes - 1;
}
void qbman_pull_desc_set_token(struct qbman_pull_desc *d, uint8_t token)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_pull_token, cl, token);
+ d->pull.tok = token;
}
void qbman_pull_desc_set_fq(struct qbman_pull_desc *d, uint32_t fqid)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_pull_dct, cl, 1);
- qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_framequeue);
- qb_attr_code_encode(&code_pull_dqsource, cl, fqid);
+ d->pull.verb |= 1 << QB_VDQCR_VERB_DCT_SHIFT;
+ d->pull.verb |= qb_pull_dt_framequeue << QB_VDQCR_VERB_DT_SHIFT;
+ d->pull.dq_src = fqid;
}
void qbman_pull_desc_set_wq(struct qbman_pull_desc *d, uint32_t wqid,
enum qbman_pull_type_e dct)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_pull_dct, cl, dct);
- qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_workqueue);
- qb_attr_code_encode(&code_pull_dqsource, cl, wqid);
+ d->pull.verb |= dct << QB_VDQCR_VERB_DCT_SHIFT;
+ d->pull.verb |= qb_pull_dt_workqueue << QB_VDQCR_VERB_DT_SHIFT;
+ d->pull.dq_src = wqid;
}
void qbman_pull_desc_set_channel(struct qbman_pull_desc *d, uint32_t chid,
enum qbman_pull_type_e dct)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_pull_dct, cl, dct);
- qb_attr_code_encode(&code_pull_dt, cl, qb_pull_dt_channel);
- qb_attr_code_encode(&code_pull_dqsource, cl, chid);
+ d->pull.verb |= dct << QB_VDQCR_VERB_DCT_SHIFT;
+ d->pull.verb |= qb_pull_dt_channel << QB_VDQCR_VERB_DT_SHIFT;
+ d->pull.dq_src = chid;
}
int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
@@ -792,18 +762,18 @@ int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
atomic_inc(&s->vdq.busy);
return -EBUSY;
}
- s->vdq.storage = *(void **)&cl[4];
- /* We use portal index +1 as token so that 0 still indicates
- * that the result isn't valid yet.
- */
- qb_attr_code_encode(&code_pull_token, cl, s->desc.idx + 1);
+
+ d->pull.tok = s->sys.idx + 1;
+ s->vdq.storage = (void *)d->pull.rsp_addr_virt;
p = qbman_cena_write_start_wo_shadow(&s->sys, QBMAN_CENA_SWP_VDQCR);
memcpy(&p[1], &cl[1], 12);
+
/* Set the verb byte, have to substitute in the valid-bit */
lwsync();
p[0] = cl[0] | s->vdq.valid_bit;
s->vdq.valid_bit ^= QB_VALID_BIT;
qbman_cena_write_complete_wo_shadow(&s->sys, QBMAN_CENA_SWP_VDQCR);
+
return 0;
}
@@ -811,16 +781,7 @@ int qbman_swp_pull(struct qbman_swp *s, struct qbman_pull_desc *d)
/* Polling DQRR */
/****************/
-static struct qb_attr_code code_dqrr_verb = QB_CODE(0, 0, 8);
-static struct qb_attr_code code_dqrr_response = QB_CODE(0, 0, 7);
-static struct qb_attr_code code_dqrr_stat = QB_CODE(0, 8, 8);
-static struct qb_attr_code code_dqrr_seqnum = QB_CODE(0, 16, 14);
-static struct qb_attr_code code_dqrr_odpid = QB_CODE(1, 0, 16);
-/* static struct qb_attr_code code_dqrr_tok = QB_CODE(1, 24, 8); */
-static struct qb_attr_code code_dqrr_fqid = QB_CODE(2, 0, 24);
-static struct qb_attr_code code_dqrr_byte_count = QB_CODE(4, 0, 32);
-static struct qb_attr_code code_dqrr_frame_count = QB_CODE(5, 0, 24);
-static struct qb_attr_code code_dqrr_ctx_lo = QB_CODE(6, 0, 32);
+#define QMAN_DQRR_PI_MASK 0xf
#define QBMAN_RESULT_DQ 0x60
#define QBMAN_RESULT_FQRN 0x21
@@ -833,8 +794,6 @@ static struct qb_attr_code code_dqrr_ctx_lo = QB_CODE(6, 0, 32);
#define QBMAN_RESULT_BPSCN 0x29
#define QBMAN_RESULT_CSCN_WQ 0x2a
-static struct qb_attr_code code_dqpi_pi = QB_CODE(0, 0, 4);
-
/* NULL return if there are no unconsumed DQRR entries. Returns a DQRR entry
* only once, so repeated calls can return a sequence of DQRR entries, without
* requiring they be consumed immediately or in any particular order.
@@ -844,8 +803,7 @@ const struct qbman_result *qbman_swp_dqrr_next(struct qbman_swp *s)
uint32_t verb;
uint32_t response_verb;
uint32_t flags;
- const struct qbman_result *dq;
- const uint32_t *p;
+ const struct qbman_result *p;
/* Before using valid-bit to detect if something is there, we have to
* handle the case of the DQRR reset bug...
@@ -858,11 +816,13 @@ const struct qbman_result *qbman_swp_dqrr_next(struct qbman_swp *s)
* will be much less efficient than all subsequent trips around
* it...
*/
- uint32_t dqpi = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_DQPI);
- uint32_t pi = qb_attr_code_decode(&code_dqpi_pi, &dqpi);
+ uint8_t pi = qbman_cinh_read(&s->sys, QBMAN_CINH_SWP_DQPI) &
+ QMAN_DQRR_PI_MASK;
+
/* there are new entries if pi != next_idx */
if (pi == s->dqrr.next_idx)
return NULL;
+
/* if next_idx is/was the last ring index, and 'pi' is
* different, we can disable the workaround as all the ring
* entries have now been DMA'd to so valid-bit checking is
@@ -877,12 +837,12 @@ const struct qbman_result *qbman_swp_dqrr_next(struct qbman_swp *s)
s->dqrr.reset_bug = 0;
}
qbman_cena_invalidate_prefetch(&s->sys,
- QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
+ QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
}
- dq = qbman_cena_read_wo_shadow(&s->sys,
- QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
- p = qb_cl(dq);
- verb = qb_attr_code_decode(&code_dqrr_verb, p);
+ p = qbman_cena_read_wo_shadow(&s->sys,
+ QBMAN_CENA_SWP_DQRR(s->dqrr.next_idx));
+ verb = p->dq.verb;
+
/* If the valid-bit isn't of the expected polarity, nothing there. Note,
* in the DQRR reset bug workaround, we shouldn't need to skip these
* check, because we've already determined that a new entry is available
@@ -902,16 +862,16 @@ const struct qbman_result *qbman_swp_dqrr_next(struct qbman_swp *s)
s->dqrr.valid_bit ^= QB_VALID_BIT;
}
/* If this is the final response to a volatile dequeue command
- * indicate that the vdq is no longer busy.
+ * indicate that the vdq is no longer busy
*/
- flags = qbman_result_DQ_flags(dq);
- response_verb = qb_attr_code_decode(&code_dqrr_response, &verb);
+ flags = p->dq.stat;
+ response_verb = verb & QBMAN_RESPONSE_VERB_MASK;
if ((response_verb == QBMAN_RESULT_DQ) &&
(flags & QBMAN_DQ_STAT_VOLATILE) &&
(flags & QBMAN_DQ_STAT_EXPIRED))
atomic_inc(&s->vdq.busy);
- return dq;
+ return p;
}
/* Consume DQRR entries previously returned from qbman_swp_dqrr_next(). */
@@ -924,80 +884,69 @@ void qbman_swp_dqrr_consume(struct qbman_swp *s,
/*********************************/
/* Polling user-provided storage */
/*********************************/
-
-int qbman_result_has_new_result(__attribute__((unused)) struct qbman_swp *s,
- const struct qbman_result *dq)
+int qbman_result_has_new_result(struct qbman_swp *s,
+ struct qbman_result *dq)
{
- /* To avoid converting the little-endian DQ entry to host-endian prior
- * to us knowing whether there is a valid entry or not (and run the
- * risk of corrupting the incoming hardware LE write), we detect in
- * hardware endianness rather than host. This means we need a different
- * "code" depending on whether we are BE or LE in software, which is
- * where DQRR_TOK_OFFSET comes in...
+ if (dq->dq.tok == 0)
+ return 0;
+
+ /*
+ * Set token to be 0 so we will detect change back to 1
+ * next time the looping is traversed. Const is cast away here
+ * as we want users to treat the dequeue responses as read only.
*/
- static struct qb_attr_code code_dqrr_tok_detect =
- QB_CODE(0, DQRR_TOK_OFFSET, 8);
- /* The user trying to poll for a result treats "dq" as const. It is
- * however the same address that was provided to us non-const in the
- * first place, for directing hardware DMA to. So we can cast away the
- * const because it is mutable from our perspective.
+ ((struct qbman_result *)dq)->dq.tok = 0;
+
+ /*
+ * VDQCR "no longer busy" hook - not quite the same as DQRR, because the
+ * fact "VDQCR" shows busy doesn't mean that we hold the result that
+ * makes it available. Eg. we may be looking at our 10th dequeue result,
+ * having released VDQCR after the 1st result and it is now busy due to
+ * some other command!
*/
- uint32_t *p = (uint32_t *)(unsigned long)qb_cl(dq);
- uint32_t token;
+ if (s->vdq.storage == dq) {
+ s->vdq.storage = NULL;
+ atomic_inc(&s->vdq.busy);
+ }
+
+ return 1;
+}
- token = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]);
- if (token == 0)
+int qbman_check_new_result(struct qbman_result *dq)
+{
+ if (dq->dq.tok == 0)
return 0;
- /* Entry is valid - overwrite token back to 0 so
- * a) If this memory is reused tokesn will be 0
- * b) If someone calls "has_new_result()" again on this entry it
- * will not appear to be new
- */
- qb_attr_code_encode(&code_dqrr_tok_detect, &p[1], 0);
- /* Only now do we convert from hardware to host endianness. Also, as we
- * are returning success, the user has promised not to call us again, so
- * there's no risk of us converting the endianness twice...
+ /*
+ * Set token to be 0 so we will detect change back to 1
+ * next time the looping is traversed. Const is cast away here
+ * as we want users to treat the dequeue responses as read only.
*/
- make_le32_n(p, 16);
+ ((struct qbman_result *)dq)->dq.tok = 0;
+
return 1;
}
-int qbman_check_command_complete(struct qbman_swp *s,
- const struct qbman_result *dq)
+int qbman_check_command_complete(struct qbman_result *dq)
{
- /* To avoid converting the little-endian DQ entry to host-endian prior
- * to us knowing whether there is a valid entry or not (and run the
- * risk of corrupting the incoming hardware LE write), we detect in
- * hardware endianness rather than host. This means we need a different
- * "code" depending on whether we are BE or LE in software, which is
- * where DQRR_TOK_OFFSET comes in...
- */
- static struct qb_attr_code code_dqrr_tok_detect =
- QB_CODE(0, DQRR_TOK_OFFSET, 8);
- /* The user trying to poll for a result treats "dq" as const. It is
- * however the same address that was provided to us non-const in the
- * first place, for directing hardware DMA to. So we can cast away the
- * const because it is mutable from our perspective.
- */
- uint32_t *p = (uint32_t *)(unsigned long)qb_cl(dq);
- uint32_t token;
+ struct qbman_swp *s;
- token = qb_attr_code_decode(&code_dqrr_tok_detect, &p[1]);
- if (token == 0)
+ if (dq->dq.tok == 0)
return 0;
- /* TODO: Remove qbman_swp from parameters and make it a local
- * once we've tested the reserve portal map change
- */
- s = portal_idx_map[token - 1];
- /* When token is set it indicates that VDQ command has been fetched
- * by qbman and is working on it. It is safe for software to issue
- * another VDQ command, so incrementing the busy variable.
+
+ s = portal_idx_map[dq->dq.tok - 1];
+ /*
+ * VDQCR "no longer busy" hook - not quite the same as DQRR, because the
+ * fact "VDQCR" shows busy doesn't mean that we hold the result that
+ * makes it available. Eg. we may be looking at our 10th dequeue result,
+ * having released VDQCR after the 1st result and it is now busy due to
+ * some other command!
*/
if (s->vdq.storage == dq) {
s->vdq.storage = NULL;
atomic_inc(&s->vdq.busy);
}
+
return 1;
}
@@ -1005,23 +954,10 @@ int qbman_check_command_complete(struct qbman_swp *s,
/* Categorising qbman results */
/********************************/
-static struct qb_attr_code code_result_in_mem =
- QB_CODE(0, QBMAN_RESULT_VERB_OFFSET_IN_MEM, 7);
-
static inline int __qbman_result_is_x(const struct qbman_result *dq,
- uint32_t x)
-{
- const uint32_t *p = qb_cl(dq);
- uint32_t response_verb = qb_attr_code_decode(&code_dqrr_response, p);
-
- return (response_verb == x);
-}
-
-static inline int __qbman_result_is_x_in_mem(const struct qbman_result *dq,
- uint32_t x)
+ uint8_t x)
{
- const uint32_t *p = qb_cl(dq);
- uint32_t response_verb = qb_attr_code_decode(&code_result_in_mem, p);
+ uint8_t response_verb = dq->dq.verb & QBMAN_RESPONSE_VERB_MASK;
return (response_verb == x);
}
@@ -1043,28 +979,28 @@ int qbman_result_is_CDAN(const struct qbman_result *dq)
int qbman_result_is_CSCN(const struct qbman_result *dq)
{
- return __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_CSCN_MEM) ||
+ return __qbman_result_is_x(dq, QBMAN_RESULT_CSCN_MEM) ||
__qbman_result_is_x(dq, QBMAN_RESULT_CSCN_WQ);
}
int qbman_result_is_BPSCN(const struct qbman_result *dq)
{
- return __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_BPSCN);
+ return __qbman_result_is_x(dq, QBMAN_RESULT_BPSCN);
}
int qbman_result_is_CGCU(const struct qbman_result *dq)
{
- return __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_CGCU);
+ return __qbman_result_is_x(dq, QBMAN_RESULT_CGCU);
}
int qbman_result_is_FQRN(const struct qbman_result *dq)
{
- return __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_FQRN);
+ return __qbman_result_is_x(dq, QBMAN_RESULT_FQRN);
}
int qbman_result_is_FQRNI(const struct qbman_result *dq)
{
- return __qbman_result_is_x_in_mem(dq, QBMAN_RESULT_FQRNI);
+ return __qbman_result_is_x(dq, QBMAN_RESULT_FQRNI);
}
int qbman_result_is_FQPN(const struct qbman_result *dq)
@@ -1078,109 +1014,62 @@ int qbman_result_is_FQPN(const struct qbman_result *dq)
/* These APIs assume qbman_result_is_DQ() is TRUE */
-uint32_t qbman_result_DQ_flags(const struct qbman_result *dq)
+uint8_t qbman_result_DQ_flags(const struct qbman_result *dq)
{
- const uint32_t *p = qb_cl(dq);
-
- return qb_attr_code_decode(&code_dqrr_stat, p);
+ return dq->dq.stat;
}
uint16_t qbman_result_DQ_seqnum(const struct qbman_result *dq)
{
- const uint32_t *p = qb_cl(dq);
-
- return (uint16_t)qb_attr_code_decode(&code_dqrr_seqnum, p);
+ return dq->dq.seqnum;
}
uint16_t qbman_result_DQ_odpid(const struct qbman_result *dq)
{
- const uint32_t *p = qb_cl(dq);
-
- return (uint16_t)qb_attr_code_decode(&code_dqrr_odpid, p);
+ return dq->dq.oprid;
}
uint32_t qbman_result_DQ_fqid(const struct qbman_result *dq)
{
- const uint32_t *p = qb_cl(dq);
-
- return qb_attr_code_decode(&code_dqrr_fqid, p);
+ return dq->dq.fqid;
}
uint32_t qbman_result_DQ_byte_count(const struct qbman_result *dq)
{
- const uint32_t *p = qb_cl(dq);
-
- return qb_attr_code_decode(&code_dqrr_byte_count, p);
+ return dq->dq.fq_byte_cnt;
}
uint32_t qbman_result_DQ_frame_count(const struct qbman_result *dq)
{
- const uint32_t *p = qb_cl(dq);
-
- return qb_attr_code_decode(&code_dqrr_frame_count, p);
+ return dq->dq.fq_frm_cnt;
}
uint64_t qbman_result_DQ_fqd_ctx(const struct qbman_result *dq)
{
- const uint64_t *p = (const uint64_t *)qb_cl(dq);
-
- return qb_attr_code_decode_64(&code_dqrr_ctx_lo, p);
+ return dq->dq.fqd_ctx;
}
const struct qbman_fd *qbman_result_DQ_fd(const struct qbman_result *dq)
{
- const uint32_t *p = qb_cl(dq);
-
- return (const struct qbman_fd *)&p[8];
+ return (const struct qbman_fd *)&dq->dq.fd[0];
}
/**************************************/
/* Parsing state-change notifications */
/**************************************/
-
-static struct qb_attr_code code_scn_state = QB_CODE(0, 16, 8);
-static struct qb_attr_code code_scn_rid = QB_CODE(1, 0, 24);
-static struct qb_attr_code code_scn_state_in_mem =
- QB_CODE(0, SCN_STATE_OFFSET_IN_MEM, 8);
-static struct qb_attr_code code_scn_rid_in_mem =
- QB_CODE(1, SCN_RID_OFFSET_IN_MEM, 24);
-static struct qb_attr_code code_scn_ctx_lo = QB_CODE(2, 0, 32);
-
uint8_t qbman_result_SCN_state(const struct qbman_result *scn)
{
- const uint32_t *p = qb_cl(scn);
-
- return (uint8_t)qb_attr_code_decode(&code_scn_state, p);
+ return scn->scn.state;
}
uint32_t qbman_result_SCN_rid(const struct qbman_result *scn)
{
- const uint32_t *p = qb_cl(scn);
-
- return qb_attr_code_decode(&code_scn_rid, p);
+ return scn->scn.rid_tok;
}
uint64_t qbman_result_SCN_ctx(const struct qbman_result *scn)
{
- const uint64_t *p = (const uint64_t *)qb_cl(scn);
-
- return qb_attr_code_decode_64(&code_scn_ctx_lo, p);
-}
-
-uint8_t qbman_result_SCN_state_in_mem(const struct qbman_result *scn)
-{
- const uint32_t *p = qb_cl(scn);
-
- return (uint8_t)qb_attr_code_decode(&code_scn_state_in_mem, p);
-}
-
-uint32_t qbman_result_SCN_rid_in_mem(const struct qbman_result *scn)
-{
- const uint32_t *p = qb_cl(scn);
- uint32_t result_rid;
-
- result_rid = qb_attr_code_decode(&code_scn_rid_in_mem, p);
- return make_le24(result_rid);
+ return scn->scn.ctx;
}
/*****************/
@@ -1188,22 +1077,22 @@ uint32_t qbman_result_SCN_rid_in_mem(const struct qbman_result *scn)
/*****************/
uint16_t qbman_result_bpscn_bpid(const struct qbman_result *scn)
{
- return (uint16_t)qbman_result_SCN_rid_in_mem(scn) & 0x3FFF;
+ return (uint16_t)qbman_result_SCN_rid(scn) & 0x3FFF;
}
int qbman_result_bpscn_has_free_bufs(const struct qbman_result *scn)
{
- return !(int)(qbman_result_SCN_state_in_mem(scn) & 0x1);
+ return !(int)(qbman_result_SCN_state(scn) & 0x1);
}
int qbman_result_bpscn_is_depleted(const struct qbman_result *scn)
{
- return (int)(qbman_result_SCN_state_in_mem(scn) & 0x2);
+ return (int)(qbman_result_SCN_state(scn) & 0x2);
}
int qbman_result_bpscn_is_surplus(const struct qbman_result *scn)
{
- return (int)(qbman_result_SCN_state_in_mem(scn) & 0x4);
+ return (int)(qbman_result_SCN_state(scn) & 0x4);
}
uint64_t qbman_result_bpscn_ctx(const struct qbman_result *scn)
@@ -1214,6 +1103,7 @@ uint64_t qbman_result_bpscn_ctx(const struct qbman_result *scn)
ctx = qbman_result_SCN_ctx(scn);
ctx_hi = upper32(ctx);
ctx_lo = lower32(ctx);
+
return ((uint64_t)make_le32(ctx_hi) << 32 |
(uint64_t)make_le32(ctx_lo));
}
@@ -1223,7 +1113,7 @@ uint64_t qbman_result_bpscn_ctx(const struct qbman_result *scn)
/*****************/
uint16_t qbman_result_cgcu_cgid(const struct qbman_result *scn)
{
- return (uint16_t)qbman_result_SCN_rid_in_mem(scn) & 0xFFFF;
+ return (uint16_t)qbman_result_SCN_rid(scn) & 0xFFFF;
}
uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn)
@@ -1234,6 +1124,7 @@ uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn)
ctx = qbman_result_SCN_ctx(scn);
ctx_hi = upper32(ctx);
ctx_lo = lower32(ctx);
+
return ((uint64_t)(make_le32(ctx_hi) & 0xFF) << 32) |
(uint64_t)make_le32(ctx_lo);
}
@@ -1241,34 +1132,26 @@ uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn)
/******************/
/* Buffer release */
/******************/
-
-/* These should be const, eventually */
-/* static struct qb_attr_code code_release_num = QB_CODE(0, 0, 3); */
-static struct qb_attr_code code_release_set_me = QB_CODE(0, 5, 1);
-static struct qb_attr_code code_release_rcdi = QB_CODE(0, 6, 1);
-static struct qb_attr_code code_release_bpid = QB_CODE(0, 16, 16);
+#define QB_BR_RC_VALID_SHIFT 5
+#define QB_BR_RCDI_SHIFT 6
void qbman_release_desc_clear(struct qbman_release_desc *d)
{
- uint32_t *cl;
-
memset(d, 0, sizeof(*d));
- cl = qb_cl(d);
- qb_attr_code_encode(&code_release_set_me, cl, 1);
+ d->br.verb = 1 << QB_BR_RC_VALID_SHIFT;
}
-void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint32_t bpid)
+void qbman_release_desc_set_bpid(struct qbman_release_desc *d, uint16_t bpid)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_release_bpid, cl, bpid);
+ d->br.bpid = bpid;
}
void qbman_release_desc_set_rcdi(struct qbman_release_desc *d, int enable)
{
- uint32_t *cl = qb_cl(d);
-
- qb_attr_code_encode(&code_release_rcdi, cl, !!enable);
+ if (enable)
+ d->br.verb |= 1 << QB_BR_RCDI_SHIFT;
+ else
+ d->br.verb &= ~(1 << QB_BR_RCDI_SHIFT);
}
#define RAR_IDX(rar) ((rar) & 0x7)
@@ -1285,12 +1168,16 @@ int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,
pr_debug("RAR=%08x\n", rar);
if (!RAR_SUCCESS(rar))
return -EBUSY;
+
QBMAN_BUG_ON(!num_buffers || (num_buffers > 7));
+
/* Start the release command */
p = qbman_cena_write_start_wo_shadow(&s->sys,
QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
+
/* Copy the caller's buffer pointers to the command */
u64_to_le32_copy(&p[2], buffers, num_buffers);
+
/* Set the verb byte, have to substitute in the valid-bit and the number
* of buffers.
*/
@@ -1298,25 +1185,38 @@ int qbman_swp_release(struct qbman_swp *s, const struct qbman_release_desc *d,
p[0] = cl[0] | RAR_VB(rar) | num_buffers;
qbman_cena_write_complete_wo_shadow(&s->sys,
QBMAN_CENA_SWP_RCR(RAR_IDX(rar)));
+
return 0;
}
/*******************/
/* Buffer acquires */
/*******************/
+struct qbman_acquire_desc {
+ uint8_t verb;
+ uint8_t reserved;
+ uint16_t bpid;
+ uint8_t num;
+ uint8_t reserved2[59];
+};
-/* These should be const, eventually */
-static struct qb_attr_code code_acquire_bpid = QB_CODE(0, 16, 16);
-static struct qb_attr_code code_acquire_num = QB_CODE(1, 0, 3);
-static struct qb_attr_code code_acquire_r_num = QB_CODE(1, 0, 3);
+struct qbman_acquire_rslt {
+ uint8_t verb;
+ uint8_t rslt;
+ uint16_t reserved;
+ uint8_t num;
+ uint8_t reserved2[3];
+ uint64_t buf[7];
+};
-int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,
+int qbman_swp_acquire(struct qbman_swp *s, uint16_t bpid, uint64_t *buffers,
unsigned int num_buffers)
{
- uint32_t *p;
- uint32_t rslt, num;
+ struct qbman_acquire_desc *p;
+ struct qbman_acquire_rslt *r;
- QBMAN_BUG_ON(!num_buffers || (num_buffers > 7));
+ if (!num_buffers || (num_buffers > 7))
+ return -EINVAL;
/* Start the management command */
p = qbman_swp_mc_start(s);
@@ -1325,59 +1225,81 @@ int qbman_swp_acquire(struct qbman_swp *s, uint32_t bpid, uint64_t *buffers,
return -EBUSY;
/* Encode the caller-provided attributes */
- qb_attr_code_encode(&code_acquire_bpid, p, bpid);
- qb_attr_code_encode(&code_acquire_num, p, num_buffers);
+ p->bpid = bpid;
+ p->num = num_buffers;
/* Complete the management command */
- p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_MC_ACQUIRE);
+ r = qbman_swp_mc_complete(s, p, QBMAN_MC_ACQUIRE);
+ if (unlikely(!r)) {
+ pr_err("qbman: acquire from BPID %d failed, no response\n",
+ bpid);
+ return -EIO;
+ }
/* Decode the outcome */
- rslt = qb_attr_code_decode(&code_generic_rslt, p);
- num = qb_attr_code_decode(&code_acquire_r_num, p);
- QBMAN_BUG_ON(qb_attr_code_decode(&code_generic_verb, p) !=
- QBMAN_MC_ACQUIRE);
+ QBMAN_BUG_ON((r->verb & QBMAN_RESPONSE_VERB_MASK) != QBMAN_MC_ACQUIRE);
/* Determine success or failure */
- if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
+ if (unlikely(r->rslt != QBMAN_MC_RSLT_OK)) {
pr_err("Acquire buffers from BPID 0x%x failed, code=0x%02x\n",
- bpid, rslt);
+ bpid, r->rslt);
return -EIO;
}
- QBMAN_BUG_ON(num > num_buffers);
+
+ QBMAN_BUG_ON(r->num > num_buffers);
+
/* Copy the acquired buffers to the caller's array */
- u64_from_le32_copy(buffers, &p[2], num);
- return (int)num;
+ u64_from_le32_copy(buffers, &r->buf[0], r->num);
+
+ return (int)r->num;
}
/*****************/
/* FQ management */
/*****************/
+struct qbman_alt_fq_state_desc {
+ uint8_t verb;
+ uint8_t reserved[3];
+ uint32_t fqid;
+ uint8_t reserved2[56];
+};
+
+struct qbman_alt_fq_state_rslt {
+ uint8_t verb;
+ uint8_t rslt;
+ uint8_t reserved[62];
+};
-static struct qb_attr_code code_fqalt_fqid = QB_CODE(1, 0, 32);
+#define ALT_FQ_FQID_MASK 0x00FFFFFF
static int qbman_swp_alt_fq_state(struct qbman_swp *s, uint32_t fqid,
uint8_t alt_fq_verb)
{
- uint32_t *p;
- uint32_t rslt;
+ struct qbman_alt_fq_state_desc *p;
+ struct qbman_alt_fq_state_rslt *r;
/* Start the management command */
p = qbman_swp_mc_start(s);
if (!p)
return -EBUSY;
- qb_attr_code_encode(&code_fqalt_fqid, p, fqid);
+ p->fqid = fqid & ALT_FQ_FQID_MASK;
+
/* Complete the management command */
- p = qbman_swp_mc_complete(s, p, p[0] | alt_fq_verb);
+ r = qbman_swp_mc_complete(s, p, alt_fq_verb);
+ if (unlikely(!r)) {
+ pr_err("qbman: mgmt cmd failed, no response (verb=0x%x)\n",
+ alt_fq_verb);
+ return -EIO;
+ }
/* Decode the outcome */
- rslt = qb_attr_code_decode(&code_generic_rslt, p);
- QBMAN_BUG_ON(qb_attr_code_decode(&code_generic_verb, p) != alt_fq_verb);
+ QBMAN_BUG_ON((r->verb & QBMAN_RESPONSE_VERB_MASK) != alt_fq_verb);
/* Determine success or failure */
- if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
+ if (unlikely(r->rslt != QBMAN_MC_RSLT_OK)) {
pr_err("ALT FQID %d failed: verb = 0x%08x, code = 0x%02x\n",
- fqid, alt_fq_verb, rslt);
+ fqid, alt_fq_verb, r->rslt);
return -EIO;
}
@@ -1408,10 +1330,24 @@ int qbman_swp_fq_xoff(struct qbman_swp *s, uint32_t fqid)
/* Channel management */
/**********************/
-static struct qb_attr_code code_cdan_cid = QB_CODE(0, 16, 12);
-static struct qb_attr_code code_cdan_we = QB_CODE(1, 0, 8);
-static struct qb_attr_code code_cdan_en = QB_CODE(1, 8, 1);
-static struct qb_attr_code code_cdan_ctx_lo = QB_CODE(2, 0, 32);
+struct qbman_cdan_ctrl_desc {
+ uint8_t verb;
+ uint8_t reserved;
+ uint16_t ch;
+ uint8_t we;
+ uint8_t ctrl;
+ uint16_t reserved2;
+ uint64_t cdan_ctx;
+ uint8_t reserved3[48];
+
+};
+
+struct qbman_cdan_ctrl_rslt {
+ uint8_t verb;
+ uint8_t rslt;
+ uint16_t ch;
+ uint8_t reserved[60];
+};
/* Hide "ICD" for now as we don't use it, don't set it, and don't test it, so it
* would be irresponsible to expose it.
@@ -1423,8 +1359,8 @@ static int qbman_swp_CDAN_set(struct qbman_swp *s, uint16_t channelid,
uint8_t we_mask, uint8_t cdan_en,
uint64_t ctx)
{
- uint32_t *p;
- uint32_t rslt;
+ struct qbman_cdan_ctrl_desc *p;
+ struct qbman_cdan_ctrl_rslt *r;
/* Start the management command */
p = qbman_swp_mc_start(s);
@@ -1432,22 +1368,29 @@ static int qbman_swp_CDAN_set(struct qbman_swp *s, uint16_t channelid,
return -EBUSY;
/* Encode the caller-provided attributes */
- qb_attr_code_encode(&code_cdan_cid, p, channelid);
- qb_attr_code_encode(&code_cdan_we, p, we_mask);
- qb_attr_code_encode(&code_cdan_en, p, cdan_en);
- qb_attr_code_encode_64(&code_cdan_ctx_lo, (uint64_t *)p, ctx);
+ p->ch = channelid;
+ p->we = we_mask;
+ if (cdan_en)
+ p->ctrl = 1;
+ else
+ p->ctrl = 0;
+ p->cdan_ctx = ctx;
+
/* Complete the management command */
- p = qbman_swp_mc_complete(s, p, p[0] | QBMAN_WQCHAN_CONFIGURE);
+ r = qbman_swp_mc_complete(s, p, QBMAN_WQCHAN_CONFIGURE);
+ if (unlikely(!r)) {
+ pr_err("qbman: wqchan config failed, no response\n");
+ return -EIO;
+ }
/* Decode the outcome */
- rslt = qb_attr_code_decode(&code_generic_rslt, p);
- QBMAN_BUG_ON(qb_attr_code_decode(&code_generic_verb, p)
- != QBMAN_WQCHAN_CONFIGURE);
+ QBMAN_BUG_ON((r->verb & QBMAN_RESPONSE_VERB_MASK)
+ != QBMAN_WQCHAN_CONFIGURE);
/* Determine success or failure */
- if (unlikely(rslt != QBMAN_MC_RSLT_OK)) {
+ if (unlikely(r->rslt != QBMAN_MC_RSLT_OK)) {
pr_err("CDAN cQID %d failed: code = 0x%02x\n",
- channelid, rslt);
+ channelid, r->rslt);
return -EIO;
}
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.h b/drivers/bus/fslmc/qbman/qbman_portal.h
index 8018048..bfcef8f 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/qbman_portal.h
@@ -123,12 +123,12 @@ struct qbman_swp {
* non-NULL if only if the response is complete).
*/
void *qbman_swp_mc_start(struct qbman_swp *p);
-void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint32_t cmd_verb);
+void qbman_swp_mc_submit(struct qbman_swp *p, void *cmd, uint8_t cmd_verb);
void *qbman_swp_mc_result(struct qbman_swp *p);
/* Wraps up submit + poll-for-result */
static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd,
- uint32_t cmd_verb)
+ uint8_t cmd_verb)
{
int loopvar;
@@ -275,4 +275,4 @@ static inline int32_t qb_attr_code_makesigned(const struct qb_attr_code *code,
* an inline) is necessary to work with different descriptor types and to work
* correctly with const and non-const inputs (and similarly-qualified outputs).
*/
-#define qb_cl(d) (&(d)->dont_manipulate_directly[0])
+#define qb_cl(d) (&(d)->donot_manipulate_directly[0])
diff --git a/drivers/bus/fslmc/qbman/qbman_private.h b/drivers/bus/fslmc/qbman/qbman_private.h
index b98c330..4f48b47 100644
--- a/drivers/bus/fslmc/qbman/qbman_private.h
+++ b/drivers/bus/fslmc/qbman/qbman_private.h
@@ -92,7 +92,7 @@ do { \
*
*/
#ifdef __LP64__
-#define MAKE_MASK32(width) ((uint32_t)(( 1ULL << width) - 1))
+#define MAKE_MASK32(width) ((uint32_t)((1ULL << width) - 1))
#else
#define MAKE_MASK32(width) (width == 32 ? 0xffffffff : \
(uint32_t)((1 << width) - 1))
diff --git a/drivers/bus/fslmc/qbman/qbman_sys.h b/drivers/bus/fslmc/qbman/qbman_sys.h
index 47da595..c73d2bf 100644
--- a/drivers/bus/fslmc/qbman/qbman_sys.h
+++ b/drivers/bus/fslmc/qbman/qbman_sys.h
@@ -357,15 +357,3 @@ static inline void qbman_swp_sys_finish(struct qbman_swp_sys *s)
{
free_page((unsigned long)s->cena);
}
-
-static inline void *
-qbman_cena_write_start_wo_shadow_fast(struct qbman_swp_sys *s,
- uint32_t offset)
-{
-#ifdef QBMAN_CENA_TRACE
- pr_info("qbman_cena_write_start(%p:%d:0x%03x)\n",
- s->addr_cena, s->idx, offset);
-#endif
- QBMAN_BUG_ON(offset & 63);
- return (s->addr_cena + offset);
-}
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index 13fb46a..3cc7dad 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -62,11 +62,12 @@ DPDK_17.08 {
dpio_remove_static_dequeue_channel;
mc_get_soc_version;
mc_get_version;
+ qbman_check_new_result;
qbman_eq_desc_set_dca;
qbman_get_dqrr_from_idx;
qbman_get_dqrr_idx;
qbman_result_DQ_fqd_ctx;
- qbman_result_SCN_state_in_mem;
+ qbman_result_SCN_state;
qbman_swp_dqrr_consume;
qbman_swp_dqrr_next;
qbman_swp_enqueue_multiple;
diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
index 094cf30..d2aff28 100644
--- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
+++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
@@ -747,13 +747,13 @@ dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
* Also seems like the SWP is shared between the Ethernet Driver
* and the SEC driver.
*/
- while (!qbman_check_command_complete(swp, dq_storage))
+ while (!qbman_check_command_complete(dq_storage))
;
/* Loop until the dq_storage is updated with
* new token by QBMAN
*/
- while (!qbman_result_has_new_result(swp, dq_storage))
+ while (!qbman_check_new_result(dq_storage))
;
/* Check whether Last Pull command is Expired and
* setting Condition for Loop termination
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 4342c73..75a06f5 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -422,7 +422,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
qbman_pull_desc_set_storage(&pulldesc, dq_storage,
(dma_addr_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);
if (check_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index)) {
- while (!qbman_check_command_complete(swp,
+ while (!qbman_check_command_complete(
get_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index)))
;
clear_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index);
@@ -445,7 +445,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
* Also seems like the SWP is shared between the Ethernet Driver
* and the SEC driver.
*/
- while (!qbman_check_command_complete(swp, dq_storage))
+ while (!qbman_check_command_complete(dq_storage))
;
if (dq_storage == get_swp_active_dqs(q_storage->active_dpio_id))
clear_swp_active_dqs(q_storage->active_dpio_id);
@@ -453,7 +453,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
/* Loop until the dq_storage is updated with
* new token by QBMAN
*/
- while (!qbman_result_has_new_result(swp, dq_storage))
+ while (!qbman_check_new_result(dq_storage))
;
rte_prefetch0((void *)((uint64_t)(dq_storage + 1)));
/* Check whether Last Pull command is Expired and
@@ -486,7 +486,7 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
}
if (check_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index)) {
- while (!qbman_check_command_complete(swp,
+ while (!qbman_check_command_complete(
get_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index)))
;
clear_swp_active_dqs(DPAA2_PER_LCORE_DPIO->index);
@@ -560,7 +560,7 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
while (nb_pkts) {
/*Check if the queue is congested*/
retry_count = 0;
- if (qbman_result_SCN_state_in_mem(dpaa2_q->cscn)) {
+ while (qbman_result_SCN_state(dpaa2_q->cscn)) {
retry_count++;
/* Retry for some time before giving up */
if (retry_count > CONG_RETRY_COUNT)
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [dpdk-dev] [PATCH v3 06/27] bus/fslmc: qbman remove unused funcs and align names
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 06/27] bus/fslmc: qbman remove unused funcs and align names Hemant Agrawal
@ 2017-09-18 20:19 ` Ferruh Yigit
0 siblings, 0 replies; 97+ messages in thread
From: Ferruh Yigit @ 2017-09-18 20:19 UTC (permalink / raw)
To: Hemant Agrawal, dev, Pablo de Lara; +Cc: shreyansh.jain, Thomas Monjalon
On 9/16/2017 11:52 AM, Hemant Agrawal wrote:
> name alignment for check command and result functions
> putting them as separate functions instead of changing the original
> functions.
>
> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
> ---
> drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 146 ++--
> drivers/bus/fslmc/qbman/qbman_portal.c | 731 ++++++++++-----------
> drivers/bus/fslmc/qbman/qbman_portal.h | 6 +-
> drivers/bus/fslmc/qbman/qbman_private.h | 2 +-
> drivers/bus/fslmc/qbman/qbman_sys.h | 12 -
> drivers/bus/fslmc/rte_bus_fslmc_version.map | 3 +-
> drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c | 4 +-
Same here, CC'ed Pablo.
> drivers/net/dpaa2/dpaa2_rxtx.c | 10 +-
> 8 files changed, 449 insertions(+), 465 deletions(-)
<...>
> diff --git a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> index 094cf30..d2aff28 100644
> --- a/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> +++ b/drivers/crypto/dpaa2_sec/dpaa2_sec_dpseci.c
> @@ -747,13 +747,13 @@ dpaa2_sec_dequeue_burst(void *qp, struct rte_crypto_op **ops,
> * Also seems like the SWP is shared between the Ethernet Driver
> * and the SEC driver.
> */
> - while (!qbman_check_command_complete(swp, dq_storage))
> + while (!qbman_check_command_complete(dq_storage))
> ;
>
> /* Loop until the dq_storage is updated with
> * new token by QBMAN
> */
> - while (!qbman_result_has_new_result(swp, dq_storage))
> + while (!qbman_check_new_result(dq_storage))
> ;
> /* Check whether Last Pull command is Expired and
> * setting Condition for Loop termination
<...>
^ permalink raw reply [flat|nested] 97+ messages in thread
* [dpdk-dev] [PATCH v3 07/27] bus/fslmc: cleanup compat file
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (5 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 06/27] bus/fslmc: qbman remove unused funcs and align names Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 08/27] bus/fslmc: clean the qbman support code Hemant Agrawal
` (21 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/include/compat.h | 188 +------------------------------
drivers/bus/fslmc/qbman/qbman_private.h | 2 +-
2 files changed, 4 insertions(+), 186 deletions(-)
diff --git a/drivers/bus/fslmc/qbman/include/compat.h b/drivers/bus/fslmc/qbman/include/compat.h
index 7b69fd1..8885d60 100644
--- a/drivers/bus/fslmc/qbman/include/compat.h
+++ b/drivers/bus/fslmc/qbman/include/compat.h
@@ -65,16 +65,9 @@
*/
/* Required compiler attributes */
-#define __user
#define likely(x) __builtin_expect(!!(x), 1)
#define unlikely(x) __builtin_expect(!!(x), 0)
#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
-#undef container_of
-#define container_of(ptr, type, member) ({ \
- typeof(((type *)0)->member)(*__mptr) = (ptr); \
- (type *)((char *)__mptr - offsetof(type, member)); })
-#define __stringify_1(x) #x
-#define __stringify(x) __stringify_1(x)
#ifdef ARRAY_SIZE
#undef ARRAY_SIZE
@@ -88,17 +81,8 @@ typedef uint32_t u32;
typedef uint64_t u64;
typedef uint64_t dma_addr_t;
typedef cpu_set_t cpumask_t;
-typedef u32 compat_uptr_t;
-
-static inline void __user *compat_ptr(compat_uptr_t uptr)
-{
- return (void __user *)(unsigned long)uptr;
-}
-
-static inline compat_uptr_t ptr_to_compat(void __user *uptr)
-{
- return (u32)(unsigned long)uptr;
-}
+typedef unsigned int gfp_t;
+typedef uint32_t phandle;
/* I/O operations */
static inline u32 in_be32(volatile void *__p)
@@ -124,12 +108,11 @@ static inline void out_be32(volatile void *__p, u32 val)
#define pr_warn(fmt, args...) prflush("WARN:" fmt, ##args)
#define pr_info(fmt, args...) prflush(fmt, ##args)
+#ifdef RTE_LIBRTE_DPAA2_DEBUG_BUS
#ifdef pr_debug
#undef pr_debug
#endif
#define pr_debug(fmt, args...) {}
-#define might_sleep_if(c) {}
-#define msleep(x) {}
#define WARN_ON(c, str) \
do { \
static int warned_##__LINE__; \
@@ -147,103 +130,20 @@ do { \
#define ALIGN(x, a) (((x) + ((typeof(x))(a) - 1)) & ~((typeof(x))(a) - 1))
-/****************/
-/* Linked-lists */
-/****************/
-
-struct list_head {
- struct list_head *prev;
- struct list_head *next;
-};
-
-#define LIST_HEAD(n) \
-struct list_head n = { \
- .prev = &n, \
- .next = &n \
-}
-
-#define INIT_LIST_HEAD(p) \
-do { \
- struct list_head *__p298 = (p); \
- __p298->next = __p298; \
- __p298->prev = __p298->next; \
-} while (0)
-#define list_entry(node, type, member) \
- (type *)((void *)node - offsetof(type, member))
-#define list_empty(p) \
-({ \
- const struct list_head *__p298 = (p); \
- ((__p298->next == __p298) && (__p298->prev == __p298)); \
-})
-#define list_add(p, l) \
-do { \
- struct list_head *__p298 = (p); \
- struct list_head *__l298 = (l); \
- __p298->next = __l298->next; \
- __p298->prev = __l298; \
- __l298->next->prev = __p298; \
- __l298->next = __p298; \
-} while (0)
-#define list_add_tail(p, l) \
-do { \
- struct list_head *__p298 = (p); \
- struct list_head *__l298 = (l); \
- __p298->prev = __l298->prev; \
- __p298->next = __l298; \
- __l298->prev->next = __p298; \
- __l298->prev = __p298; \
-} while (0)
-#define list_for_each(i, l) \
- for (i = (l)->next; i != (l); i = i->next)
-#define list_for_each_safe(i, j, l) \
- for (i = (l)->next, j = i->next; i != (l); \
- i = j, j = i->next)
-#define list_for_each_entry(i, l, name) \
- for (i = list_entry((l)->next, typeof(*i), name); &i->name != (l); \
- i = list_entry(i->name.next, typeof(*i), name))
-#define list_for_each_entry_safe(i, j, l, name) \
- for (i = list_entry((l)->next, typeof(*i), name), \
- j = list_entry(i->name.next, typeof(*j), name); \
- &i->name != (l); \
- i = j, j = list_entry(j->name.next, typeof(*j), name))
-#define list_del(i) \
-do { \
- (i)->next->prev = (i)->prev; \
- (i)->prev->next = (i)->next; \
-} while (0)
-
/* Other miscellaneous interfaces our APIs depend on; */
-
#define lower_32_bits(x) ((u32)(x))
#define upper_32_bits(x) ((u32)(((x) >> 16) >> 16))
/* Compiler/type stuff */
-typedef unsigned int gfp_t;
-typedef uint32_t phandle;
#define __iomem
-#define EINTR 4
-#define ENODEV 19
#define GFP_KERNEL 0
#define __raw_readb(p) (*(const volatile unsigned char *)(p))
#define __raw_readl(p) (*(const volatile unsigned int *)(p))
#define __raw_writel(v, p) {*(volatile unsigned int *)(p) = (v); }
-/* Completion stuff */
-#define DECLARE_COMPLETION(n) int n = 0
-#define complete(n) { *n = 1; }
-#define wait_for_completion(n) \
-do { \
- while (!*n) { \
- bman_poll(); \
- qman_poll(); \
- } \
- *n = 0; \
-} while (0)
-
/* Allocator stuff */
#define kmalloc(sz, t) malloc(sz)
-#define vmalloc(sz) malloc(sz)
#define kfree(p) { if (p) free(p); }
static inline void *kzalloc(size_t sz, gfp_t __foo __rte_unused)
{
@@ -269,88 +169,6 @@ static inline void free_page(unsigned long p)
free((void *)p);
}
-/* Bitfield stuff. */
-#define BITS_PER_ULONG (sizeof(unsigned long) << 3)
-#define SHIFT_PER_ULONG (((1 << 5) == BITS_PER_ULONG) ? 5 : 6)
-#define BITS_MASK(idx) ((unsigned long)1 << ((idx) & (BITS_PER_ULONG - 1)))
-#define BITS_IDX(idx) ((idx) >> SHIFT_PER_ULONG)
-static inline unsigned long test_bits(unsigned long mask,
- volatile unsigned long *p)
-{
- return *p & mask;
-}
-
-static inline int test_bit(int idx, volatile unsigned long *bits)
-{
- return test_bits(BITS_MASK(idx), bits + BITS_IDX(idx));
-}
-
-static inline void set_bits(unsigned long mask, volatile unsigned long *p)
-{
- *p |= mask;
-}
-
-static inline void set_bit(int idx, volatile unsigned long *bits)
-{
- set_bits(BITS_MASK(idx), bits + BITS_IDX(idx));
-}
-
-static inline void clear_bits(unsigned long mask, volatile unsigned long *p)
-{
- *p &= ~mask;
-}
-
-static inline void clear_bit(int idx, volatile unsigned long *bits)
-{
- clear_bits(BITS_MASK(idx), bits + BITS_IDX(idx));
-}
-
-static inline unsigned long test_and_set_bits(unsigned long mask,
- volatile unsigned long *p)
-{
- unsigned long ret = test_bits(mask, p);
-
- set_bits(mask, p);
- return ret;
-}
-
-static inline int test_and_set_bit(int idx, volatile unsigned long *bits)
-{
- int ret = test_bit(idx, bits);
-
- set_bit(idx, bits);
- return ret;
-}
-
-static inline int test_and_clear_bit(int idx, volatile unsigned long *bits)
-{
- int ret = test_bit(idx, bits);
-
- clear_bit(idx, bits);
- return ret;
-}
-
-static inline int find_next_zero_bit(unsigned long *bits, int limit, int idx)
-{
- while ((++idx < limit) && test_bit(idx, bits))
- ;
- return idx;
-}
-
-static inline int find_first_zero_bit(unsigned long *bits, int limit)
-{
- int idx = 0;
-
- while (test_bit(idx, bits) && (++idx < limit))
- ;
- return idx;
-}
-
-static inline u64 div64_u64(u64 n, u64 d)
-{
- return n / d;
-}
-
#define atomic_t rte_atomic32_t
#define atomic_read(v) rte_atomic32_read(v)
#define atomic_set(v, i) rte_atomic32_set(v, i)
diff --git a/drivers/bus/fslmc/qbman/qbman_private.h b/drivers/bus/fslmc/qbman/qbman_private.h
index 4f48b47..32e5c5d 100644
--- a/drivers/bus/fslmc/qbman/qbman_private.h
+++ b/drivers/bus/fslmc/qbman/qbman_private.h
@@ -27,7 +27,7 @@
*/
/* Perform extra checking */
-#define QBMAN_CHECKING
+/*#define QBMAN_CHECKING*/
/* To maximise the amount of logic that is common between the Linux driver and
* other targets (such as the embedded MC firmware), we pivot here between the
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 08/27] bus/fslmc: clean the qbman support code
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (6 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 07/27] bus/fslmc: cleanup compat file Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 09/27] config/dpaa2: change max lores to 16 Hemant Agrawal
` (20 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/qbman/include/compat.h | 98 +++---------
drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h | 5 +-
drivers/bus/fslmc/qbman/qbman_portal.c | 26 +--
drivers/bus/fslmc/qbman/qbman_portal.h | 133 ++-------------
drivers/bus/fslmc/qbman/qbman_private.h | 178 ---------------------
drivers/bus/fslmc/qbman/qbman_sys.h | 131 ++++++++-------
drivers/bus/fslmc/qbman/qbman_sys_decl.h | 25 +--
7 files changed, 112 insertions(+), 484 deletions(-)
delete mode 100644 drivers/bus/fslmc/qbman/qbman_private.h
diff --git a/drivers/bus/fslmc/qbman/include/compat.h b/drivers/bus/fslmc/qbman/include/compat.h
index 8885d60..423087c 100644
--- a/drivers/bus/fslmc/qbman/include/compat.h
+++ b/drivers/bus/fslmc/qbman/include/compat.h
@@ -30,32 +30,17 @@
#ifndef HEADER_COMPAT_H
#define HEADER_COMPAT_H
-#include <sched.h>
-
#ifndef _GNU_SOURCE
#define _GNU_SOURCE
#endif
#include <stdint.h>
#include <stdlib.h>
-#include <stddef.h>
#include <errno.h>
#include <string.h>
-#include <pthread.h>
-#include <net/ethernet.h>
-#include <stdio.h>
-#include <stdbool.h>
-#include <ctype.h>
#include <malloc.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <fcntl.h>
#include <unistd.h>
-#include <sys/mman.h>
-#include <limits.h>
-#include <assert.h>
-#include <dirent.h>
-#include <inttypes.h>
#include <error.h>
+#include <linux/types.h>
#include <rte_atomic.h>
/* The following definitions are primarily to allow the single-source driver
@@ -67,35 +52,9 @@
/* Required compiler attributes */
#define likely(x) __builtin_expect(!!(x), 1)
#define unlikely(x) __builtin_expect(!!(x), 0)
-#define ____cacheline_aligned __attribute__((aligned(L1_CACHE_BYTES)))
-
-#ifdef ARRAY_SIZE
-#undef ARRAY_SIZE
-#endif
-#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
/* Required types */
-typedef uint8_t u8;
-typedef uint16_t u16;
-typedef uint32_t u32;
-typedef uint64_t u64;
typedef uint64_t dma_addr_t;
-typedef cpu_set_t cpumask_t;
-typedef unsigned int gfp_t;
-typedef uint32_t phandle;
-
-/* I/O operations */
-static inline u32 in_be32(volatile void *__p)
-{
- volatile u32 *p = __p;
- return *p;
-}
-
-static inline void out_be32(volatile void *__p, u32 val)
-{
- volatile u32 *p = __p;
- *p = val;
-}
/* Debugging */
#define prflush(fmt, args...) \
@@ -109,66 +68,45 @@ static inline void out_be32(volatile void *__p, u32 val)
#define pr_info(fmt, args...) prflush(fmt, ##args)
#ifdef RTE_LIBRTE_DPAA2_DEBUG_BUS
+
+/* Trace the 3 different classes of read/write access to QBMan. #undef as
+ * required.
+ */
+#define QBMAN_CCSR_TRACE
+#define QBMAN_CINH_TRACE
+#define QBMAN_CENA_TRACE
+
+#define QBMAN_CHECKING
+
#ifdef pr_debug
#undef pr_debug
#endif
-#define pr_debug(fmt, args...) {}
-#define WARN_ON(c, str) \
+#define pr_debug(fmt, args...) printf(fmt, ##args)
+#define QBMAN_BUG_ON(c) \
do { \
static int warned_##__LINE__; \
if ((c) && !warned_##__LINE__) { \
- pr_warn("%s\n", str); \
pr_warn("(%s:%d)\n", __FILE__, __LINE__); \
warned_##__LINE__ = 1; \
} \
} while (0)
-#ifdef CONFIG_BUGON
-#define QBMAN_BUG_ON(c) WARN_ON(c, "BUG")
#else
#define QBMAN_BUG_ON(c) {}
+#define pr_debug(fmt, args...) {}
#endif
-#define ALIGN(x, a) (((x) + ((typeof(x))(a) - 1)) & ~((typeof(x))(a) - 1))
-
/* Other miscellaneous interfaces our APIs depend on; */
-#define lower_32_bits(x) ((u32)(x))
-#define upper_32_bits(x) ((u32)(((x) >> 16) >> 16))
-/* Compiler/type stuff */
+#define lower_32_bits(x) ((uint32_t)(x))
+#define upper_32_bits(x) ((uint32_t)(((x) >> 16) >> 16))
+
#define __iomem
-#define GFP_KERNEL 0
+
#define __raw_readb(p) (*(const volatile unsigned char *)(p))
#define __raw_readl(p) (*(const volatile unsigned int *)(p))
#define __raw_writel(v, p) {*(volatile unsigned int *)(p) = (v); }
-/* Allocator stuff */
-#define kmalloc(sz, t) malloc(sz)
-#define kfree(p) { if (p) free(p); }
-static inline void *kzalloc(size_t sz, gfp_t __foo __rte_unused)
-{
- void *ptr = malloc(sz);
-
- if (ptr)
- memset(ptr, 0, sz);
- return ptr;
-}
-
-static inline unsigned long get_zeroed_page(gfp_t __foo __rte_unused)
-{
- void *p;
-
- if (posix_memalign(&p, 4096, 4096))
- return 0;
- memset(p, 0, 4096);
- return (unsigned long)p;
-}
-
-static inline void free_page(unsigned long p)
-{
- free((void *)p);
-}
-
#define atomic_t rte_atomic32_t
#define atomic_read(v) rte_atomic32_read(v)
#define atomic_set(v, i) rte_atomic32_set(v, i)
diff --git a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
index 24a6d4b..1e65660 100644
--- a/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/include/fsl_qbman_portal.h
@@ -329,7 +329,7 @@ void qbman_pull_desc_clear(struct qbman_pull_desc *d);
*/
void qbman_pull_desc_set_storage(struct qbman_pull_desc *d,
struct qbman_result *storage,
- dma_addr_t storage_phys,
+ uint64_t storage_phys,
int stash);
/**
* qbman_pull_desc_set_numframes() - Set the number of frames to be dequeued.
@@ -796,7 +796,6 @@ struct qbman_eq_desc {
uint8_t wae;
uint8_t rspid;
uint64_t rsp_addr;
- uint8_t fd[32];
} eq;
};
};
@@ -881,7 +880,7 @@ void qbman_eq_desc_set_orp_nesn(struct qbman_eq_desc *d, uint16_t opr_id,
* expresses a cache-warming attribute.
*/
void qbman_eq_desc_set_response(struct qbman_eq_desc *d,
- dma_addr_t storage_phys,
+ uint64_t storage_phys,
int stash);
/**
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.c b/drivers/bus/fslmc/qbman/qbman_portal.c
index cd903c1..809770c 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.c
+++ b/drivers/bus/fslmc/qbman/qbman_portal.c
@@ -126,7 +126,7 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
{
int ret;
uint32_t eqcr_pi;
- struct qbman_swp *p = kmalloc(sizeof(*p), GFP_KERNEL);
+ struct qbman_swp *p = malloc(sizeof(*p));
if (!p)
return NULL;
@@ -155,7 +155,7 @@ struct qbman_swp *qbman_swp_init(const struct qbman_swp_desc *d)
ret = qbman_swp_sys_init(&p->sys, d, p->dqrr.dqrr_size);
if (ret) {
- kfree(p);
+ free(p);
pr_err("qbman_swp_sys_init() failed %d\n", ret);
return NULL;
}
@@ -183,7 +183,7 @@ void qbman_swp_finish(struct qbman_swp *p)
#endif
qbman_swp_sys_finish(&p->sys);
portal_idx_map[p->desc.idx] = NULL;
- kfree(p);
+ free(p);
}
const struct qbman_swp_desc *qbman_swp_get_desc(struct qbman_swp *p)
@@ -1097,15 +1097,7 @@ int qbman_result_bpscn_is_surplus(const struct qbman_result *scn)
uint64_t qbman_result_bpscn_ctx(const struct qbman_result *scn)
{
- uint64_t ctx;
- uint32_t ctx_hi, ctx_lo;
-
- ctx = qbman_result_SCN_ctx(scn);
- ctx_hi = upper32(ctx);
- ctx_lo = lower32(ctx);
-
- return ((uint64_t)make_le32(ctx_hi) << 32 |
- (uint64_t)make_le32(ctx_lo));
+ return qbman_result_SCN_ctx(scn);
}
/*****************/
@@ -1118,15 +1110,7 @@ uint16_t qbman_result_cgcu_cgid(const struct qbman_result *scn)
uint64_t qbman_result_cgcu_icnt(const struct qbman_result *scn)
{
- uint64_t ctx;
- uint32_t ctx_hi, ctx_lo;
-
- ctx = qbman_result_SCN_ctx(scn);
- ctx_hi = upper32(ctx);
- ctx_lo = lower32(ctx);
-
- return ((uint64_t)(make_le32(ctx_hi) & 0xFF) << 32) |
- (uint64_t)make_le32(ctx_lo);
+ return qbman_result_SCN_ctx(scn);
}
/******************/
diff --git a/drivers/bus/fslmc/qbman/qbman_portal.h b/drivers/bus/fslmc/qbman/qbman_portal.h
index bfcef8f..d9f3ed7 100644
--- a/drivers/bus/fslmc/qbman/qbman_portal.h
+++ b/drivers/bus/fslmc/qbman/qbman_portal.h
@@ -26,10 +26,14 @@
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-#include "qbman_private.h"
+#include "qbman_sys.h"
#include <fsl_qbman_portal.h>
uint32_t qman_version;
+#define QMAN_REV_4000 0x04000000
+#define QMAN_REV_4100 0x04010000
+#define QMAN_REV_4101 0x04010001
+
/* All QBMan command and result structures use this "valid bit" encoding */
#define QB_VALID_BIT ((uint32_t)0x80)
@@ -40,7 +44,8 @@ uint32_t qman_version;
#define QBMAN_EQCR_SIZE 8
-static inline u8 qm_cyc_diff(u8 ringsize, u8 first, u8 last)
+static inline uint8_t qm_cyc_diff(uint8_t ringsize, uint8_t first,
+ uint8_t last)
{
/* 'first' is included, 'last' is excluded */
if (first <= last)
@@ -130,131 +135,15 @@ void *qbman_swp_mc_result(struct qbman_swp *p);
static inline void *qbman_swp_mc_complete(struct qbman_swp *swp, void *cmd,
uint8_t cmd_verb)
{
- int loopvar;
+ int loopvar = 1000;
qbman_swp_mc_submit(swp, cmd, cmd_verb);
- DBG_POLL_START(loopvar);
do {
- DBG_POLL_CHECK(loopvar);
cmd = qbman_swp_mc_result(swp);
- } while (!cmd);
- return cmd;
-}
-
-/* ------------ */
-/* qb_attr_code */
-/* ------------ */
-
-/* This struct locates a sub-field within a QBMan portal (CENA) cacheline which
- * is either serving as a configuration command or a query result. The
- * representation is inherently little-endian, as the indexing of the words is
- * itself little-endian in nature and DPAA2 QBMan is little endian for anything
- * that crosses a word boundary too (64-bit fields are the obvious examples).
- */
-struct qb_attr_code {
- unsigned int word; /* which uint32_t[] array member encodes the field */
- unsigned int lsoffset; /* encoding offset from ls-bit */
- unsigned int width; /* encoding width. (bool must be 1.) */
-};
-
-/* Some pre-defined codes */
-extern struct qb_attr_code code_generic_verb;
-extern struct qb_attr_code code_generic_rslt;
-
-/* Macros to define codes */
-#define QB_CODE(a, b, c) { a, b, c}
-#define QB_CODE_NULL \
- QB_CODE((unsigned int)-1, (unsigned int)-1, (unsigned int)-1)
-
-/* Rotate a code "ms", meaning that it moves from less-significant bytes to
- * more-significant, from less-significant words to more-significant, etc. The
- * "ls" version does the inverse, from more-significant towards
- * less-significant.
- */
-static inline void qb_attr_code_rotate_ms(struct qb_attr_code *code,
- unsigned int bits)
-{
- code->lsoffset += bits;
- while (code->lsoffset > 31) {
- code->word++;
- code->lsoffset -= 32;
- }
-}
-
-static inline void qb_attr_code_rotate_ls(struct qb_attr_code *code,
- unsigned int bits)
-{
- /* Don't be fooled, this trick should work because the types are
- * unsigned. So the case that interests the while loop (the rotate has
- * gone too far and the word count needs to compensate for it), is
- * manifested when lsoffset is negative. But that equates to a really
- * large unsigned value, starting with lots of "F"s. As such, we can
- * continue adding 32 back to it until it wraps back round above zero,
- * to a value of 31 or less...
- */
- code->lsoffset -= bits;
- while (code->lsoffset > 31) {
- code->word--;
- code->lsoffset += 32;
- }
-}
+ } while (!cmd && loopvar--);
+ QBMAN_BUG_ON(!loopvar);
-/* Implement a loop of code rotations until 'expr' evaluates to FALSE (0). */
-#define qb_attr_code_for_ms(code, bits, expr) \
- for (; expr; qb_attr_code_rotate_ms(code, bits))
-#define qb_attr_code_for_ls(code, bits, expr) \
- for (; expr; qb_attr_code_rotate_ls(code, bits))
-
-/* decode a field from a cacheline */
-static inline uint32_t qb_attr_code_decode(const struct qb_attr_code *code,
- const uint32_t *cacheline)
-{
- return d32_uint32_t(code->lsoffset, code->width, cacheline[code->word]);
-}
-
-static inline uint64_t qb_attr_code_decode_64(const struct qb_attr_code *code,
- const uint64_t *cacheline)
-{
- return cacheline[code->word / 2];
-}
-
-/* encode a field to a cacheline */
-static inline void qb_attr_code_encode(const struct qb_attr_code *code,
- uint32_t *cacheline, uint32_t val)
-{
- cacheline[code->word] =
- r32_uint32_t(code->lsoffset, code->width, cacheline[code->word])
- | e32_uint32_t(code->lsoffset, code->width, val);
-}
-
-static inline void qb_attr_code_encode_64(const struct qb_attr_code *code,
- uint64_t *cacheline, uint64_t val)
-{
- cacheline[code->word / 2] = val;
-}
-
-/* Small-width signed values (two's-complement) will decode into medium-width
- * positives. (Eg. for an 8-bit signed field, which stores values from -128 to
- * +127, a setting of -7 would appear to decode to the 32-bit unsigned value
- * 249. Likewise -120 would decode as 136.) This function allows the caller to
- * "re-sign" such fields to 32-bit signed. (Eg. -7, which was 249 with an 8-bit
- * encoding, will become 0xfffffff9 if you cast the return value to uint32_t).
- */
-static inline int32_t qb_attr_code_makesigned(const struct qb_attr_code *code,
- uint32_t val)
-{
- QBMAN_BUG_ON(val >= (1u << code->width));
- /* code->width should never exceed the width of val. If it does then a
- * different function with larger val size must be used to translate
- * from unsigned to signed
- */
- QBMAN_BUG_ON(code->width > sizeof(val) * CHAR_BIT);
- /* If the high bit was set, it was encoding a negative */
- if (val >= 1u << (code->width - 1))
- return (int32_t)0 - (int32_t)(((uint32_t)1 << code->width) -
- val);
- /* Otherwise, it was encoding a positive */
- return (int32_t)val;
+ return cmd;
}
/* ---------------------- */
diff --git a/drivers/bus/fslmc/qbman/qbman_private.h b/drivers/bus/fslmc/qbman/qbman_private.h
deleted file mode 100644
index 32e5c5d..0000000
--- a/drivers/bus/fslmc/qbman/qbman_private.h
+++ /dev/null
@@ -1,178 +0,0 @@
-/*-
- * BSD LICENSE
- *
- * Copyright (C) 2014-2016 Freescale Semiconductor, Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/* Perform extra checking */
-/*#define QBMAN_CHECKING*/
-
-/* To maximise the amount of logic that is common between the Linux driver and
- * other targets (such as the embedded MC firmware), we pivot here between the
- * inclusion of two platform-specific headers.
- *
- * The first, qbman_sys_decl.h, includes any and all required system headers as
- * well as providing any definitions for the purposes of compatibility. The
- * second, qbman_sys.h, is where platform-specific routines go.
- *
- * The point of the split is that the platform-independent code (including this
- * header) may depend on platform-specific declarations, yet other
- * platform-specific routines may depend on platform-independent definitions.
- */
-
-#include "qbman_sys_decl.h"
-
-/* When things go wrong, it is a convenient trick to insert a few FOO()
- * statements in the code to trace progress. TODO: remove this once we are
- * hacking the code less actively.
- */
-#define FOO() fsl_os_print("FOO: %s:%d\n", __FILE__, __LINE__)
-
-/* Any time there is a register interface which we poll on, this provides a
- * "break after x iterations" scheme for it. It's handy for debugging, eg.
- * where you don't want millions of lines of log output from a polling loop
- * that won't, because such things tend to drown out the earlier log output
- * that might explain what caused the problem. (NB: put ";" after each macro!)
- * TODO: we should probably remove this once we're done sanitising the
- * simulator...
- */
-#define DBG_POLL_START(loopvar) (loopvar = 10)
-#define DBG_POLL_CHECK(loopvar) \
-do { \
- if (!(loopvar--)) \
- QBMAN_BUG_ON(NULL == "DBG_POLL_CHECK"); \
-} while (0)
-
-/* For CCSR or portal-CINH registers that contain fields at arbitrary offsets
- * and widths, these macro-generated encode/decode/isolate/remove inlines can
- * be used.
- *
- * Eg. to "d"ecode a 14-bit field out of a register (into a "uint16_t" type),
- * where the field is located 3 bits "up" from the least-significant bit of the
- * register (ie. the field location within the 32-bit register corresponds to a
- * mask of 0x0001fff8), you would do;
- * uint16_t field = d32_uint16_t(3, 14, reg_value);
- *
- * Or to "e"ncode a 1-bit boolean value (input type is "int", zero is FALSE,
- * non-zero is TRUE, so must convert all non-zero inputs to 1, hence the "!!"
- * operator) into a register at bit location 0x00080000 (19 bits "in" from the
- * LS bit), do;
- * reg_value |= e32_int(19, 1, !!field);
- *
- * If you wish to read-modify-write a register, such that you leave the 14-bit
- * field as-is but have all other fields set to zero, then "i"solate the 14-bit
- * value using;
- * reg_value = i32_uint16_t(3, 14, reg_value);
- *
- * Alternatively, you could "r"emove the 1-bit boolean field (setting it to
- * zero) but leaving all other fields as-is;
- * reg_val = r32_int(19, 1, reg_value);
- *
- */
-#ifdef __LP64__
-#define MAKE_MASK32(width) ((uint32_t)((1ULL << width) - 1))
-#else
-#define MAKE_MASK32(width) (width == 32 ? 0xffffffff : \
- (uint32_t)((1 << width) - 1))
-#endif
-#define DECLARE_CODEC32(t) \
-static inline uint32_t e32_##t(uint32_t lsoffset, uint32_t width, t val) \
-{ \
- QBMAN_BUG_ON(width > (sizeof(t) * 8)); \
- return ((uint32_t)val & MAKE_MASK32(width)) << lsoffset; \
-} \
-static inline t d32_##t(uint32_t lsoffset, uint32_t width, uint32_t val) \
-{ \
- QBMAN_BUG_ON(width > (sizeof(t) * 8)); \
- return (t)((val >> lsoffset) & MAKE_MASK32(width)); \
-} \
-static inline uint32_t i32_##t(uint32_t lsoffset, uint32_t width, \
- uint32_t val) \
-{ \
- QBMAN_BUG_ON(width > (sizeof(t) * 8)); \
- return e32_##t(lsoffset, width, d32_##t(lsoffset, width, val)); \
-} \
-static inline uint32_t r32_##t(uint32_t lsoffset, uint32_t width, \
- uint32_t val) \
-{ \
- QBMAN_BUG_ON(width > (sizeof(t) * 8)); \
- return ~(MAKE_MASK32(width) << lsoffset) & val; \
-}
-DECLARE_CODEC32(uint32_t)
-DECLARE_CODEC32(uint16_t)
-DECLARE_CODEC32(uint8_t)
-DECLARE_CODEC32(int)
-
- /*********************/
- /* Debugging assists */
- /*********************/
-
-static inline void __hexdump(unsigned long start, unsigned long end,
- unsigned long p, size_t sz, const unsigned char *c)
-{
- while (start < end) {
- unsigned int pos = 0;
- char buf[64];
- int nl = 0;
-
- pos += sprintf(buf + pos, "%08lx: ", start);
- do {
- if ((start < p) || (start >= (p + sz)))
- pos += sprintf(buf + pos, "..");
- else
- pos += sprintf(buf + pos, "%02x", *(c++));
- if (!(++start & 15)) {
- buf[pos++] = '\n';
- nl = 1;
- } else {
- nl = 0;
- if (!(start & 1))
- buf[pos++] = ' ';
- if (!(start & 3))
- buf[pos++] = ' ';
- }
- } while (start & 15);
- if (!nl)
- buf[pos++] = '\n';
- buf[pos] = '\0';
- pr_info("%s", buf);
- }
-}
-
-static inline void hexdump(const void *ptr, size_t sz)
-{
- unsigned long p = (unsigned long)ptr;
- unsigned long start = p & ~(unsigned long)15;
- unsigned long end = (p + sz + 15) & ~(unsigned long)15;
- const unsigned char *c = ptr;
-
- __hexdump(start, end, p, sz, c);
-}
-
-#define QMAN_REV_4000 0x04000000
-#define QMAN_REV_4100 0x04010000
-#define QMAN_REV_4101 0x04010001
-
-#include "qbman_sys.h"
diff --git a/drivers/bus/fslmc/qbman/qbman_sys.h b/drivers/bus/fslmc/qbman/qbman_sys.h
index c73d2bf..c216e9c 100644
--- a/drivers/bus/fslmc/qbman/qbman_sys.h
+++ b/drivers/bus/fslmc/qbman/qbman_sys.h
@@ -40,12 +40,50 @@
* *not* to provide linux compatibility.
*/
-/* Trace the 3 different classes of read/write access to QBMan. #undef as
- * required.
- */
-#undef QBMAN_CCSR_TRACE
-#undef QBMAN_CINH_TRACE
-#undef QBMAN_CENA_TRACE
+#include "qbman_sys_decl.h"
+
+/* Debugging assists */
+static inline void __hexdump(unsigned long start, unsigned long end,
+ unsigned long p, size_t sz, const unsigned char *c)
+{
+ while (start < end) {
+ unsigned int pos = 0;
+ char buf[64];
+ int nl = 0;
+
+ pos += sprintf(buf + pos, "%08lx: ", start);
+ do {
+ if ((start < p) || (start >= (p + sz)))
+ pos += sprintf(buf + pos, "..");
+ else
+ pos += sprintf(buf + pos, "%02x", *(c++));
+ if (!(++start & 15)) {
+ buf[pos++] = '\n';
+ nl = 1;
+ } else {
+ nl = 0;
+ if (!(start & 1))
+ buf[pos++] = ' ';
+ if (!(start & 3))
+ buf[pos++] = ' ';
+ }
+ } while (start & 15);
+ if (!nl)
+ buf[pos++] = '\n';
+ buf[pos] = '\0';
+ pr_info("%s", buf);
+ }
+}
+
+static inline void hexdump(const void *ptr, size_t sz)
+{
+ unsigned long p = (unsigned long)ptr;
+ unsigned long start = p & ~15;
+ unsigned long end = (p + sz + 15) & ~15;
+ const unsigned char *c = ptr;
+
+ __hexdump(start, end, p, sz, c);
+}
/* Currently, the CENA support code expects each 32-bit word to be written in
* host order, and these are converted to hardware (little-endian) order on
@@ -94,34 +132,6 @@ static inline void u64_from_le32_copy(uint64_t *d, const void *s,
}
}
-/* Convert a host-native 32bit value into little endian */
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
-static inline uint32_t make_le32(uint32_t val)
-{
- return ((val & 0xff) << 24) | ((val & 0xff00) << 8) |
- ((val & 0xff0000) >> 8) | ((val & 0xff000000) >> 24);
-}
-
-static inline uint32_t make_le24(uint32_t val)
-{
- return (((val & 0xff) << 16) | (val & 0xff00) |
- ((val & 0xff0000) >> 16));
-}
-
-static inline void make_le32_n(uint32_t *val, unsigned int num)
-{
- while (num--) {
- *val = make_le32(*val);
- val++;
- }
-}
-
-#else
-#define make_le32(val) (val)
-#define make_le24(val) (val)
-#define make_le32_n(val, len) do {} while (0)
-#endif
-
/******************/
/* Portal access */
/******************/
@@ -249,7 +259,7 @@ static inline void *qbman_cena_read_wo_shadow(struct qbman_swp_sys *s,
uint32_t offset)
{
#ifdef QBMAN_CENA_TRACE
- pr_info("qbman_cena_read(%p:%d:0x%03x) %p\n",
+ pr_info("qbman_cena_read(%p:%d:0x%03x)\n",
s->addr_cena, s->idx, offset);
#endif
return s->addr_cena + offset;
@@ -283,20 +293,20 @@ static inline void qbman_cena_prefetch(struct qbman_swp_sys *s,
* qbman_portal.c. So use of it is declared locally here.
*/
#define QBMAN_CINH_SWP_CFG 0xd00
+#define QBMAN_CINH_SWP_CFG 0xd00
+#define SWP_CFG_DQRR_MF_SHIFT 20
+#define SWP_CFG_EST_SHIFT 16
+#define SWP_CFG_WN_SHIFT 14
+#define SWP_CFG_RPM_SHIFT 12
+#define SWP_CFG_DCM_SHIFT 10
+#define SWP_CFG_EPM_SHIFT 8
+#define SWP_CFG_SD_SHIFT 5
+#define SWP_CFG_SP_SHIFT 4
+#define SWP_CFG_SE_SHIFT 3
+#define SWP_CFG_DP_SHIFT 2
+#define SWP_CFG_DE_SHIFT 1
+#define SWP_CFG_EP_SHIFT 0
-/* For MC portal use, we always configure with
- * DQRR_MF is (SWP_CFG,20,3) - DQRR max fill (<- 0x4)
- * EST is (SWP_CFG,16,3) - EQCR_CI stashing threshold (<- 0x2)
- * RPM is (SWP_CFG,12,2) - RCR production notification mode (<- 0x3)
- * DCM is (SWP_CFG,10,2) - DQRR consumption notification mode (<- 0x2)
- * EPM is (SWP_CFG,8,2) - EQCR production notification mode (<- 0x2)
- * SD is (SWP_CFG,5,1) - memory stashing drop enable (<- TRUE)
- * SP is (SWP_CFG,4,1) - memory stashing priority (<- TRUE)
- * SE is (SWP_CFG,3,1) - memory stashing enable (<- TRUE)
- * DP is (SWP_CFG,2,1) - dequeue stashing priority (<- TRUE)
- * DE is (SWP_CFG,1,1) - dequeue stashing enable (<- TRUE)
- * EP is (SWP_CFG,0,1) - EQCR_CI stashing priority (<- TRUE)
- */
static inline uint32_t qbman_set_swp_cfg(uint8_t max_fill, uint8_t wn,
uint8_t est, uint8_t rpm, uint8_t dcm,
uint8_t epm, int sd, int sp, int se,
@@ -304,12 +314,19 @@ static inline uint32_t qbman_set_swp_cfg(uint8_t max_fill, uint8_t wn,
{
uint32_t reg;
- reg = e32_uint8_t(20, (uint32_t)(3 + (max_fill >> 3)), max_fill) |
- e32_uint8_t(16, 3, est) |
- e32_uint8_t(12, 2, rpm) | e32_uint8_t(10, 2, dcm) |
- e32_uint8_t(8, 2, epm) | e32_int(5, 1, sd) |
- e32_int(4, 1, sp) | e32_int(3, 1, se) | e32_int(2, 1, dp) |
- e32_int(1, 1, de) | e32_int(0, 1, ep) | e32_uint8_t(14, 1, wn);
+ reg = (max_fill << SWP_CFG_DQRR_MF_SHIFT |
+ est << SWP_CFG_EST_SHIFT |
+ wn << SWP_CFG_WN_SHIFT |
+ rpm << SWP_CFG_RPM_SHIFT |
+ dcm << SWP_CFG_DCM_SHIFT |
+ epm << SWP_CFG_EPM_SHIFT |
+ sd << SWP_CFG_SD_SHIFT |
+ sp << SWP_CFG_SP_SHIFT |
+ se << SWP_CFG_SE_SHIFT |
+ dp << SWP_CFG_DP_SHIFT |
+ de << SWP_CFG_DE_SHIFT |
+ ep << SWP_CFG_EP_SHIFT);
+
return reg;
}
@@ -322,7 +339,7 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,
s->addr_cena = d->cena_bar;
s->addr_cinh = d->cinh_bar;
s->idx = (uint32_t)d->idx;
- s->cena = (void *)get_zeroed_page(GFP_KERNEL);
+ s->cena = malloc(4096);
if (!s->cena) {
pr_err("Could not allocate page for cena shadow\n");
return -1;
@@ -347,7 +364,7 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,
reg = qbman_cinh_read(s, QBMAN_CINH_SWP_CFG);
if (!reg) {
pr_err("The portal %d is not enabled!\n", s->idx);
- kfree(s->cena);
+ free(s->cena);
return -1;
}
return 0;
@@ -355,5 +372,5 @@ static inline int qbman_swp_sys_init(struct qbman_swp_sys *s,
static inline void qbman_swp_sys_finish(struct qbman_swp_sys *s)
{
- free_page((unsigned long)s->cena);
+ free(s->cena);
}
diff --git a/drivers/bus/fslmc/qbman/qbman_sys_decl.h b/drivers/bus/fslmc/qbman/qbman_sys_decl.h
index e52f5ed..e1125cf 100644
--- a/drivers/bus/fslmc/qbman/qbman_sys_decl.h
+++ b/drivers/bus/fslmc/qbman/qbman_sys_decl.h
@@ -34,27 +34,6 @@
#error "Unknown endianness!"
#endif
-/* The platform-independent code shouldn't need endianness, except for
- * weird/fast-path cases like qbman_result_has_token(), which needs to
- * perform a passive and endianness-specific test on a read-only data structure
- * very quickly. It's an exception, and this symbol is used for that case.
- */
-#if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
-#define DQRR_TOK_OFFSET 0
-#define QBMAN_RESULT_VERB_OFFSET_IN_MEM 24
-#define SCN_STATE_OFFSET_IN_MEM 8
-#define SCN_RID_OFFSET_IN_MEM 8
-#else
-#define DQRR_TOK_OFFSET 24
-#define QBMAN_RESULT_VERB_OFFSET_IN_MEM 0
-#define SCN_STATE_OFFSET_IN_MEM 16
-#define SCN_RID_OFFSET_IN_MEM 0
-#endif
-
-/* Similarly-named functions */
-#define upper32(a) upper_32_bits(a)
-#define lower32(a) lower_32_bits(a)
-
/****************/
/* arch assists */
/****************/
@@ -64,10 +43,10 @@
#define dccivac(p) { asm volatile("dc civac, %0" : : "r"(p) : "memory"); }
static inline void prefetch_for_load(void *p)
{
- asm volatile("prfm pldl1keep, [%0, #64]" : : "r" (p));
+ asm volatile("prfm pldl1keep, [%0, #0]" : : "r" (p));
}
static inline void prefetch_for_store(void *p)
{
- asm volatile("prfm pstl1keep, [%0, #64]" : : "r" (p));
+ asm volatile("prfm pstl1keep, [%0, #0]" : : "r" (p));
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 09/27] config/dpaa2: change max lores to 16
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (7 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 08/27] bus/fslmc: clean the qbman support code Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 10/27] bus/fslmc: add support for LX2160 platform Hemant Agrawal
` (19 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Ashish Jain <ashish.jain@nxp.com>
To support new LX2 series
Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
---
config/defconfig_arm64-dpaa2-linuxapp-gcc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc
index 8a42944..91f4993 100644
--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc
+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc
@@ -39,7 +39,7 @@ CONFIG_RTE_ARCH_ARM_TUNE="cortex-a72"
#
# Compile Environment Abstraction Layer
#
-CONFIG_RTE_MAX_LCORE=8
+CONFIG_RTE_MAX_LCORE=16
CONFIG_RTE_MAX_NUMA_NODES=1
CONFIG_RTE_CACHE_LINE_SIZE=64
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 10/27] bus/fslmc: add support for LX2160 platform
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (8 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 09/27] config/dpaa2: change max lores to 16 Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 11/27] net/dpaa2: add support for congestion overhead Hemant Agrawal
` (18 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Ashish Jain <ashish.jain@nxp.com>
Signed-off-by: Ashish Jain <ashish.jain@nxp.com>
---
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 22 ++++++++++++++--------
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 1 +
2 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index 7315555..8db1f6c 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -90,20 +90,22 @@ static int dpaa2_cluster_sz = 2;
* Cluster 1 (ID = x02) : CPU0, CPU1, CPU2, CPU3;
* Cluster 2 (ID = x03) : CPU4, CPU5, CPU6, CPU7;
*/
-
-/* Set the STASH Destination depending on Current CPU ID.
- * e.g. Valid values of SDEST are 4,5,6,7. Where,
- * CPU 0-1 will have SDEST 4
- * CPU 2-3 will have SDEST 5.....and so on.
+/* For LX2160 platform There are four clusters with following mapping:
+ * Cluster 1 (ID = x00) : CPU0, CPU1;
+ * Cluster 2 (ID = x01) : CPU2, CPU3;
+ * Cluster 3 (ID = x02) : CPU4, CPU5;
+ * Cluster 4 (ID = x03) : CPU6, CPU7;
+ * Cluster 1 (ID = x04) : CPU8, CPU9;
+ * Cluster 2 (ID = x05) : CPU10, CP11;
+ * Cluster 3 (ID = x06) : CPU12, CPU13;
+ * Cluster 4 (ID = x07) : CPU14, CPU15;
*/
+
static int
dpaa2_core_cluster_sdest(int cpu_id)
{
int x = cpu_id / dpaa2_cluster_sz;
- if (x > 3)
- x = 3;
-
return dpaa2_core_cluster_base + x;
}
@@ -278,6 +280,10 @@ dpaa2_configure_stashing(struct dpaa2_dpio_dev *dpio_dev, int cpu_id)
dpaa2_core_cluster_base = 0x02;
dpaa2_cluster_sz = 4;
PMD_INIT_LOG(DEBUG, "\tLS108x (A53) Platform Detected");
+ } else if ((mc_plat_info.svr & 0xffff0000) == SVR_LX2160A) {
+ dpaa2_core_cluster_base = 0x00;
+ dpaa2_cluster_sz = 2;
+ PMD_INIT_LOG(DEBUG, "\tLX2160 Platform Detected");
}
first_time = 1;
}
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 5d7a828..bb52a15 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -51,6 +51,7 @@
#define SVR_LS1080A 0x87030000
#define SVR_LS2080A 0x87010000
#define SVR_LS2088A 0x87090000
+#define SVR_LX2160A 0x87360000
#ifndef ETH_VLAN_HLEN
#define ETH_VLAN_HLEN 4 /** < Vlan Header Length */
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 11/27] net/dpaa2: add support for congestion overhead
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (9 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 10/27] bus/fslmc: add support for LX2160 platform Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 12/27] bus/fslmc: add support to check dpbp presence Hemant Agrawal
` (17 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 1 +
drivers/net/dpaa2/dpaa2_ethdev.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 945dcc7..d7950a5 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -419,6 +419,7 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
/*enabling per rx queue congestion control */
taildrop.threshold = CONG_THRESHOLD_RX_Q;
taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
+ taildrop.oal = CONG_RX_OAL;
PMD_INIT_LOG(DEBUG, "Enabling Early Drop on queue = %d",
rx_queue_id);
ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 07e1da6..6ee1a9f 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -61,6 +61,7 @@
* currently considering 32 KB packets
*/
#define CONG_THRESHOLD_RX_Q (64 * 1024)
+#define CONG_RX_OAL 128
/* Size of the input SMMU mapped memory required by MC */
#define DIST_PARAM_IOVA_SIZE 256
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 12/27] bus/fslmc: add support to check dpbp presence
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (10 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 11/27] net/dpaa2: add support for congestion overhead Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 13/27] bus/fslmc: cleanup the dpaa2 interrupt support Hemant Agrawal
` (16 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c | 7 +++++++
drivers/bus/fslmc/portal/dpaa2_hw_pvt.h | 1 +
drivers/bus/fslmc/rte_bus_fslmc_version.map | 1 +
3 files changed, 9 insertions(+)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
index 1ddd280..7e96115 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
@@ -129,6 +129,13 @@ void dpaa2_free_dpbp_dev(struct dpaa2_dpbp_dev *dpbp)
}
}
+int dpaa2_dpbp_supported(void)
+{
+ if (TAILQ_EMPTY(&dpbp_dev_list))
+ return -1;
+ return 0;
+}
+
static struct rte_dpaa2_object rte_dpaa2_dpbp_obj = {
.dev_type = DPAA2_BPOOL,
.create = dpaa2_create_dpbp_device,
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index bb52a15..8f39cfb 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -366,6 +366,7 @@ void set_swp_active_dqs(uint16_t dpio_index, struct qbman_result *dqs)
}
struct dpaa2_dpbp_dev *dpaa2_alloc_dpbp_dev(void);
void dpaa2_free_dpbp_dev(struct dpaa2_dpbp_dev *dpbp);
+int dpaa2_dpbp_supported(void);
struct dpaa2_dpci_dev *rte_dpaa2_alloc_dpci_dev(void);
void rte_dpaa2_free_dpci_dev(struct dpaa2_dpci_dev *dpci);
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index 3cc7dad..7b25248 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -83,6 +83,7 @@ DPDK_17.08 {
DPDK_17.11 {
global:
+ dpaa2_dpbp_supported;
rte_dpaa2_dev_type;
} DPDK_17.08;
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 13/27] bus/fslmc: cleanup the dpaa2 interrupt support
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (11 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 12/27] bus/fslmc: add support to check dpbp presence Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 14/27] net/dpaa2: add support for link status event Hemant Agrawal
` (15 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/Makefile | 1 +
drivers/bus/fslmc/fslmc_vfio.c | 108 +++++++++++++++++++++++-----
drivers/bus/fslmc/fslmc_vfio.h | 8 ++-
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 18 +++--
drivers/bus/fslmc/rte_bus_fslmc_version.map | 2 +
5 files changed, 110 insertions(+), 27 deletions(-)
diff --git a/drivers/bus/fslmc/Makefile b/drivers/bus/fslmc/Makefile
index d1b790b..37da1b0 100644
--- a/drivers/bus/fslmc/Makefile
+++ b/drivers/bus/fslmc/Makefile
@@ -51,6 +51,7 @@ CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc
CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc/mc
CFLAGS += -I$(RTE_SDK)/drivers/bus/fslmc/qbman/include
CFLAGS += -I$(RTE_SDK)/lib/librte_eal/linuxapp/eal
+CFLAGS += -I$(RTE_SDK)/lib/librte_eal/common
# versioning export map
EXPORT_MAP := rte_bus_fslmc_version.map
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index 3de5238..b2413c2 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -46,6 +46,7 @@
#include <dirent.h>
#include <sys/eventfd.h>
+#include <eal_filesystem.h>
#include <rte_mbuf.h>
#include <rte_ethdev.h>
#include <rte_malloc.h>
@@ -335,36 +336,107 @@ static int64_t vfio_map_mcp_obj(struct fslmc_vfio_group *group, char *mcp_obj)
#define IRQ_SET_BUF_LEN (sizeof(struct vfio_irq_set) + sizeof(int))
-int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle,
- uint32_t index)
+int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle, int index)
{
- struct vfio_irq_set *irq_set;
+ int len, ret;
char irq_set_buf[IRQ_SET_BUF_LEN];
- int *fd_ptr, fd, ret;
+ struct vfio_irq_set *irq_set;
+ int *fd_ptr;
+
+ len = sizeof(irq_set_buf);
- /* Prepare vfio_irq_set structure and SET the IRQ in VFIO */
- /* Give the eventfd to VFIO */
- fd = eventfd(0, 0);
irq_set = (struct vfio_irq_set *)irq_set_buf;
- irq_set->argsz = sizeof(irq_set_buf);
+ irq_set->argsz = len;
irq_set->count = 1;
- irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |
- VFIO_IRQ_SET_ACTION_TRIGGER;
+ irq_set->flags =
+ VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;
irq_set->index = index;
irq_set->start = 0;
fd_ptr = (int *)&irq_set->data;
- *fd_ptr = fd;
+ *fd_ptr = intr_handle->fd;
ret = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
- if (ret < 0) {
- FSLMC_VFIO_LOG(ERR, "Unable to set IRQ in VFIO, ret: %d\n",
- ret);
- return -1;
+ if (ret) {
+ RTE_LOG(ERR, EAL, "Error:dpaa2 SET IRQs fd=%d, err = %d(%s)\n",
+ intr_handle->fd, errno, strerror(errno));
+ return ret;
}
- /* Set the FD and update the flags */
- intr_handle->fd = fd;
- return 0;
+ return ret;
+}
+
+int rte_dpaa2_intr_disable(struct rte_intr_handle *intr_handle, int index)
+{
+ struct vfio_irq_set *irq_set;
+ char irq_set_buf[IRQ_SET_BUF_LEN];
+ int len, ret;
+
+ len = sizeof(struct vfio_irq_set);
+
+ irq_set = (struct vfio_irq_set *)irq_set_buf;
+ irq_set->argsz = len;
+ irq_set->flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_TRIGGER;
+ irq_set->index = index;
+ irq_set->start = 0;
+ irq_set->count = 0;
+
+ ret = ioctl(intr_handle->vfio_dev_fd, VFIO_DEVICE_SET_IRQS, irq_set);
+ if (ret)
+ RTE_LOG(ERR, EAL,
+ "Error disabling dpaa2 interrupts for fd %d\n",
+ intr_handle->fd);
+
+ return ret;
+}
+
+/* set up interrupt support (but not enable interrupts) */
+int
+rte_dpaa2_vfio_setup_intr(struct rte_intr_handle *intr_handle,
+ int vfio_dev_fd,
+ int num_irqs)
+{
+ int i, ret;
+
+ /* start from MSI-X interrupt type */
+ for (i = 0; i < num_irqs; i++) {
+ struct vfio_irq_info irq_info = { .argsz = sizeof(irq_info) };
+ int fd = -1;
+
+ irq_info.index = i;
+
+ ret = ioctl(vfio_dev_fd, VFIO_DEVICE_GET_IRQ_INFO, &irq_info);
+ if (ret < 0) {
+ FSLMC_VFIO_LOG(ERR,
+ "cannot get IRQ(%d) info, error %i (%s)",
+ i, errno, strerror(errno));
+ return -1;
+ }
+
+ /* if this vector cannot be used with eventfd,
+ * fail if we explicitly
+ * specified interrupt type, otherwise continue
+ */
+ if ((irq_info.flags & VFIO_IRQ_INFO_EVENTFD) == 0)
+ continue;
+
+ /* set up an eventfd for interrupts */
+ fd = eventfd(0, EFD_NONBLOCK | EFD_CLOEXEC);
+ if (fd < 0) {
+ FSLMC_VFIO_LOG(ERR,
+ "cannot set up eventfd, error %i (%s)\n",
+ errno, strerror(errno));
+ return -1;
+ }
+
+ intr_handle->fd = fd;
+ intr_handle->type = RTE_INTR_HANDLE_VFIO_MSI;
+ intr_handle->vfio_dev_fd = vfio_dev_fd;
+
+ return 0;
+ }
+
+ /* if we're here, we haven't found a suitable interrupt vector */
+ return -1;
}
/*
diff --git a/drivers/bus/fslmc/fslmc_vfio.h b/drivers/bus/fslmc/fslmc_vfio.h
index edb86d0..5470a41 100644
--- a/drivers/bus/fslmc/fslmc_vfio.h
+++ b/drivers/bus/fslmc/fslmc_vfio.h
@@ -64,8 +64,12 @@ typedef struct fslmc_vfio_container {
struct fslmc_vfio_group *group;
} fslmc_vfio_container;
-int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle,
- uint32_t index);
+int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle, int index);
+int rte_dpaa2_intr_disable(struct rte_intr_handle *intr_handle, int index);
+
+int rte_dpaa2_vfio_setup_intr(struct rte_intr_handle *intr_handle,
+ int vfio_dev_fd,
+ int num_irqs);
int fslmc_vfio_setup_group(void);
int fslmc_vfio_process_group(void);
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index 8db1f6c..ff41ce4 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -440,7 +440,6 @@ dpaa2_create_dpio_device(int vdev_fd,
{
struct dpaa2_dpio_dev *dpio_dev;
struct vfio_region_info reg_info = { .argsz = sizeof(reg_info)};
- int vfio_dev_fd;
if (obj_info->num_regions < NUM_DPIO_REGIONS) {
PMD_INIT_LOG(ERR, "ERROR, Not sufficient number "
@@ -457,14 +456,12 @@ dpaa2_create_dpio_device(int vdev_fd,
dpio_dev->dpio = NULL;
dpio_dev->hw_id = object_id;
- dpio_dev->intr_handle.vfio_dev_fd = vdev_fd;
rte_atomic16_init(&dpio_dev->ref_count);
/* Using single portal for all devices */
dpio_dev->mc_portal = rte_mcp_ptr_list[MC_PORTAL_INDEX];
reg_info.index = 0;
- vfio_dev_fd = dpio_dev->intr_handle.vfio_dev_fd;
- if (ioctl(vfio_dev_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {
+ if (ioctl(vdev_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {
PMD_INIT_LOG(ERR, "vfio: error getting region info\n");
rte_free(dpio_dev);
return -1;
@@ -473,10 +470,10 @@ dpaa2_create_dpio_device(int vdev_fd,
dpio_dev->ce_size = reg_info.size;
dpio_dev->qbman_portal_ce_paddr = (uint64_t)mmap(NULL, reg_info.size,
PROT_WRITE | PROT_READ, MAP_SHARED,
- vfio_dev_fd, reg_info.offset);
+ vdev_fd, reg_info.offset);
reg_info.index = 1;
- if (ioctl(vfio_dev_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {
+ if (ioctl(vdev_fd, VFIO_DEVICE_GET_REGION_INFO, ®_info)) {
PMD_INIT_LOG(ERR, "vfio: error getting region info\n");
rte_free(dpio_dev);
return -1;
@@ -485,7 +482,7 @@ dpaa2_create_dpio_device(int vdev_fd,
dpio_dev->ci_size = reg_info.size;
dpio_dev->qbman_portal_ci_paddr = (uint64_t)mmap(NULL, reg_info.size,
PROT_WRITE | PROT_READ, MAP_SHARED,
- vfio_dev_fd, reg_info.offset);
+ vdev_fd, reg_info.offset);
if (configure_dpio_qbman_swp(dpio_dev)) {
PMD_INIT_LOG(ERR,
@@ -497,6 +494,13 @@ dpaa2_create_dpio_device(int vdev_fd,
io_space_count++;
dpio_dev->index = io_space_count;
+
+ if (rte_dpaa2_vfio_setup_intr(&dpio_dev->intr_handle, vdev_fd, 1)) {
+ PMD_INIT_LOG(ERR, "Fail to setup interrupt for %d\n",
+ dpio_dev->hw_id);
+ rte_free(dpio_dev);
+ }
+
TAILQ_INSERT_TAIL(&dpio_dev_list, dpio_dev, next);
PMD_INIT_LOG(DEBUG, "DPAA2: Added [dpio.%d]", object_id);
diff --git a/drivers/bus/fslmc/rte_bus_fslmc_version.map b/drivers/bus/fslmc/rte_bus_fslmc_version.map
index 7b25248..51a2ac6 100644
--- a/drivers/bus/fslmc/rte_bus_fslmc_version.map
+++ b/drivers/bus/fslmc/rte_bus_fslmc_version.map
@@ -85,5 +85,7 @@ DPDK_17.11 {
dpaa2_dpbp_supported;
rte_dpaa2_dev_type;
+ rte_dpaa2_intr_disable;
+ rte_dpaa2_intr_enable;
} DPDK_17.08;
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 14/27] net/dpaa2: add support for link status event
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (12 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 13/27] bus/fslmc: cleanup the dpaa2 interrupt support Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 15/27] bus/fslmc: enable link status interrupt Hemant Agrawal
` (14 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
doc/guides/nics/features/dpaa2.ini | 1 +
drivers/net/dpaa2/dpaa2_ethdev.c | 123 +++++++++++++++++++
drivers/net/dpaa2/mc/dpni.c | 233 ++++++++++++++++++++++++++++++++++++
drivers/net/dpaa2/mc/fsl_dpni.h | 49 ++++++++
drivers/net/dpaa2/mc/fsl_dpni_cmd.h | 50 ++++++++
5 files changed, 456 insertions(+)
diff --git a/doc/guides/nics/features/dpaa2.ini b/doc/guides/nics/features/dpaa2.ini
index 146e087..ba4321c 100644
--- a/doc/guides/nics/features/dpaa2.ini
+++ b/doc/guides/nics/features/dpaa2.ini
@@ -6,6 +6,7 @@
[Features]
Speed capabilities = P
Link status = Y
+Link status event = Y
Queue start/stop = Y
Jumbo frame = Y
MTU update = Y
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index d7950a5..72c9e67 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -54,6 +54,8 @@
static struct rte_dpaa2_driver rte_dpaa2_pmd;
static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
+static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
+ int wait_to_complete);
static int dpaa2_dev_set_link_up(struct rte_eth_dev *dev);
static int dpaa2_dev_set_link_down(struct rte_eth_dev *dev);
static int dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
@@ -344,6 +346,10 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
return ret;
}
}
+
+ /* update the current status */
+ dpaa2_dev_link_update(dev, 0);
+
return 0;
}
@@ -556,9 +562,87 @@ dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
return NULL;
}
+/**
+ * Dpaa2 link Interrupt handler
+ *
+ * @param param
+ * The address of parameter (struct rte_eth_dev *) regsitered before.
+ *
+ * @return
+ * void
+ */
+static void
+dpaa2_interrupt_handler(void *param)
+{
+ struct rte_eth_dev *dev = param;
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ int ret;
+ int irq_index = DPNI_IRQ_INDEX;
+ unsigned int status = 0, clear = 0;
+
+ PMD_INIT_FUNC_TRACE();
+
+ if (dpni == NULL) {
+ RTE_LOG(ERR, PMD, "dpni is NULL");
+ return;
+ }
+
+ ret = dpni_get_irq_status(dpni, CMD_PRI_LOW, priv->token,
+ irq_index, &status);
+ if (unlikely(ret)) {
+ RTE_LOG(ERR, PMD, "Can't get irq status (err %d)", ret);
+ clear = 0xffffffff;
+ goto out;
+ }
+
+ if (status & DPNI_IRQ_EVENT_LINK_CHANGED) {
+ clear = DPNI_IRQ_EVENT_LINK_CHANGED;
+ dpaa2_dev_link_update(dev, 0);
+ /* calling all the apps registered for link status event */
+ _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC,
+ NULL, NULL);
+ }
+out:
+ ret = dpni_clear_irq_status(dpni, CMD_PRI_LOW, priv->token,
+ irq_index, clear);
+ if (unlikely(ret))
+ RTE_LOG(ERR, PMD, "Can't clear irq status (err %d)", ret);
+}
+
+static int
+dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
+{
+ int err = 0;
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ int irq_index = DPNI_IRQ_INDEX;
+ unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
+
+ PMD_INIT_FUNC_TRACE();
+
+ err = dpni_set_irq_mask(dpni, CMD_PRI_LOW, priv->token,
+ irq_index, mask);
+ if (err < 0) {
+ PMD_INIT_LOG(ERR, "Error: dpni_set_irq_mask():%d (%s)", err,
+ strerror(-err));
+ return err;
+ }
+
+ err = dpni_set_irq_enable(dpni, CMD_PRI_LOW, priv->token,
+ irq_index, enable);
+ if (err < 0)
+ PMD_INIT_LOG(ERR, "Error: dpni_set_irq_enable():%d (%s)", err,
+ strerror(-err));
+
+ return err;
+}
+
static int
dpaa2_dev_start(struct rte_eth_dev *dev)
{
+ struct rte_device *rdev = dev->device;
+ struct rte_dpaa2_device *dpaa2_dev;
struct rte_eth_dev_data *data = dev->data;
struct dpaa2_dev_priv *priv = data->dev_private;
struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
@@ -568,6 +652,10 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
struct dpni_queue_id qid;
struct dpaa2_queue *dpaa2_q;
int ret, i;
+ struct rte_intr_handle *intr_handle;
+
+ dpaa2_dev = container_of(rdev, struct rte_dpaa2_device, device);
+ intr_handle = &dpaa2_dev->intr_handle;
PMD_INIT_FUNC_TRACE();
@@ -647,6 +735,24 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
if (priv->max_vlan_filters)
dpaa2_vlan_offload_set(dev, ETH_VLAN_FILTER_MASK);
+ /* if the interrupts were configured on this devices*/
+ if (intr_handle && (intr_handle->fd) &&
+ (dev->data->dev_conf.intr_conf.lsc != 0)) {
+ /* Registering LSC interrupt handler */
+ rte_intr_callback_register(intr_handle,
+ dpaa2_interrupt_handler,
+ (void *)dev);
+
+ /* enable vfio intr/eventfd mapping
+ * Interrupt index 0 is required, so we can not use
+ * rte_intr_enable.
+ */
+ rte_dpaa2_intr_enable(intr_handle, DPNI_IRQ_INDEX);
+
+ /* enable dpni_irqs */
+ dpaa2_eth_setup_irqs(dev, 1);
+ }
+
return 0;
}
@@ -661,9 +767,25 @@ dpaa2_dev_stop(struct rte_eth_dev *dev)
struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
int ret;
struct rte_eth_link link;
+ struct rte_intr_handle *intr_handle = dev->intr_handle;
PMD_INIT_FUNC_TRACE();
+ /* reset interrupt callback */
+ if (intr_handle && (intr_handle->fd) &&
+ (dev->data->dev_conf.intr_conf.lsc != 0)) {
+ /*disable dpni irqs */
+ dpaa2_eth_setup_irqs(dev, 0);
+
+ /* disable vfio intr before callback unregister */
+ rte_dpaa2_intr_disable(intr_handle, DPNI_IRQ_INDEX);
+
+ /* Unregistering LSC interrupt handler */
+ rte_intr_callback_unregister(intr_handle,
+ dpaa2_interrupt_handler,
+ (void *)dev);
+ }
+
dpaa2_dev_set_link_down(dev);
ret = dpni_disable(dpni, CMD_PRI_LOW, priv->token);
@@ -1458,6 +1580,7 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
}
eth_dev->dev_ops = &dpaa2_ethdev_ops;
+ eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
eth_dev->tx_pkt_burst = dpaa2_dev_tx;
diff --git a/drivers/net/dpaa2/mc/dpni.c b/drivers/net/dpaa2/mc/dpni.c
index f95e669..6f671fe 100644
--- a/drivers/net/dpaa2/mc/dpni.c
+++ b/drivers/net/dpaa2/mc/dpni.c
@@ -351,6 +351,239 @@ int dpni_reset(struct fsl_mc_io *mc_io,
}
/**
+ * dpni_set_irq_enable() - Set overall interrupt state.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @irq_index: The interrupt index to configure
+ * @en: Interrupt state: - enable = 1, disable = 0
+ *
+ * Allows GPP software to control when interrupts are generated.
+ * Each interrupt can have up to 32 causes. The enable/disable control's the
+ * overall interrupt state. if the interrupt is disabled no causes will cause
+ * an interrupt.
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en)
+{
+ struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_irq_enable *cmd_params;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_IRQ_ENABLE,
+ cmd_flags,
+ token);
+ cmd_params = (struct dpni_cmd_set_irq_enable *)cmd.params;
+ dpni_set_field(cmd_params->enable, ENABLE, en);
+ cmd_params->irq_index = irq_index;
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpni_get_irq_enable() - Get overall interrupt state
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @irq_index: The interrupt index to configure
+ * @en: Returned interrupt state - enable = 1, disable = 0
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en)
+{
+ struct mc_command cmd = { 0 };
+ struct dpni_cmd_get_irq_enable *cmd_params;
+ struct dpni_rsp_get_irq_enable *rsp_params;
+
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_IRQ_ENABLE,
+ cmd_flags,
+ token);
+ cmd_params = (struct dpni_cmd_get_irq_enable *)cmd.params;
+ cmd_params->irq_index = irq_index;
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ rsp_params = (struct dpni_rsp_get_irq_enable *)cmd.params;
+ *en = dpni_get_field(rsp_params->enabled, ENABLE);
+
+ return 0;
+}
+
+/**
+ * dpni_set_irq_mask() - Set interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @irq_index: The interrupt index to configure
+ * @mask: Event mask to trigger interrupt;
+ * each bit:
+ * 0 = ignore event
+ * 1 = consider event for asserting IRQ
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask)
+{
+ struct mc_command cmd = { 0 };
+ struct dpni_cmd_set_irq_mask *cmd_params;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_SET_IRQ_MASK,
+ cmd_flags,
+ token);
+ cmd_params = (struct dpni_cmd_set_irq_mask *)cmd.params;
+ cmd_params->mask = cpu_to_le32(mask);
+ cmd_params->irq_index = irq_index;
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpni_get_irq_mask() - Get interrupt mask.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @irq_index: The interrupt index to configure
+ * @mask: Returned event mask to trigger interrupt
+ *
+ * Every interrupt can have up to 32 causes and the interrupt model supports
+ * masking/unmasking each cause independently
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask)
+{
+ struct mc_command cmd = { 0 };
+ struct dpni_cmd_get_irq_mask *cmd_params;
+ struct dpni_rsp_get_irq_mask *rsp_params;
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_IRQ_MASK,
+ cmd_flags,
+ token);
+ cmd_params = (struct dpni_cmd_get_irq_mask *)cmd.params;
+ cmd_params->irq_index = irq_index;
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ rsp_params = (struct dpni_rsp_get_irq_mask *)cmd.params;
+ *mask = le32_to_cpu(rsp_params->mask);
+
+ return 0;
+}
+
+/**
+ * dpni_get_irq_status() - Get the current status of any pending interrupts.
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @irq_index: The interrupt index to configure
+ * @status: Returned interrupts status - one bit per cause:
+ * 0 = no interrupt pending
+ * 1 = interrupt pending
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_get_irq_status(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status)
+{
+ struct mc_command cmd = { 0 };
+ struct dpni_cmd_get_irq_status *cmd_params;
+ struct dpni_rsp_get_irq_status *rsp_params;
+ int err;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_IRQ_STATUS,
+ cmd_flags,
+ token);
+ cmd_params = (struct dpni_cmd_get_irq_status *)cmd.params;
+ cmd_params->status = cpu_to_le32(*status);
+ cmd_params->irq_index = irq_index;
+
+ /* send command to mc*/
+ err = mc_send_command(mc_io, &cmd);
+ if (err)
+ return err;
+
+ /* retrieve response parameters */
+ rsp_params = (struct dpni_rsp_get_irq_status *)cmd.params;
+ *status = le32_to_cpu(rsp_params->status);
+
+ return 0;
+}
+
+/**
+ * dpni_clear_irq_status() - Clear a pending interrupt's status
+ * @mc_io: Pointer to MC portal's I/O object
+ * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token: Token of DPNI object
+ * @irq_index: The interrupt index to configure
+ * @status: bits to clear (W1C) - one bit per cause:
+ * 0 = don't change
+ * 1 = clear status bit
+ *
+ * Return: '0' on Success; Error code otherwise.
+ */
+int dpni_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status)
+{
+ struct mc_command cmd = { 0 };
+ struct dpni_cmd_clear_irq_status *cmd_params;
+
+ /* prepare command */
+ cmd.header = mc_encode_cmd_header(DPNI_CMDID_CLEAR_IRQ_STATUS,
+ cmd_flags,
+ token);
+ cmd_params = (struct dpni_cmd_clear_irq_status *)cmd.params;
+ cmd_params->irq_index = irq_index;
+ cmd_params->status = cpu_to_le32(status);
+
+ /* send command to mc*/
+ return mc_send_command(mc_io, &cmd);
+}
+
+/**
* dpni_get_attributes() - Retrieve DPNI attributes.
* @mc_io: Pointer to MC portal's I/O object
* @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
diff --git a/drivers/net/dpaa2/mc/fsl_dpni.h b/drivers/net/dpaa2/mc/fsl_dpni.h
index 092d3b3..5227ea1 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni.h
@@ -247,6 +247,55 @@ int dpni_reset(struct fsl_mc_io *mc_io,
uint16_t token);
/**
+ * DPNI IRQ Index and Events
+ */
+
+/**
+ * IRQ index
+ */
+#define DPNI_IRQ_INDEX 0
+/**
+ * IRQ event - indicates a change in link state
+ */
+#define DPNI_IRQ_EVENT_LINK_CHANGED 0x00000001
+
+int dpni_set_irq_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t en);
+
+int dpni_get_irq_enable(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint8_t *en);
+
+int dpni_set_irq_mask(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t mask);
+
+int dpni_get_irq_mask(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *mask);
+
+int dpni_get_irq_status(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t *status);
+
+int dpni_clear_irq_status(struct fsl_mc_io *mc_io,
+ uint32_t cmd_flags,
+ uint16_t token,
+ uint8_t irq_index,
+ uint32_t status);
+
+/**
* struct dpni_attr - Structure representing DPNI attributes
* @options: Any combination of the following options:
* DPNI_OPT_TX_FRM_RELEASE
diff --git a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
index 81226aa..1a48332 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
@@ -64,6 +64,13 @@
#define DPNI_CMDID_RESET DPNI_CMD(0x005)
#define DPNI_CMDID_IS_ENABLED DPNI_CMD(0x006)
+#define DPNI_CMDID_SET_IRQ_ENABLE DPNI_CMD(0x012)
+#define DPNI_CMDID_GET_IRQ_ENABLE DPNI_CMD(0x013)
+#define DPNI_CMDID_SET_IRQ_MASK DPNI_CMD(0x014)
+#define DPNI_CMDID_GET_IRQ_MASK DPNI_CMD(0x015)
+#define DPNI_CMDID_GET_IRQ_STATUS DPNI_CMD(0x016)
+#define DPNI_CMDID_CLEAR_IRQ_STATUS DPNI_CMD(0x017)
+
#define DPNI_CMDID_SET_POOLS DPNI_CMD_V2(0x200)
#define DPNI_CMDID_SET_ERRORS_BEHAVIOR DPNI_CMD(0x20B)
@@ -169,6 +176,49 @@ struct dpni_rsp_is_enabled {
uint8_t enabled;
};
+struct dpni_cmd_set_irq_enable {
+ uint8_t enable;
+ uint8_t pad[3];
+ uint8_t irq_index;
+};
+
+struct dpni_cmd_get_irq_enable {
+ uint32_t pad;
+ uint8_t irq_index;
+};
+
+struct dpni_rsp_get_irq_enable {
+ uint8_t enabled;
+};
+
+struct dpni_cmd_set_irq_mask {
+ uint32_t mask;
+ uint8_t irq_index;
+};
+
+struct dpni_cmd_get_irq_mask {
+ uint32_t pad;
+ uint8_t irq_index;
+};
+
+struct dpni_rsp_get_irq_mask {
+ uint32_t mask;
+};
+
+struct dpni_cmd_get_irq_status {
+ uint32_t status;
+ uint8_t irq_index;
+};
+
+struct dpni_rsp_get_irq_status {
+ uint32_t status;
+};
+
+struct dpni_cmd_clear_irq_status {
+ uint32_t status;
+ uint8_t irq_index;
+};
+
struct dpni_rsp_get_attr {
/* response word 0 */
uint32_t options;
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 15/27] bus/fslmc: enable link status interrupt
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (13 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 14/27] net/dpaa2: add support for link status event Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 16/27] net/dpaa2: check physical link state on up cmd Hemant Agrawal
` (13 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/fslmc_vfio.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index b2413c2..de08e1f 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -464,6 +464,10 @@ fslmc_process_iodevices(struct rte_dpaa2_device *dev)
}
switch (dev->dev_type) {
+ case DPAA2_ETH:
+ rte_dpaa2_vfio_setup_intr(&dev->intr_handle, dev_fd,
+ device_info.num_irqs);
+ break;
case DPAA2_CON:
case DPAA2_IO:
case DPAA2_CI:
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 16/27] net/dpaa2: check physical link state on up cmd
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (14 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 15/27] bus/fslmc: enable link status interrupt Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 17/27] net/dpaa2: improve error and logs for flow distribution Hemant Agrawal
` (12 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 23 +++++++++++++++--------
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 72c9e67..d5fa644 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -666,7 +666,7 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
return ret;
}
- /* Power up the phy. Needed to make the link go Up */
+ /* Power up the phy. Needed to make the link go UP */
dpaa2_dev_set_link_up(dev);
ret = dpni_get_qdid(dpni, CMD_PRI_LOW, priv->token,
@@ -1137,8 +1137,6 @@ dpaa2_dev_link_update(struct rte_eth_dev *dev,
struct rte_eth_link link, old;
struct dpni_link_state state = {0};
- PMD_INIT_FUNC_TRACE();
-
if (dpni == NULL) {
RTE_LOG(ERR, PMD, "dpni is NULL\n");
return 0;
@@ -1171,7 +1169,7 @@ dpaa2_dev_link_update(struct rte_eth_dev *dev,
if (link.link_status)
PMD_DRV_LOG(INFO, "Port %d Link is Up\n", dev->data->port_id);
else
- PMD_DRV_LOG(INFO, "Port %d Link is Down\n", dev->data->port_id);
+ PMD_DRV_LOG(INFO, "Port %d Link is Down", dev->data->port_id);
return 0;
}
@@ -1186,8 +1184,7 @@ dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
struct dpaa2_dev_priv *priv;
struct fsl_mc_io *dpni;
int en = 0;
-
- PMD_INIT_FUNC_TRACE();
+ struct dpni_link_state state = {0};
priv = dev->data->dev_private;
dpni = (struct fsl_mc_io *)priv->hw;
@@ -1213,11 +1210,21 @@ dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
return -EINVAL;
}
}
+ ret = dpni_get_link_state(dpni, CMD_PRI_LOW, priv->token, &state);
+ if (ret < 0) {
+ RTE_LOG(ERR, PMD, "error: dpni_get_link_state %d\n", ret);
+ return -1;
+ }
+
/* changing tx burst function to start enqueues */
dev->tx_pkt_burst = dpaa2_dev_tx;
- dev->data->dev_link.link_status = 1;
+ dev->data->dev_link.link_status = state.up;
- PMD_DRV_LOG(INFO, "Port %d Link UP successful", dev->data->port_id);
+ if (state.up)
+ PMD_DRV_LOG(INFO, "Port %d Link is set as UP",
+ dev->data->port_id);
+ else
+ PMD_DRV_LOG(INFO, "Port %d Link is DOWN", dev->data->port_id);
return ret;
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 17/27] net/dpaa2: improve error and logs for flow distribution
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (15 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 16/27] net/dpaa2: check physical link state on up cmd Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 18/27] net/dpaa2: increase the dist param to 64 bit Hemant Agrawal
` (11 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/base/dpaa2_hw_dpni.c | 39 +++++++++++++++++++++-------------
1 file changed, 24 insertions(+), 15 deletions(-)
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
index 1269dd2..ca8a6f7 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
@@ -49,7 +49,7 @@
#include "../dpaa2_ethdev.h"
-static void
+static int
dpaa2_distset_to_dpkg_profile_cfg(
uint32_t req_dist_set,
struct dpkg_profile_cfg *kg_cfg);
@@ -68,20 +68,26 @@ dpaa2_setup_flow_dist(struct rte_eth_dev *eth_dev,
p_params = rte_malloc(
NULL, DIST_PARAM_IOVA_SIZE, RTE_CACHE_LINE_SIZE);
if (!p_params) {
- RTE_LOG(ERR, PMD, "Memory unavaialble\n");
+ PMD_INIT_LOG(ERR, "Memory unavailable");
return -ENOMEM;
}
memset(p_params, 0, DIST_PARAM_IOVA_SIZE);
memset(&tc_cfg, 0, sizeof(struct dpni_rx_tc_dist_cfg));
- dpaa2_distset_to_dpkg_profile_cfg(req_dist_set, &kg_cfg);
+ ret = dpaa2_distset_to_dpkg_profile_cfg(req_dist_set, &kg_cfg);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "given rss_hf (%x) not supported",
+ req_dist_set);
+ rte_free(p_params);
+ return ret;
+ }
tc_cfg.key_cfg_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(p_params));
tc_cfg.dist_size = eth_dev->data->nb_rx_queues;
tc_cfg.dist_mode = DPNI_DIST_MODE_HASH;
ret = dpkg_prepare_key_cfg(&kg_cfg, p_params);
if (ret) {
- RTE_LOG(ERR, PMD, "Unable to prepare extract parameters\n");
+ PMD_INIT_LOG(ERR, "Unable to prepare extract parameters");
rte_free(p_params);
return ret;
}
@@ -90,9 +96,9 @@ dpaa2_setup_flow_dist(struct rte_eth_dev *eth_dev,
&tc_cfg);
rte_free(p_params);
if (ret) {
- RTE_LOG(ERR, PMD,
- "Setting distribution for Rx failed with err: %d\n",
- ret);
+ PMD_INIT_LOG(ERR,
+ "Setting distribution for Rx failed with err: %d",
+ ret);
return ret;
}
@@ -113,7 +119,7 @@ int dpaa2_remove_flow_dist(
p_params = rte_malloc(
NULL, DIST_PARAM_IOVA_SIZE, RTE_CACHE_LINE_SIZE);
if (!p_params) {
- RTE_LOG(ERR, PMD, "Memory unavaialble\n");
+ PMD_INIT_LOG(ERR, "Memory unavailable");
return -ENOMEM;
}
memset(p_params, 0, DIST_PARAM_IOVA_SIZE);
@@ -125,7 +131,7 @@ int dpaa2_remove_flow_dist(
ret = dpkg_prepare_key_cfg(&kg_cfg, p_params);
if (ret) {
- RTE_LOG(ERR, PMD, "Unable to prepare extract parameters\n");
+ PMD_INIT_LOG(ERR, "Unable to prepare extract parameters");
rte_free(p_params);
return ret;
}
@@ -134,13 +140,13 @@ int dpaa2_remove_flow_dist(
&tc_cfg);
rte_free(p_params);
if (ret)
- RTE_LOG(ERR, PMD,
- "Setting distribution for Rx failed with err: %d\n",
- ret);
+ PMD_INIT_LOG(ERR,
+ "Setting distribution for Rx failed with err:%d",
+ ret);
return ret;
}
-static void
+static int
dpaa2_distset_to_dpkg_profile_cfg(
uint32_t req_dist_set,
struct dpkg_profile_cfg *kg_cfg)
@@ -276,14 +282,17 @@ dpaa2_distset_to_dpkg_profile_cfg(
break;
default:
- PMD_DRV_LOG(WARNING, "Bad flow distribution"
- " option %x\n", dist_field);
+ PMD_INIT_LOG(WARNING,
+ "Unsupported flow dist option %x",
+ dist_field);
+ return -EINVAL;
}
}
req_dist_set = req_dist_set >> 1;
loop++;
}
kg_cfg->num_extracts = i;
+ return 0;
}
int
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 18/27] net/dpaa2: increase the dist param to 64 bit
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (16 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 17/27] net/dpaa2: improve error and logs for flow distribution Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 19/27] net/dpaa2: remove RSS restriction with num of queues Hemant Agrawal
` (10 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/base/dpaa2_hw_dpni.c | 8 ++++----
drivers/net/dpaa2/dpaa2_ethdev.h | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
index ca8a6f7..e3ab90a 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni.c
@@ -51,12 +51,12 @@
static int
dpaa2_distset_to_dpkg_profile_cfg(
- uint32_t req_dist_set,
+ uint64_t req_dist_set,
struct dpkg_profile_cfg *kg_cfg);
int
dpaa2_setup_flow_dist(struct rte_eth_dev *eth_dev,
- uint32_t req_dist_set)
+ uint64_t req_dist_set)
{
struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
struct fsl_mc_io *dpni = priv->hw;
@@ -76,7 +76,7 @@ dpaa2_setup_flow_dist(struct rte_eth_dev *eth_dev,
ret = dpaa2_distset_to_dpkg_profile_cfg(req_dist_set, &kg_cfg);
if (ret) {
- PMD_INIT_LOG(ERR, "given rss_hf (%x) not supported",
+ PMD_INIT_LOG(ERR, "given rss_hf (%lx) not supported",
req_dist_set);
rte_free(p_params);
return ret;
@@ -148,7 +148,7 @@ int dpaa2_remove_flow_dist(
static int
dpaa2_distset_to_dpkg_profile_cfg(
- uint32_t req_dist_set,
+ uint64_t req_dist_set,
struct dpkg_profile_cfg *kg_cfg)
{
uint32_t loop = 0, i = 0, dist_field = 0;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 6ee1a9f..7b14ae0 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -93,7 +93,7 @@ struct dpaa2_dev_priv {
};
int dpaa2_setup_flow_dist(struct rte_eth_dev *eth_dev,
- uint32_t req_dist_set);
+ uint64_t req_dist_set);
int dpaa2_remove_flow_dist(struct rte_eth_dev *eth_dev,
uint8_t tc_index);
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 19/27] net/dpaa2: remove RSS restriction with num of queues
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (17 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 18/27] net/dpaa2: increase the dist param to 64 bit Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 20/27] net/dpaa2: add support for RSS hash update and get Hemant Agrawal
` (9 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
DPAA2 HW does not have such restrictions.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 11 -----------
1 file changed, 11 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index d5fa644..dc24bed 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -326,18 +326,7 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
}
}
- /* Check for correct configuration */
- if (eth_conf->rxmode.mq_mode != ETH_MQ_RX_RSS &&
- data->nb_rx_queues > 1) {
- PMD_INIT_LOG(ERR, "Distribution is not enabled, "
- "but Rx queues more than 1\n");
- return -1;
- }
-
if (eth_conf->rxmode.mq_mode == ETH_MQ_RX_RSS) {
- /* Return in case number of Rx queues is 1 */
- if (data->nb_rx_queues == 1)
- return 0;
ret = dpaa2_setup_flow_dist(dev,
eth_conf->rx_adv_conf.rss_conf.rss_hf);
if (ret) {
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 20/27] net/dpaa2: add support for RSS hash update and get
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (18 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 19/27] net/dpaa2: remove RSS restriction with num of queues Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 21/27] net/dpaa2: add support for extra stats Hemant Agrawal
` (8 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 42 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 42 insertions(+)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index dc24bed..643d882 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -1418,6 +1418,46 @@ dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
return ret;
}
+static int
+dpaa2_dev_rss_hash_update(struct rte_eth_dev *dev,
+ struct rte_eth_rss_conf *rss_conf)
+{
+ struct rte_eth_dev_data *data = dev->data;
+ struct rte_eth_conf *eth_conf = &data->dev_conf;
+ int ret;
+
+ PMD_INIT_FUNC_TRACE();
+
+ if (rss_conf->rss_hf) {
+ ret = dpaa2_setup_flow_dist(dev, rss_conf->rss_hf);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "unable to set flow dist");
+ return ret;
+ }
+ } else {
+ ret = dpaa2_remove_flow_dist(dev, 0);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "unable to remove flow dist");
+ return ret;
+ }
+ }
+ eth_conf->rx_adv_conf.rss_conf.rss_hf = rss_conf->rss_hf;
+ return 0;
+}
+
+static int
+dpaa2_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
+ struct rte_eth_rss_conf *rss_conf)
+{
+ struct rte_eth_dev_data *data = dev->data;
+ struct rte_eth_conf *eth_conf = &data->dev_conf;
+
+ /* dpaa2 does not support rss_key, so length should be 0*/
+ rss_conf->rss_key_len = 0;
+ rss_conf->rss_hf = eth_conf->rx_adv_conf.rss_conf.rss_hf;
+ return 0;
+}
+
static struct eth_dev_ops dpaa2_ethdev_ops = {
.dev_configure = dpaa2_eth_dev_configure,
.dev_start = dpaa2_dev_start,
@@ -1447,6 +1487,8 @@ static struct eth_dev_ops dpaa2_ethdev_ops = {
.mac_addr_add = dpaa2_dev_add_mac_addr,
.mac_addr_remove = dpaa2_dev_remove_mac_addr,
.mac_addr_set = dpaa2_dev_set_mac_addr,
+ .rss_hash_update = dpaa2_dev_rss_hash_update,
+ .rss_hash_conf_get = dpaa2_dev_rss_hash_conf_get,
};
static int
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 21/27] net/dpaa2: add support for extra stats
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (19 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 20/27] net/dpaa2: add support for RSS hash update and get Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 22/27] net/dpaa2: fix the Tx handling of non HW pool bufs Hemant Agrawal
` (7 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
doc/guides/nics/features/dpaa2.ini | 1 +
drivers/net/dpaa2/dpaa2_ethdev.c | 174 ++++++++++++++++++++++++++++++++++++-
2 files changed, 173 insertions(+), 2 deletions(-)
diff --git a/doc/guides/nics/features/dpaa2.ini b/doc/guides/nics/features/dpaa2.ini
index ba4321c..6ebbab4 100644
--- a/doc/guides/nics/features/dpaa2.ini
+++ b/doc/guides/nics/features/dpaa2.ini
@@ -21,6 +21,7 @@ L3 checksum offload = Y
L4 checksum offload = Y
Packet type parsing = Y
Basic stats = Y
+Extended stats = Y
FW version = Y
Linux VFIO = Y
ARMv8 = Y
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 643d882..7b09a87 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -52,6 +52,28 @@
#include <mc/fsl_dpmng.h>
#include "dpaa2_ethdev.h"
+struct rte_dpaa2_xstats_name_off {
+ char name[RTE_ETH_XSTATS_NAME_SIZE];
+ uint8_t page_id; /* dpni statistics page id */
+ uint8_t stats_id; /* stats id in the given page */
+};
+
+static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
+ {"ingress_multicast_frames", 0, 2},
+ {"ingress_multicast_bytes", 0, 3},
+ {"ingress_broadcast_frames", 0, 4},
+ {"ingress_broadcast_bytes", 0, 5},
+ {"egress_multicast_frames", 1, 2},
+ {"egress_multicast_bytes", 1, 3},
+ {"egress_broadcast_frames", 1, 4},
+ {"egress_broadcast_bytes", 1, 5},
+ {"ingress_filtered_frames", 2, 0},
+ {"ingress_discarded_frames", 2, 1},
+ {"ingress_nobuffer_discards", 2, 2},
+ {"egress_discarded_frames", 2, 3},
+ {"egress_confirmed_frames", 2, 4},
+};
+
static struct rte_dpaa2_driver rte_dpaa2_pmd;
static int dpaa2_dev_uninit(struct rte_eth_dev *eth_dev);
static int dpaa2_dev_link_update(struct rte_eth_dev *dev,
@@ -1090,8 +1112,151 @@ void dpaa2_dev_stats_get(struct rte_eth_dev *dev,
return;
};
-static
-void dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
+static int
+dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
+ unsigned int n)
+{
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ int32_t retcode;
+ union dpni_statistics value[3] = {};
+ unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
+
+ if (xstats == NULL)
+ return 0;
+
+ if (n < num)
+ return num;
+
+ /* Get Counters from page_0*/
+ retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
+ 0, 0, &value[0]);
+ if (retcode)
+ goto err;
+
+ /* Get Counters from page_1*/
+ retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
+ 1, 0, &value[1]);
+ if (retcode)
+ goto err;
+
+ /* Get Counters from page_2*/
+ retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
+ 2, 0, &value[2]);
+ if (retcode)
+ goto err;
+
+ for (i = 0; i < num; i++) {
+ xstats[i].id = i;
+ xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
+ raw.counter[dpaa2_xstats_strings[i].stats_id];
+ }
+ return i;
+err:
+ RTE_LOG(ERR, PMD, "Error in obtaining extended stats (%d)\n", retcode);
+ return retcode;
+}
+
+static int
+dpaa2_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
+ struct rte_eth_xstat_name *xstats_names,
+ __rte_unused unsigned int limit)
+{
+ unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
+
+ if (xstats_names != NULL)
+ for (i = 0; i < stat_cnt; i++)
+ snprintf(xstats_names[i].name,
+ sizeof(xstats_names[i].name),
+ "%s",
+ dpaa2_xstats_strings[i].name);
+
+ return stat_cnt;
+}
+
+static int
+dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
+ uint64_t *values, unsigned int n)
+{
+ unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
+ uint64_t values_copy[stat_cnt];
+
+ if (!ids) {
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+ int32_t retcode;
+ union dpni_statistics value[3] = {};
+
+ if (n < stat_cnt)
+ return stat_cnt;
+
+ if (!values)
+ return 0;
+
+ /* Get Counters from page_0*/
+ retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
+ 0, 0, &value[0]);
+ if (retcode)
+ return 0;
+
+ /* Get Counters from page_1*/
+ retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
+ 1, 0, &value[1]);
+ if (retcode)
+ return 0;
+
+ /* Get Counters from page_2*/
+ retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
+ 2, 0, &value[2]);
+ if (retcode)
+ return 0;
+
+ for (i = 0; i < stat_cnt; i++) {
+ values[i] = value[dpaa2_xstats_strings[i].page_id].
+ raw.counter[dpaa2_xstats_strings[i].stats_id];
+ }
+ return stat_cnt;
+ }
+
+ dpaa2_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
+
+ for (i = 0; i < n; i++) {
+ if (ids[i] >= stat_cnt) {
+ PMD_INIT_LOG(ERR, "id value isn't valid");
+ return -1;
+ }
+ values[i] = values_copy[ids[i]];
+ }
+ return n;
+}
+
+static int
+dpaa2_xstats_get_names_by_id(
+ struct rte_eth_dev *dev,
+ struct rte_eth_xstat_name *xstats_names,
+ const uint64_t *ids,
+ unsigned int limit)
+{
+ unsigned int i, stat_cnt = RTE_DIM(dpaa2_xstats_strings);
+ struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
+
+ if (!ids)
+ return dpaa2_xstats_get_names(dev, xstats_names, limit);
+
+ dpaa2_xstats_get_names(dev, xstats_names_copy, limit);
+
+ for (i = 0; i < limit; i++) {
+ if (ids[i] >= stat_cnt) {
+ PMD_INIT_LOG(ERR, "id value isn't valid");
+ return -1;
+ }
+ strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
+ }
+ return limit;
+}
+
+static void
+dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
{
struct dpaa2_dev_priv *priv = dev->data->dev_private;
struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
@@ -1471,7 +1636,12 @@ static struct eth_dev_ops dpaa2_ethdev_ops = {
.dev_set_link_down = dpaa2_dev_set_link_down,
.link_update = dpaa2_dev_link_update,
.stats_get = dpaa2_dev_stats_get,
+ .xstats_get = dpaa2_dev_xstats_get,
+ .xstats_get_by_id = dpaa2_xstats_get_by_id,
+ .xstats_get_names_by_id = dpaa2_xstats_get_names_by_id,
+ .xstats_get_names = dpaa2_xstats_get_names,
.stats_reset = dpaa2_dev_stats_reset,
+ .xstats_reset = dpaa2_dev_stats_reset,
.fw_version_get = dpaa2_fw_version_get,
.dev_infos_get = dpaa2_dev_info_get,
.dev_supported_ptypes_get = dpaa2_supported_ptypes_get,
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 22/27] net/dpaa2: fix the Tx handling of non HW pool bufs
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (20 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 21/27] net/dpaa2: add support for extra stats Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 23/27] net/dpaa2: log that VLAN extend offload not supported Hemant Agrawal
` (6 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
The current code is sending 8 packet in each internal loop.
In some of the conditions, mbuf is being allocated or freed.
In case of error, the code is returning without taking care of
such buffer. It is better to send already prepared buffer and err
for the current failure only.
Fixes: 9e5f3e6d3658 ("net/dpaa2: handle non-hardware backed buffer pool")
Cc: stable@dpdk.org
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_rxtx.c | 41 ++++++++++++++++++++++++-----------------
1 file changed, 24 insertions(+), 17 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 75a06f5..7cfa73a 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -350,7 +350,6 @@ eth_copy_mbuf_to_fd(struct rte_mbuf *mbuf,
if (rte_dpaa2_mbuf_alloc_bulk(
rte_dpaa2_bpid_info[bpid].bp_list->mp, &mb, 1)) {
PMD_TX_LOG(WARNING, "Unable to allocated DPAA2 buffer");
- rte_pktmbuf_free(mbuf);
return -1;
}
m = (struct rte_mbuf *)mb;
@@ -382,8 +381,6 @@ eth_copy_mbuf_to_fd(struct rte_mbuf *mbuf,
rte_dpaa2_bpid_info[DPAA2_GET_FD_BPID(fd)].meta_data_size,
DPAA2_GET_FD_OFFSET(fd),
DPAA2_GET_FD_LEN(fd));
- /*free the original packet */
- rte_pktmbuf_free(mbuf);
return 0;
}
@@ -580,39 +577,35 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
mp = mi->pool;
}
/* Not a hw_pkt pool allocated frame */
- if (!mp) {
+ if (unlikely(!mp || !priv->bp_list)) {
PMD_TX_LOG(ERR, "err: no bpool attached");
- goto skip_tx;
+ goto send_n_return;
}
+
if (mp->ops_index != priv->bp_list->dpaa2_ops_index) {
PMD_TX_LOG(ERR, "non hw offload bufffer ");
/* alloc should be from the default buffer pool
* attached to this interface
*/
- if (priv->bp_list) {
- bpid = priv->bp_list->buf_pool.bpid;
- } else {
- PMD_TX_LOG(ERR,
- "err: no bpool attached");
- num_tx = 0;
- goto skip_tx;
- }
+ bpid = priv->bp_list->buf_pool.bpid;
+
if (unlikely((*bufs)->nb_segs > 1)) {
PMD_TX_LOG(ERR, "S/G support not added"
" for non hw offload buffer");
- goto skip_tx;
+ goto send_n_return;
}
if (eth_copy_mbuf_to_fd(*bufs,
&fd_arr[loop], bpid)) {
- bufs++;
- continue;
+ goto send_n_return;
}
+ /* free the original packet */
+ rte_pktmbuf_free(*bufs);
} else {
bpid = mempool_to_bpid(mp);
if (unlikely((*bufs)->nb_segs > 1)) {
if (eth_mbuf_to_sg_fd(*bufs,
&fd_arr[loop], bpid))
- goto skip_tx;
+ goto send_n_return;
} else {
eth_mbuf_to_fd(*bufs,
&fd_arr[loop], bpid);
@@ -630,6 +623,20 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
dpaa2_q->tx_pkts += frames_to_send;
nb_pkts -= frames_to_send;
}
+ return num_tx;
+
+send_n_return:
+ /* send any already prepared fd */
+ if (loop) {
+ unsigned int i = 0;
+
+ while (i < loop) {
+ i += qbman_swp_enqueue_multiple(swp, &eqdesc,
+ &fd_arr[i], loop - i);
+ }
+ num_tx += loop;
+ dpaa2_q->tx_pkts += loop;
+ }
skip_tx:
return num_tx;
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 23/27] net/dpaa2: log that VLAN extend offload not supported
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (21 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 22/27] net/dpaa2: fix the Tx handling of non HW pool bufs Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 24/27] net/dpaa2: checksum support as per user config Hemant Agrawal
` (5 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 7b09a87..611f59b 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -182,6 +182,12 @@ dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
RTE_LOG(ERR, PMD, "Unable to set vlan filter = %d\n",
ret);
}
+
+ if (mask & ETH_VLAN_EXTEND_MASK) {
+ if (dev->data->dev_conf.rxmode.hw_vlan_extend)
+ RTE_LOG(INFO, PMD,
+ "VLAN extend offload not supported\n");
+ }
}
static int
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 24/27] net/dpaa2: checksum support as per user config
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (22 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 23/27] net/dpaa2: log that VLAN extend offload not supported Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 25/27] net/dpaa2: improve debug messaging Hemant Agrawal
` (4 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Instead of enabling the RX checksum by default, make it
enable only with user ethernet configuration
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 65 +++++++++++++++++++++-------------------
1 file changed, 35 insertions(+), 30 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 611f59b..7756c4e 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -334,8 +334,10 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
static int
dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
{
- struct rte_eth_dev_data *data = dev->data;
- struct rte_eth_conf *eth_conf = &data->dev_conf;
+ struct dpaa2_dev_priv *priv = dev->data->dev_private;
+ struct fsl_mc_io *dpni = priv->hw;
+ struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
+ int rx_ip_csum_offload = false;
int ret;
PMD_INIT_FUNC_TRACE();
@@ -364,6 +366,37 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
}
}
+ if (eth_conf->rxmode.hw_ip_checksum)
+ rx_ip_csum_offload = true;
+
+ ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
+ DPNI_OFF_RX_L3_CSUM, rx_ip_csum_offload);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "Error to set RX l3 csum:Error = %d\n", ret);
+ return ret;
+ }
+
+ ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
+ DPNI_OFF_RX_L4_CSUM, rx_ip_csum_offload);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "Error to get RX l4 csum:Error = %d\n", ret);
+ return ret;
+ }
+
+ ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
+ DPNI_OFF_TX_L3_CSUM, true);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "Error to set TX l3 csum:Error = %d\n", ret);
+ return ret;
+ }
+
+ ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
+ DPNI_OFF_TX_L4_CSUM, true);
+ if (ret) {
+ PMD_INIT_LOG(ERR, "Error to get TX l4 csum:Error = %d\n", ret);
+ return ret;
+ }
+
/* update the current status */
dpaa2_dev_link_update(dev, 0);
@@ -707,34 +740,6 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
dpaa2_q->fqid = qid.fqid;
}
- ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
- DPNI_OFF_RX_L3_CSUM, true);
- if (ret) {
- PMD_INIT_LOG(ERR, "Error to set RX l3 csum:Error = %d\n", ret);
- return ret;
- }
-
- ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
- DPNI_OFF_RX_L4_CSUM, true);
- if (ret) {
- PMD_INIT_LOG(ERR, "Error to get RX l4 csum:Error = %d\n", ret);
- return ret;
- }
-
- ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
- DPNI_OFF_TX_L3_CSUM, true);
- if (ret) {
- PMD_INIT_LOG(ERR, "Error to set TX l3 csum:Error = %d\n", ret);
- return ret;
- }
-
- ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
- DPNI_OFF_TX_L4_CSUM, true);
- if (ret) {
- PMD_INIT_LOG(ERR, "Error to get TX l4 csum:Error = %d\n", ret);
- return ret;
- }
-
/*checksum errors, send them to normal path and set it in annotation */
err_cfg.errors = DPNI_ERROR_L3CE | DPNI_ERROR_L4CE;
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 25/27] net/dpaa2: improve debug messaging
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (23 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 24/27] net/dpaa2: checksum support as per user config Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 26/27] bus/dpaa2: improve debug log messages Hemant Agrawal
` (3 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/net/dpaa2/dpaa2_ethdev.c | 14 ++++++++------
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 7756c4e..39c32b3 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -426,8 +426,8 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
PMD_INIT_FUNC_TRACE();
- PMD_INIT_LOG(DEBUG, "dev =%p, queue =%d, pool = %p, conf =%p",
- dev, rx_queue_id, mb_pool, rx_conf);
+ PMD_DRV_LOG(DEBUG, "dev =%p, queue =%d, pool = %p, conf =%p",
+ dev, rx_queue_id, mb_pool, rx_conf);
if (!priv->bp_list || priv->bp_list->mp != mb_pool) {
bpid = mempool_to_bpid(mb_pool);
@@ -476,8 +476,8 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
taildrop.threshold = CONG_THRESHOLD_RX_Q;
taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
taildrop.oal = CONG_RX_OAL;
- PMD_INIT_LOG(DEBUG, "Enabling Early Drop on queue = %d",
- rx_queue_id);
+ PMD_DRV_LOG(DEBUG, "Enabling Early Drop on queue = %d",
+ rx_queue_id);
ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
DPNI_CP_QUEUE, DPNI_QUEUE_RX,
dpaa2_q->tc_index, flow_id, &taildrop);
@@ -983,7 +983,7 @@ dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
PMD_DRV_LOG(ERR, "setting the max frame length failed");
return -1;
}
- PMD_DRV_LOG(INFO, "MTU is configured %d for the device\n", mtu);
+ PMD_DRV_LOG(INFO, "MTU is configured %d for the device", mtu);
return 0;
}
@@ -1738,7 +1738,7 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
priv->nb_tx_queues = attr.num_tx_tcs;
PMD_DRV_LOG(DEBUG, "RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d",
- priv->num_tc, priv->nb_rx_queues, priv->nb_tx_queues);
+ priv->num_rx_tc, priv->nb_rx_queues, priv->nb_tx_queues);
priv->hw = dpni_dev;
priv->hw_id = hw_id;
@@ -1805,6 +1805,7 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
eth_dev->tx_pkt_burst = dpaa2_dev_tx;
rte_fslmc_vfio_dmamap();
+ RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
return 0;
init_err:
dpaa2_dev_uninit(eth_dev);
@@ -1865,6 +1866,7 @@ dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
eth_dev->rx_pkt_burst = NULL;
eth_dev->tx_pkt_burst = NULL;
+ RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
return 0;
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 26/27] bus/dpaa2: improve debug log messages
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (24 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 25/27] net/dpaa2: improve debug messaging Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 27/27] bus/fslmc: add devices in sorted order Hemant Agrawal
` (2 subsequent siblings)
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
enable the printing of objects during debuging.
use RTE_LOG to avoid function name printing for object name.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c | 2 +-
drivers/bus/fslmc/portal/dpaa2_hw_dpci.c | 2 +-
drivers/bus/fslmc/portal/dpaa2_hw_dpio.c | 6 ++----
3 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
index 7e96115..334e1f5 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpbp.c
@@ -98,7 +98,7 @@ dpaa2_create_dpbp_device(int vdev_fd __rte_unused,
TAILQ_INSERT_TAIL(&dpbp_dev_list, dpbp_node, next);
- PMD_INIT_LOG(DEBUG, "DPAA2: Added [dpbp.%d]", dpbp_id);
+ RTE_LOG(DEBUG, PMD, "DPAA2: Added [dpbp.%d]\n", dpbp_id);
return 0;
}
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
index b60a745..ae189c7 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpci.c
@@ -140,7 +140,7 @@ rte_dpaa2_create_dpci_device(int vdev_fd __rte_unused,
TAILQ_INSERT_TAIL(&dpci_dev_list, dpci_node, next);
- PMD_INIT_LOG(DEBUG, "DPAA2: Added [dpci.%d]", dpci_id);
+ RTE_LOG(DEBUG, PMD, "DPAA2: Added [dpci.%d]\n", dpci_id);
return 0;
}
diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
index ff41ce4..f00070f 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_dpio.c
@@ -210,7 +210,7 @@ configure_dpio_qbman_swp(struct dpaa2_dpio_dev *dpio_dev)
return -1;
}
- PMD_DRV_LOG(DEBUG, "\t Allocated DPIO Portal[%p]", dpio_dev->dpio);
+ PMD_DRV_LOG(DEBUG, "Allocated DPIO Portal[%p]", dpio_dev->dpio);
dpio_dev->dpio->regs = dpio_dev->mc_portal;
if (dpio_open(dpio_dev->dpio, CMD_PRI_LOW, dpio_dev->hw_id,
&dpio_dev->token)) {
@@ -242,8 +242,6 @@ configure_dpio_qbman_swp(struct dpaa2_dpio_dev *dpio_dev)
return -1;
}
- PMD_INIT_LOG(DEBUG, "Qbman Portal ID %d", attr.qbman_portal_id);
-
/* Configure & setup SW portal */
p_des.block = NULL;
p_des.idx = attr.qbman_portal_id;
@@ -502,7 +500,7 @@ dpaa2_create_dpio_device(int vdev_fd,
}
TAILQ_INSERT_TAIL(&dpio_dev_list, dpio_dev, next);
- PMD_INIT_LOG(DEBUG, "DPAA2: Added [dpio.%d]", object_id);
+ RTE_LOG(DEBUG, PMD, "DPAA2: Added [dpio.%d]\n", object_id);
return 0;
}
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* [dpdk-dev] [PATCH v3 27/27] bus/fslmc: add devices in sorted order
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (25 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 26/27] bus/dpaa2: improve debug log messages Hemant Agrawal
@ 2017-09-16 10:52 ` Hemant Agrawal
2017-09-18 20:20 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Ferruh Yigit
2017-10-06 1:30 ` Ferruh Yigit
28 siblings, 0 replies; 97+ messages in thread
From: Hemant Agrawal @ 2017-09-16 10:52 UTC (permalink / raw)
To: dev; +Cc: ferruh.yigit, shreyansh.jain
From: Shreyansh Jain <shreyansh.jain@nxp.com>
Before this patch, the devices discovered from VFIO layer were
being added in the device list in the order received from directory
scan. This causes an issue in case devices are reordered.
This patch makes all the devices inserted in the device list in
sorted order according to their name.
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
---
drivers/bus/fslmc/fslmc_bus.c | 45 ++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 44 insertions(+), 1 deletion(-)
diff --git a/drivers/bus/fslmc/fslmc_bus.c b/drivers/bus/fslmc/fslmc_bus.c
index d50c303..0a8229f 100644
--- a/drivers/bus/fslmc/fslmc_bus.c
+++ b/drivers/bus/fslmc/fslmc_bus.c
@@ -66,6 +66,49 @@ cleanup_fslmc_device_list(void)
}
static int
+compare_dpaa2_devname(struct rte_dpaa2_device *dev1,
+ struct rte_dpaa2_device *dev2)
+{
+ int comp;
+
+ if (dev1->dev_type > dev2->dev_type) {
+ comp = 1;
+ } else if (dev1->dev_type < dev2->dev_type) {
+ comp = -1;
+ } else {
+ /* Check the ID as types match */
+ if (dev1->object_id > dev2->object_id)
+ comp = 1;
+ else if (dev1->object_id < dev2->object_id)
+ comp = -1;
+ else
+ comp = 0; /* Duplicate device name */
+ }
+
+ return comp;
+}
+
+static void
+insert_in_device_list(struct rte_dpaa2_device *newdev)
+{
+ int comp, inserted = 0;
+ struct rte_dpaa2_device *dev = NULL;
+ struct rte_dpaa2_device *tdev = NULL;
+
+ TAILQ_FOREACH_SAFE(dev, &rte_fslmc_bus.device_list, next, tdev) {
+ comp = compare_dpaa2_devname(newdev, dev);
+ if (comp < 0) {
+ TAILQ_INSERT_BEFORE(dev, newdev, next);
+ inserted = 1;
+ break;
+ }
+ }
+
+ if (!inserted)
+ TAILQ_INSERT_TAIL(&rte_fslmc_bus.device_list, newdev, next);
+}
+
+static int
scan_one_fslmc_device(char *dev_name)
{
char *dup_dev_name, *t_ptr;
@@ -135,7 +178,7 @@ scan_one_fslmc_device(char *dev_name)
}
/* Add device in the fslmc device list */
- TAILQ_INSERT_TAIL(&rte_fslmc_bus.device_list, dev, next);
+ insert_in_device_list(dev);
/* Don't need the duplicated device filesystem entry anymore */
if (dup_dev_name)
--
2.7.4
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (26 preceding siblings ...)
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 27/27] bus/fslmc: add devices in sorted order Hemant Agrawal
@ 2017-09-18 20:20 ` Ferruh Yigit
2017-10-06 1:30 ` Ferruh Yigit
28 siblings, 0 replies; 97+ messages in thread
From: Ferruh Yigit @ 2017-09-18 20:20 UTC (permalink / raw)
To: Hemant Agrawal, dev; +Cc: shreyansh.jain
On 9/16/2017 11:52 AM, Hemant Agrawal wrote:
> This patchset includes the hw driver upgrades and additional
> nic feature implementations.
>
> patches 1..8 - upgrades the qbman hw driver
> patches 9..10 - adds the support for LX2160 platform
> patches 11..27 - adds various features and cleanups in
> NXP DPAA2 pmd mainly - links status, RSS update,
> extra stats etc.
>
> This patch depends on following [1], [2].
Overall looks good to me, I will wait dependencies to be merged into
main tree before getting this into next-net.
>
> 1. NXP DPAA2: Refactor bus scan/probe code
> http://dpdk.org/ml/archives/dev/2017-August/073545.html
>
> 2.NXP DPAA2 bus driver fw upgrade
> http://dpdk.org/ml/archives/dev/2017-September/075582.html
<...>
^ permalink raw reply [flat|nested] 97+ messages in thread* Re: [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates
2017-09-16 10:52 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Hemant Agrawal
` (27 preceding siblings ...)
2017-09-18 20:20 ` [dpdk-dev] [PATCH v3 00/27] NXP DPAA2 PMD updates Ferruh Yigit
@ 2017-10-06 1:30 ` Ferruh Yigit
28 siblings, 0 replies; 97+ messages in thread
From: Ferruh Yigit @ 2017-10-06 1:30 UTC (permalink / raw)
To: Hemant Agrawal, dev; +Cc: shreyansh.jain
On 9/16/2017 11:52 AM, Hemant Agrawal wrote:
> This patchset includes the hw driver upgrades and additional
> nic feature implementations.
>
> patches 1..8 - upgrades the qbman hw driver
> patches 9..10 - adds the support for LX2160 platform
> patches 11..27 - adds various features and cleanups in
> NXP DPAA2 pmd mainly - links status, RSS update,
> extra stats etc.
>
> This patch depends on following [1], [2].
>
> 1. NXP DPAA2: Refactor bus scan/probe code
> http://dpdk.org/ml/archives/dev/2017-August/073545.html
>
> 2.NXP DPAA2 bus driver fw upgrade
> http://dpdk.org/ml/archives/dev/2017-September/075582.html
>
> ---
> v3:
> 1. removed the MC fw upgrade patch to be separate patch
> 2. remove dpaa code, which was added mistakenly
> 3. fix the comments and compilation issue with debug on for patch #6,7,8
> 4. added patch to add the devices in natural sorted order
> 5. fix coverity issue in patch #13, #17, #18, #22
>
> v2:
> 1. improve the checksum offload suport as per fuser config
> 2. remvoe checksum errors.
> 3. some cleanups on log messages.
>
> Ashish Jain (2):
> config/dpaa2: change max lores to 16
> bus/fslmc: add support for LX2160 platform
>
> Haiying Wang (4):
> bus/fslmc: qbman replace word copy with memcpy
> bus/fslmc: add qbman API to do enqueue with multiple frames
> bus/fslmc: support up to 32 frames in one volatile dequeue
> bus/fslmc: enhance the QBMAN CENA mode
>
> Hemant Agrawal (20):
> bus/fslmc: remove the export for qbman version function
> bus/fslmc: qbman remove unused funcs and align names
> bus/fslmc: cleanup compat file
> bus/fslmc: clean the qbman support code
> net/dpaa2: add support for congestion overhead
> bus/fslmc: add support to check dpbp presence
> bus/fslmc: cleanup the dpaa2 interrupt support
> net/dpaa2: add support for link status event
> bus/fslmc: enable link status interrupt
> net/dpaa2: check physical link state on up cmd
> net/dpaa2: improve error and logs for flow distribution
> net/dpaa2: increase the dist param to 64 bit
> net/dpaa2: remove RSS restriction with num of queues
> net/dpaa2: add support for RSS hash update and get
> net/dpaa2: add support for extra stats
> net/dpaa2: fix the Tx handling of non HW pool bufs
> net/dpaa2: log that VLAN extend offload not supported
> net/dpaa2: checksum support as per user config
> net/dpaa2: improve debug messaging
> bus/dpaa2: improve debug log messages
>
> Shreyansh Jain (1):
> bus/fslmc: add devices in sorted order
Series applied to dpdk-next-net/master, thanks.
^ permalink raw reply [flat|nested] 97+ messages in thread