From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id 8CD011B1A7 for ; Thu, 14 Sep 2017 00:04:27 +0200 (CEST) Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Sep 2017 15:04:26 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,389,1500966000"; d="scan'208";a="128487056" Received: from wcpqa1.an.intel.com ([10.123.72.207]) by orsmga004.jf.intel.com with ESMTP; 13 Sep 2017 15:04:26 -0700 From: Erik Gabriel Carrillo To: rsanford@akamai.com Cc: dev@dpdk.org, konstantin.ananyev@intel.com, stephen@networkplumber.org, keith.wiles@intel.com, narender.vangati@intel.com Date: Wed, 13 Sep 2017 17:05:07 -0500 Message-Id: <1505340308-86141-3-git-send-email-erik.g.carrillo@intel.com> X-Mailer: git-send-email 1.7.10 In-Reply-To: <1505340308-86141-1-git-send-email-erik.g.carrillo@intel.com> References: <1503692783-16148-1-git-send-email-erik.g.carrillo@intel.com> <1505340308-86141-1-git-send-email-erik.g.carrillo@intel.com> Subject: [dpdk-dev] [PATCH v3 2/3] timer: handle timers installed from non-EAL threads X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 13 Sep 2017 22:04:27 -0000 This commit adds support for timers being created from non-EAL threads; it maps timers from all such threads to lcore id RTE_MAX_LCORE, and puts them all in a corresponding skiplist. Signed-off-by: Erik Gabriel Carrillo --- V3: * Rebased patch on reworked parent commit v2: * Address checkpatch warnings lib/librte_timer/rte_timer.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/lib/librte_timer/rte_timer.c b/lib/librte_timer/rte_timer.c index 1f4141e..c489c5f 100644 --- a/lib/librte_timer/rte_timer.c +++ b/lib/librte_timer/rte_timer.c @@ -66,8 +66,8 @@ struct skiplist { } __rte_cache_aligned; struct priv_timer { - /** one pending list per enabled lcore */ - struct skiplist pending_lists[RTE_MAX_LCORE]; + /** one pending list per lcore, plus one for non-EAL threads */ + struct skiplist pending_lists[RTE_MAX_LCORE + 1]; bool multi_pendlists; /** per-core variable that true if a timer was updated on this @@ -88,7 +88,7 @@ struct priv_timer { static struct priv_timer priv_timer[RTE_MAX_LCORE]; /** cache of IDs of enabled lcores */ -static unsigned int enabled_lcores[RTE_MAX_LCORE]; +static unsigned int enabled_lcores[RTE_MAX_LCORE + 1]; static int n_enabled_lcores; /* when debug is enabled, store some statistics */ @@ -114,12 +114,18 @@ rte_timer_subsystem_init(void) RTE_LCORE_FOREACH(lcore_id) enabled_lcores[n_enabled_lcores++] = lcore_id; + /* To handle timers coming from non-EAL threads */ + enabled_lcores[n_enabled_lcores++] = RTE_MAX_LCORE; + /* since priv_timer is static, it's zeroed by default, so only init some * fields. */ for (i = 0; i < n_enabled_lcores; i++) { lcore_id = enabled_lcores[i]; + /* Don't use this value to index the priv_timer array */ + if (lcore_id == RTE_MAX_LCORE) + continue; priv_tim = &priv_timer[lcore_id]; priv_tim->prev_lcore = lcore_id; @@ -343,7 +349,9 @@ timer_add(struct rte_timer *tim, unsigned int tim_lcore, int local_is_locked, struct priv_timer *priv_tim = &priv_timer[tim_lcore]; if (priv_tim->multi_pendlists) - *pending_lists_idx = lcore_id; + /* Check if timer being installed from non-EAL thread */ + *pending_lists_idx = (lcore_id == LCORE_ID_ANY) ? + RTE_MAX_LCORE : lcore_id; else *pending_lists_idx = SINGLE_LIST_IDX; -- 2.6.4