From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pg0-f65.google.com (mail-pg0-f65.google.com [74.125.83.65]) by dpdk.org (Postfix) with ESMTP id 0CE271B324 for ; Wed, 8 Nov 2017 11:57:18 +0100 (CET) Received: by mail-pg0-f65.google.com with SMTP id l24so1514978pgu.11 for ; Wed, 08 Nov 2017 02:57:17 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Kk3PMTEWsNgaksaHsHizpi0R+X/GSP7iXpZRuUPWjXk=; b=IrGV7KOnW3aCZDc4UVhA73i3CJgIYAgR3jSOOdtJFhCBL0sClT+1dTsoGFzvOR/U1H XId8lwfEdmloLh4DOPkC8cnb4KNBzKmTc3ch6evzM2sY4UheaE8hKELhwPnnwWcnp0fj 7hqZQcBMWBWf6Tb3wi57c2NPw74iv5ELDf/nvi167irisPhZXMvmXWApfQ4s2/0N7MI5 raSc8Afp/aMvEx9tDSAFIkepJr8A66AbJ+ePJ2+9FqsC7JZXgRmZY16vTp34JalNUO+C KP04rEtQUXM9S+eXQ3yDQzby934ltZJENvudkhZ78KdC3zUSt77dm1Sh50GMi2grEB5O AORw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Kk3PMTEWsNgaksaHsHizpi0R+X/GSP7iXpZRuUPWjXk=; b=JbJFVI9AxGSx9lmS7Pw8O+IgfVCESOK3pEstVSumvX0Y7Me2sbM9HhjR9jkT2Rjc1n 3TNeJPiFGSdCa1EKMNG0jeQwy7yHYcJTUCkNhaRXZ1hgzMDz94gVKGx8nFxM/3SGmerh P/Y4LLKGPiqRgKjBG+eKW1I7MPsZ4SOzD6bYHK+6PGjGP4AigO4glTLjvmJJeIv0Ujco GZ8wqmsQOW4QGn9TU4ckGHnpGmO6pUhxGY18mATT9+RBXcVO+dOH3xfUEroPggu10CM3 1mA/VG+AI1XPGCsLIwXJMC/eUKlHZW/6I3JqVyybnisxsipACPXYzlEJN4T9fl0Cdxbg S1Gw== X-Gm-Message-State: AJaThX66ENQ4Qf1YcUuH+hQWrzhhmoBH1dFkPRbv89VsNM8XdEGaV80Y xs35s1DaZZftShU/FFdELPA= X-Google-Smtp-Source: ABhQp+SUDuFPNkHky+2iwErvWu/KRS8eU6xkbGL+ZGn/GLf3lQzFs02SwGkoibTjZcJ48CMZXKduvQ== X-Received: by 10.84.248.77 with SMTP id e13mr1775348pln.200.1510135029231; Wed, 08 Nov 2017 01:57:09 -0800 (PST) Received: from nfv-demo01.hxtcorp.net ([38.106.11.25]) by smtp.gmail.com with ESMTPSA id a19sm7678826pfh.30.2017.11.08.01.57.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 08 Nov 2017 01:57:08 -0800 (PST) From: Jia He To: jerin.jacob@caviumnetworks.com, dev@dpdk.org, olivier.matz@6wind.com Cc: konstantin.ananyev@intel.com, bruce.richardson@intel.com, jianbo.liu@arm.com, hemant.agrawal@nxp.com, Jia He , Jia He Date: Wed, 8 Nov 2017 09:54:38 +0000 Message-Id: <1510134881-22987-2-git-send-email-hejianet@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510134881-22987-1-git-send-email-hejianet@gmail.com> References: <1510118764-29697-1-git-send-email-hejianet@gmail.com> <1510134881-22987-1-git-send-email-hejianet@gmail.com> Subject: [dpdk-dev] [PATCH v4 1/4] eal/arm64: remove the braces {} for dmb() and dsb() X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 08 Nov 2017 10:57:18 -0000 for the code as follows: if (condition) rte_smp_rmb(); else rte_smp_wmb(); Without this patch, compiler will report this error: error: 'else' without a previous 'if' Fixes: 84733fd0d75e ("eal/arm64: fix memory barrier definition") Signed-off-by: Jia He --- lib/librte_eal/common/include/arch/arm/rte_atomic_64.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h index 0b70d62..71da29c 100644 --- a/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h +++ b/lib/librte_eal/common/include/arch/arm/rte_atomic_64.h @@ -43,8 +43,8 @@ extern "C" { #include "generic/rte_atomic.h" -#define dsb(opt) { asm volatile("dsb " #opt : : : "memory"); } -#define dmb(opt) { asm volatile("dmb " #opt : : : "memory"); } +#define dsb(opt) asm volatile("dsb " #opt : : : "memory") +#define dmb(opt) asm volatile("dmb " #opt : : : "memory") #define rte_mb() dsb(sy) -- 2.7.4