From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id F1730200 for ; Tue, 19 Dec 2017 08:07:01 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 18 Dec 2017 23:07:00 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.45,425,1508828400"; d="scan'208";a="2967185" Received: from dpdk-xiao-1.sh.intel.com ([10.67.110.153]) by fmsmga002.fm.intel.com with ESMTP; 18 Dec 2017 23:06:58 -0800 From: Xiao Wang To: ferruh.yigit@intel.com Cc: dev@dpdk.org, stephen@networkplumber.org, Xiao Wang Date: Tue, 19 Dec 2017 07:42:20 -0800 Message-Id: <1513698140-92837-1-git-send-email-xiao.w.wang@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1512784653-128951-1-git-send-email-xiao.w.wang@intel.com> References: <1512784653-128951-1-git-send-email-xiao.w.wang@intel.com> Subject: [dpdk-dev] [PATCH v2] igb_uio: allow multi-process access X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 19 Dec 2017 07:07:02 -0000 In some case, one device are accessed by different processes via different BARs, so one uio device may be opened by more than one process, for this case we just need to enable interrupt once, and pci_clear_master only when the last process closed. Fixes: 5f6ff30dc507 ("igb_uio: fix interrupt enablement after FLR in VM") Signed-off-by: Xiao Wang --- v2: - Make uio reference counter operation atomic. --- lib/librte_eal/linuxapp/igb_uio/igb_uio.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c b/lib/librte_eal/linuxapp/igb_uio/igb_uio.c index a3a98c1..0c42cc4 100644 --- a/lib/librte_eal/linuxapp/igb_uio/igb_uio.c +++ b/lib/librte_eal/linuxapp/igb_uio/igb_uio.c @@ -45,6 +45,7 @@ struct rte_uio_pci_dev { struct uio_info info; struct pci_dev *pdev; enum rte_intr_mode mode; + atomic_t refcnt; }; static char *intr_mode; @@ -336,6 +337,10 @@ struct rte_uio_pci_dev { struct pci_dev *dev = udev->pdev; int err; + atomic_inc(&udev->refcnt); + if (atomic_read(&udev->refcnt) > 1) + return 0; + /* set bus master, which was cleared by the reset function */ pci_set_master(dev); @@ -354,6 +359,10 @@ struct rte_uio_pci_dev { struct rte_uio_pci_dev *udev = info->priv; struct pci_dev *dev = udev->pdev; + atomic_dec(&udev->refcnt); + if (atomic_read(&udev->refcnt) > 0) + return 0; + /* disable interrupts */ igbuio_pci_disable_interrupts(udev); -- 1.8.3.1