From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf0-f193.google.com (mail-pf0-f193.google.com [209.85.192.193]) by dpdk.org (Postfix) with ESMTP id 9224F1B16A for ; Fri, 5 Jan 2018 15:11:59 +0100 (CET) Received: by mail-pf0-f193.google.com with SMTP id j28so2222502pfk.8 for ; Fri, 05 Jan 2018 06:11:59 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=LKNXwQnXsfJ7k/JXSDWd/CpZF4WwO2r1lC7ItX61n/A=; b=SReTiMXOeL3TGR1b8TSfAF+5NX5qgiFMhGx63FarPak/qhg5zUZdWUJ+4tpUFphaci igrseAQr21BzeeHDZReS1x3mAyID5shhUBmvx0DbIdgyn2grVDHdbw75CgkQQt4NxjjX 2Tn6mQrWBnVQ+lln5mSjlSgSdHT0luoTVfhowy0HWzEKEZQ5IOTMtkWWMTZZexGYlsYN HvmGEDneBT5wph6TPEWRqckbm123NwAom44+3qF4cDjuCgLe+Df3dKfZvm36yQB36orn t2DHeAryvrt9+zJpfmG/ZP9WEsxJTHqRIFrpkT3GM+u70YKmZT0n7ausMiUJmW89PSEJ jALg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=LKNXwQnXsfJ7k/JXSDWd/CpZF4WwO2r1lC7ItX61n/A=; b=A6CjBIHL0f3myHuPVZ5NWPJWlwSgPgT0EGonLXO/UUwn6PT61jCDV61CIdfv/5l18x GmRgpaYT4YmEe0/h2mDNUqZZ9ML0gbnHRFZAJ7iT4aT5/VZq//ydDzE0vZS/Pvxavqcr nlGJwKMG5lgKs9pZCiugDqWwwQ68xZbunPAXY9kz7vuJwk1a+XQTZyzhxjR61G+Z7I7p DZj7eVSIO/AU97ZWgpOm/USK5X7OYUeeU9C4pcH8uczhm8hWduGkOqbAR1BRyIPdYUaS S7nkU+YrbOv6vRWikXQtnP/QHJSAnN31CAry+A+8BABToklfb5ZBWRc/1/gXMjsEA821 YiaQ== X-Gm-Message-State: AKGB3mKX5aSntf2TSxVLJEzpDUCdbgNO7zRSDZBHOvogXSBb0JY7Az0Z GCV+km2fhOeZTm0Q8WuD9L9MqJWCRHQ= X-Google-Smtp-Source: ACJfBot2rf8rrl/FD/hSzVZt3sqyrSGS6gNcxhJq6ZswKwalSfgtXKG/fjuFt6hGBTI1Waq3bs7crQ== X-Received: by 10.99.7.83 with SMTP id 80mr2677787pgh.278.1515161518707; Fri, 05 Jan 2018 06:11:58 -0800 (PST) Received: from local.opencloud.tech.localdomain ([219.147.95.160]) by smtp.gmail.com with ESMTPSA id w19sm12990407pfa.127.2018.01.05.06.11.57 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 05 Jan 2018 06:11:58 -0800 (PST) From: Tonghao Zhang To: dev@dpdk.org Cc: Tonghao Zhang Date: Fri, 5 Jan 2018 06:10:37 -0800 Message-Id: <1515161439-4792-3-git-send-email-xiangxia.m.yue@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1515161439-4792-1-git-send-email-xiangxia.m.yue@gmail.com> References: <1515161439-4792-1-git-send-email-xiangxia.m.yue@gmail.com> Subject: [dpdk-dev] [PATCH 3/5] net/ixgbevf: save IXGBE_VTEIMS to intr->mask for performance. X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 05 Jan 2018 14:11:59 -0000 If dpdk APPs call the rte_eth_dev_rx_intr_enable or rte_eth_dev_rx_intr_disable frequently, and ixgbe vf will read the IXGBE_VTEIMS register everytime. We can optimize the driver function. The patch save the IXGBE_VTEIMS to mask to avoid read frequently. Signed-off-by: Tonghao Zhang --- drivers/net/ixgbe/ixgbe_ethdev.c | 55 +++++++++++++++++++++++++--------------- 1 file changed, 35 insertions(+), 20 deletions(-) diff --git a/drivers/net/ixgbe/ixgbe_ethdev.c b/drivers/net/ixgbe/ixgbe_ethdev.c index b20cab9..e929235 100644 --- a/drivers/net/ixgbe/ixgbe_ethdev.c +++ b/drivers/net/ixgbe/ixgbe_ethdev.c @@ -241,8 +241,8 @@ static int ixgbevf_dev_link_update(struct rte_eth_dev *dev, static void ixgbevf_dev_stop(struct rte_eth_dev *dev); static void ixgbevf_dev_close(struct rte_eth_dev *dev); static int ixgbevf_dev_reset(struct rte_eth_dev *dev); -static void ixgbevf_intr_disable(struct ixgbe_hw *hw); -static void ixgbevf_intr_enable(struct ixgbe_hw *hw); +static void ixgbevf_intr_disable(struct rte_eth_dev *dev); +static void ixgbevf_intr_enable(struct rte_eth_dev *dev); static int ixgbevf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats); static void ixgbevf_dev_stats_reset(struct rte_eth_dev *dev); @@ -1636,7 +1636,7 @@ static int ixgbe_l2_tn_filter_init(struct rte_eth_dev *eth_dev) ixgbevf_dev_stats_reset(eth_dev); /* Disable the interrupts for VF */ - ixgbevf_intr_disable(hw); + ixgbevf_intr_disable(eth_dev); hw->mac.num_rar_entries = 128; /* The MAX of the underlying PF */ diag = hw->mac.ops.reset_hw(hw); @@ -1705,7 +1705,7 @@ static int ixgbe_l2_tn_filter_init(struct rte_eth_dev *eth_dev) rte_intr_callback_register(intr_handle, ixgbevf_dev_interrupt_handler, eth_dev); rte_intr_enable(intr_handle); - ixgbevf_intr_enable(hw); + ixgbevf_intr_enable(eth_dev); PMD_INIT_LOG(DEBUG, "port %d vendorID=0x%x deviceID=0x%x mac.type=%s", eth_dev->data->port_id, pci_dev->id.vendor_id, @@ -1738,7 +1738,7 @@ static int ixgbe_l2_tn_filter_init(struct rte_eth_dev *eth_dev) eth_dev->tx_pkt_burst = NULL; /* Disable the interrupts for VF */ - ixgbevf_intr_disable(hw); + ixgbevf_intr_disable(eth_dev); rte_free(eth_dev->data->mac_addrs); eth_dev->data->mac_addrs = NULL; @@ -4924,19 +4924,32 @@ static int ixgbevf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev, * Virtual Function operations */ static void -ixgbevf_intr_disable(struct ixgbe_hw *hw) +ixgbevf_intr_disable(struct rte_eth_dev *dev) { + struct ixgbe_interrupt *intr = + IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); + struct ixgbe_hw *hw = + IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + PMD_INIT_FUNC_TRACE(); /* Clear interrupt mask to stop from interrupts being generated */ IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK); IXGBE_WRITE_FLUSH(hw); + + /* Clear mask value. */ + intr->mask = 0; } static void -ixgbevf_intr_enable(struct ixgbe_hw *hw) +ixgbevf_intr_enable(struct rte_eth_dev *dev) { + struct ixgbe_interrupt *intr = + IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); + struct ixgbe_hw *hw = + IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); + PMD_INIT_FUNC_TRACE(); /* VF enable interrupt autoclean */ @@ -4945,6 +4958,9 @@ static int ixgbevf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev, IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, IXGBE_VF_IRQ_ENABLE_MASK); IXGBE_WRITE_FLUSH(hw); + + /* Save IXGBE_VTEIMS value to mask. */ + intr->mask = IXGBE_VF_IRQ_ENABLE_MASK; } static int @@ -5070,7 +5086,7 @@ static int ixgbevf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev, rte_intr_enable(intr_handle); /* Re-enable interrupt for VF */ - ixgbevf_intr_enable(hw); + ixgbevf_intr_enable(dev); return 0; } @@ -5084,7 +5100,7 @@ static int ixgbevf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev, PMD_INIT_FUNC_TRACE(); - ixgbevf_intr_disable(hw); + ixgbevf_intr_disable(dev); hw->adapter_stopped = 1; ixgbe_stop_adapter(hw); @@ -5582,17 +5598,17 @@ static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on) { struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; - uint32_t mask; + struct ixgbe_interrupt *intr = + IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); uint32_t vec = IXGBE_MISC_VEC_ID; - mask = IXGBE_READ_REG(hw, IXGBE_VTEIMS); if (rte_intr_allow_others(intr_handle)) vec = IXGBE_RX_VEC_START; - mask |= (1 << vec); + intr->mask |= (1 << vec); RTE_SET_USED(queue_id); - IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); + IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, intr->mask); rte_intr_enable(intr_handle); @@ -5602,19 +5618,19 @@ static void ixgbevf_set_vfta_all(struct rte_eth_dev *dev, bool on) static int ixgbevf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id) { - uint32_t mask; + struct ixgbe_interrupt *intr = + IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev); struct rte_intr_handle *intr_handle = &pci_dev->intr_handle; uint32_t vec = IXGBE_MISC_VEC_ID; - mask = IXGBE_READ_REG(hw, IXGBE_VTEIMS); if (rte_intr_allow_others(intr_handle)) vec = IXGBE_RX_VEC_START; - mask &= ~(1 << vec); + intr->mask &= ~(1 << vec); RTE_SET_USED(queue_id); - IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask); + IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, intr->mask); return 0; } @@ -8170,7 +8186,7 @@ static void ixgbevf_mbx_process(struct rte_eth_dev *dev) struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); struct ixgbe_interrupt *intr = IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); - ixgbevf_intr_disable(hw); + ixgbevf_intr_disable(dev); /* read-on-clear nic registers here */ eicr = IXGBE_READ_REG(hw, IXGBE_VTEICR); @@ -8187,7 +8203,6 @@ static void ixgbevf_mbx_process(struct rte_eth_dev *dev) static int ixgbevf_dev_interrupt_action(struct rte_eth_dev *dev) { - struct ixgbe_hw *hw = IXGBE_DEV_PRIVATE_TO_HW(dev->data->dev_private); struct ixgbe_interrupt *intr = IXGBE_DEV_PRIVATE_TO_INTR(dev->data->dev_private); @@ -8196,7 +8211,7 @@ static void ixgbevf_mbx_process(struct rte_eth_dev *dev) intr->flags &= ~IXGBE_FLAG_MAILBOX; } - ixgbevf_intr_enable(hw); + ixgbevf_intr_enable(dev); return 0; } -- 1.8.3.1